diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/arc/nps400-6.d | 139 | ||||
| -rw-r--r-- | gas/testsuite/gas/arc/nps400-6.s | 32 | ||||
| -rw-r--r-- | include/opcode/arc.h | 1 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/arc-nps400-tbl.h | 117 | ||||
| -rw-r--r-- | opcodes/arc-opc.c | 97 |
7 files changed, 348 insertions, 50 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index af4e9c9..9f15007 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2016-06-13 Graham Markall <graham.markall@embecosm.com> + * testsuite/gas/arc/nps400-6.s: Add tests of hash, tr, utf8, e4by, and + addf. + * testsuite/gas/arc/nps400-6.d: Likewise. + +2016-06-13 Graham Markall <graham.markall@embecosm.com> + * testsuite/gas/arc/nps400-6.s: Add tests of calcbsd, calcbxd, calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms, csma, cbba, zncv, and hofs. diff --git a/gas/testsuite/gas/arc/nps400-6.d b/gas/testsuite/gas/arc/nps400-6.d index 6a67461..19c510b 100644 --- a/gas/testsuite/gas/arc/nps400-6.d +++ b/gas/testsuite/gas/arc/nps400-6.d @@ -199,33 +199,112 @@ Disassembly of section .text: 360: 3e6d f083 1234 5678 cbba.f r3,0x12345678,0x2 368: 396d 813e cbba.f 0,r1,0x4 36c: 3e6d f07e ffff ffff cbba.f 0,0xffffffff,0x1 - 374: 3c35 150a zncv.rd r10,r12,r20 - 378: 3e35 7500 1234 5678 zncv.rd r0,0x12345678,r20 - 380: 3f35 0f86 ffff ffff zncv.rd r6,r7,0xffffffff - 388: 3e35 7f88 ffff ffff zncv.rd r8,0xffffffff,0xffffffff - 390: 3e35 137e zncv.rd 0,r14,r13 - 394: 3e35 72be ffff ffff zncv.rd 0,0xffffffff,r10 - 39c: 3c35 1fbe ffff ffff zncv.rd 0,r12,0xffffffff - 3a4: 3d75 0044 zncv.rd r4,r5,0x1 - 3a8: 3e75 7083 1234 5678 zncv.rd r3,0x12345678,0x2 - 3b0: 3975 013e zncv.rd 0,r1,0x4 - 3b4: 3e75 707e ffff ffff zncv.rd 0,0xffffffff,0x1 - 3bc: 39b5 0fff zncv.rd r1,r1,-1 - 3c0: 3eb5 7fff ffff ffff zncv.rd 0,0xffffffff,-1 - 3c8: 3c35 950a zncv.wr r10,r12,r20 - 3cc: 3e35 f500 1234 5678 zncv.wr r0,0x12345678,r20 - 3d4: 3f35 8f86 ffff ffff zncv.wr r6,r7,0xffffffff - 3dc: 3e35 ff88 ffff ffff zncv.wr r8,0xffffffff,0xffffffff - 3e4: 3e35 937e zncv.wr 0,r14,r13 - 3e8: 3e35 f2be ffff ffff zncv.wr 0,0xffffffff,r10 - 3f0: 3c35 9fbe ffff ffff zncv.wr 0,r12,0xffffffff - 3f8: 3d75 8044 zncv.wr r4,r5,0x1 - 3fc: 3e75 f083 1234 5678 zncv.wr r3,0x12345678,0x2 - 404: 3975 813e zncv.wr 0,r1,0x4 - 408: 3e75 f07e ffff ffff zncv.wr 0,0xffffffff,0x1 - 410: 39b5 8fff zncv.wr r1,r1,-1 - 414: 3eb5 ffff ffff ffff zncv.wr 0,0xffffffff,-1 - 41c: 3a36 00c1 hofs r1,r2,r3 - 420: 3d36 8184 hofs.f r4,r5,r6 - 424: 3876 13c7 hofs r7,r8,0xf0,0 - 428: 3876 9807 hofs.f r7,r8,0,0x1 + 374: 3c21 150a tr r10,r12,r20 + 378: 3e21 7500 1234 5678 tr r0,0x12345678,r20 + 380: 3f21 0f86 ffff ffff tr r6,r7,0xffffffff + 388: 3e21 7f88 ffff ffff tr r8,0xffffffff,0xffffffff + 390: 3e21 137e tr 0,r14,r13 + 394: 3e21 72be ffff ffff tr 0,0xffffffff,r10 + 39c: 3c21 1fbe ffff ffff tr 0,r12,0xffffffff + 3a4: 3d61 0044 tr r4,r5,0x1 + 3a8: 3e61 7083 1234 5678 tr r3,0x12345678,0x2 + 3b0: 3961 013e tr 0,r1,0x4 + 3b4: 3e61 707e ffff ffff tr 0,0xffffffff,0x1 + 3bc: 3c21 950a tr.f r10,r12,r20 + 3c0: 3e21 f500 1234 5678 tr.f r0,0x12345678,r20 + 3c8: 3f21 8f86 ffff ffff tr.f r6,r7,0xffffffff + 3d0: 3e21 ff88 ffff ffff tr.f r8,0xffffffff,0xffffffff + 3d8: 3e21 937e tr.f 0,r14,r13 + 3dc: 3e21 f2be ffff ffff tr.f 0,0xffffffff,r10 + 3e4: 3c21 9fbe ffff ffff tr.f 0,r12,0xffffffff + 3ec: 3d61 8044 tr.f r4,r5,0x1 + 3f0: 3e61 f083 1234 5678 tr.f r3,0x12345678,0x2 + 3f8: 3961 813e tr.f 0,r1,0x4 + 3fc: 3e61 f07e ffff ffff tr.f 0,0xffffffff,0x1 + 404: 3c22 150a utf8 r10,r12,r20 + 408: 3e22 7500 1234 5678 utf8 r0,0x12345678,r20 + 410: 3f22 0f86 ffff ffff utf8 r6,r7,0xffffffff + 418: 3e22 7f88 ffff ffff utf8 r8,0xffffffff,0xffffffff + 420: 3e22 137e utf8 0,r14,r13 + 424: 3e22 72be ffff ffff utf8 0,0xffffffff,r10 + 42c: 3c22 1fbe ffff ffff utf8 0,r12,0xffffffff + 434: 3d62 0044 utf8 r4,r5,0x1 + 438: 3e62 7083 1234 5678 utf8 r3,0x12345678,0x2 + 440: 3962 013e utf8 0,r1,0x4 + 444: 3e62 707e ffff ffff utf8 0,0xffffffff,0x1 + 44c: 3c22 950a utf8.f r10,r12,r20 + 450: 3e22 f500 1234 5678 utf8.f r0,0x12345678,r20 + 458: 3f22 8f86 ffff ffff utf8.f r6,r7,0xffffffff + 460: 3e22 ff88 ffff ffff utf8.f r8,0xffffffff,0xffffffff + 468: 3e22 937e utf8.f 0,r14,r13 + 46c: 3e22 f2be ffff ffff utf8.f 0,0xffffffff,r10 + 474: 3c22 9fbe ffff ffff utf8.f 0,r12,0xffffffff + 47c: 3d62 8044 utf8.f r4,r5,0x1 + 480: 3e62 f083 1234 5678 utf8.f r3,0x12345678,0x2 + 488: 3962 813e utf8.f 0,r1,0x4 + 48c: 3e62 f07e ffff ffff utf8.f 0,0xffffffff,0x1 + 494: 3c23 150a addf r10,r12,r20 + 498: 3e23 7500 1234 5678 addf r0,0x12345678,r20 + 4a0: 3f23 0f86 ffff ffff addf r6,r7,0xffffffff + 4a8: 3e23 7f88 ffff ffff addf r8,0xffffffff,0xffffffff + 4b0: 3e23 137e addf 0,r14,r13 + 4b4: 3e23 72be ffff ffff addf 0,0xffffffff,r10 + 4bc: 3c23 1fbe ffff ffff addf 0,r12,0xffffffff + 4c4: 3d63 0044 addf r4,r5,0x1 + 4c8: 3e63 7083 1234 5678 addf r3,0x12345678,0x2 + 4d0: 3963 013e addf 0,r1,0x4 + 4d4: 3e63 707e ffff ffff addf 0,0xffffffff,0x1 + 4dc: 3c23 950a addf.f r10,r12,r20 + 4e0: 3e23 f500 1234 5678 addf.f r0,0x12345678,r20 + 4e8: 3f23 8f86 ffff ffff addf.f r6,r7,0xffffffff + 4f0: 3e23 ff88 ffff ffff addf.f r8,0xffffffff,0xffffffff + 4f8: 3e23 937e addf.f 0,r14,r13 + 4fc: 3e23 f2be ffff ffff addf.f 0,0xffffffff,r10 + 504: 3c23 9fbe ffff ffff addf.f 0,r12,0xffffffff + 50c: 3d63 8044 addf.f r4,r5,0x1 + 510: 3e63 f083 1234 5678 addf.f r3,0x12345678,0x2 + 518: 3963 813e addf.f 0,r1,0x4 + 51c: 3e63 f07e ffff ffff addf.f 0,0xffffffff,0x1 + 524: 3c35 150a zncv.rd r10,r12,r20 + 528: 3e35 7500 1234 5678 zncv.rd r0,0x12345678,r20 + 530: 3f35 0f86 ffff ffff zncv.rd r6,r7,0xffffffff + 538: 3e35 7f88 ffff ffff zncv.rd r8,0xffffffff,0xffffffff + 540: 3e35 137e zncv.rd 0,r14,r13 + 544: 3e35 72be ffff ffff zncv.rd 0,0xffffffff,r10 + 54c: 3c35 1fbe ffff ffff zncv.rd 0,r12,0xffffffff + 554: 3d75 0044 zncv.rd r4,r5,0x1 + 558: 3e75 7083 1234 5678 zncv.rd r3,0x12345678,0x2 + 560: 3975 013e zncv.rd 0,r1,0x4 + 564: 3e75 707e ffff ffff zncv.rd 0,0xffffffff,0x1 + 56c: 39b5 0fff zncv.rd r1,r1,-1 + 570: 3eb5 7fff ffff ffff zncv.rd 0,0xffffffff,-1 + 578: 3c35 950a zncv.wr r10,r12,r20 + 57c: 3e35 f500 1234 5678 zncv.wr r0,0x12345678,r20 + 584: 3f35 8f86 ffff ffff zncv.wr r6,r7,0xffffffff + 58c: 3e35 ff88 ffff ffff zncv.wr r8,0xffffffff,0xffffffff + 594: 3e35 937e zncv.wr 0,r14,r13 + 598: 3e35 f2be ffff ffff zncv.wr 0,0xffffffff,r10 + 5a0: 3c35 9fbe ffff ffff zncv.wr 0,r12,0xffffffff + 5a8: 3d75 8044 zncv.wr r4,r5,0x1 + 5ac: 3e75 f083 1234 5678 zncv.wr r3,0x12345678,0x2 + 5b4: 3975 813e zncv.wr 0,r1,0x4 + 5b8: 3e75 f07e ffff ffff zncv.wr 0,0xffffffff,0x1 + 5c0: 39b5 8fff zncv.wr r1,r1,-1 + 5c4: 3eb5 ffff ffff ffff zncv.wr 0,0xffffffff,-1 + 5cc: 3a36 00c1 hofs r1,r2,r3 + 5d0: 3d36 8184 hofs.f r4,r5,r6 + 5d4: 3876 13c7 hofs r7,r8,0xf0,0 + 5d8: 3876 9807 hofs.f r7,r8,0,0x1 + 5dc: 5a78 0800 hash r1,r2,r3,0x1,0,0,0 + 5e0: 5dd8 67fd hash r12,r13,r14,0x20,0x7,0x1,0x1 + 5e4: 5a79 0800 hash.p0 r1,r2,r3,0x1,0x1,0,0 + 5e8: 5dd9 67ff hash.p0 r12,r13,r14,0x20,0x8,0x3,0x1 + 5ec: 5a7a 0800 hash.p1 r1,r2,r3,0x1,0x1,0,0 + 5f0: 5dda 67ff hash.p1 r12,r13,r14,0x20,0x8,0x3,0x1 + 5f4: 5a7b 0800 hash.p2 r1,r2,r3,0x1,0x1,0,0 + 5f8: 5ddb 67ff hash.p2 r12,r13,r14,0x20,0x8,0x3,0x1 + 5fc: 5a7c 0800 hash.p3 r1,r2,r3,0x1,0x1,0,0 + 600: 5ddc 67ff hash.p3 r12,r13,r14,0x20,0x8,0x3,0x1 + 604: 595d 0000 e4by r0,r1,r2,0,0,0,0x4 + 608: 5cbd 394c e4by r7,r12,r13,0x1,0x2,0x3,0x4 + 60c: 5cbd a7ff e4by r20,r12,r13,0x7,0x7,0x7,0x7 diff --git a/gas/testsuite/gas/arc/nps400-6.s b/gas/testsuite/gas/arc/nps400-6.s index 797097d..19b0fbe 100644 --- a/gas/testsuite/gas/arc/nps400-6.s +++ b/gas/testsuite/gas/arc/nps400-6.s @@ -143,7 +143,7 @@ bdlen.f r1, r3, 256 bdlen.f r12, r13 - .macro cscb_test mnem + .macro csma_like_test mnem \mnem\() r10,r12,r20 \mnem\() r0,0x12345678,r20 \mnem\() r6,r7,0xffffffff @@ -157,10 +157,16 @@ \mnem\() 0,0xffffffff,0x1 .endm - cscb_test csma - cscb_test csms - cscb_test cbba - cscb_test cbba.f + csma_like_test csma + csma_like_test csms + csma_like_test cbba + csma_like_test cbba.f + csma_like_test tr + csma_like_test tr.f + csma_like_test utf8 + csma_like_test utf8.f + csma_like_test addf + csma_like_test addf.f .macro zncv_test mnem \mnem\() r10,r12,r20 @@ -186,3 +192,19 @@ hofs r7, r8, 240, 0 hofs.f r7, r8, 0, 1 + hash r1, r2, r3, 1, 0, 0, 0 + hash r12, r13, r14, 32, 7, 1, 1 + + .macro hash_p_test mnem + \mnem\() r1, r2, r3, 1, 1, 0, 0 + \mnem\() r12, r13, r14, 32, 8, 3, 1 + .endm + + hash_p_test hash.p0 + hash_p_test hash.p1 + hash_p_test hash.p2 + hash_p_test hash.p3 + + e4by r0,r1,r2,0,0,0,4 + e4by r7,r12,r13,1,2,3,4 + e4by r20,r12,r13,7,7,7,7 diff --git a/include/opcode/arc.h b/include/opcode/arc.h index b71c2f5..adbae74 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -49,6 +49,7 @@ typedef enum BITOP, NET, ACL, + DPI, } insn_class_t; /* Instruction Subclass. */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6b54926..0c39a6d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2016-06-13 Graham Markall <graham.markall@embecosm.com> + * arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf + * arc-opc.c: Add flag classes, insert/extract functions, and operands to + support the above instructions. + +2016-06-13 Graham Markall <graham.markall@embecosm.com> + * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb, imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms, csma, cbba, zncv, and hofs. diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h index fe6a195..233e441 100644 --- a/opcodes/arc-nps400-tbl.h +++ b/opcodes/arc-nps400-tbl.h @@ -386,6 +386,123 @@ ADDL_LIKE ("xorl", 0xE, NPS_UIMM16) /* dcacl<.f> a,b,c 00111bbb001001010bbbccccccaaaaaa */ { "dcacl", 0x38250000, 0xf8ff0000, ARC_OPCODE_NPS400, ACL, NONE, { RA, RB, RC }, { C_F }}, +/**** DPI Instructions ****/ + +/* hash dst,src1,src2,width,perm,nonlinear,basemat */ +{ "hash", 0x58180000, 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_HASH_WIDTH, NPS_HASH_PERM, NPS_HASH_NONLINEAR, NPS_HASH_BASEMAT }, { 0 }}, + +/* hash.pN dst,src1,src2,width,len,ofs,basemat */ + +#define HASH_P(FUNC, SUBOP2) \ + { "hash", (0x58100000 | (SUBOP2 << 16)), 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_HASH_WIDTH, NPS_HASH_LEN, NPS_HASH_OFS, NPS_HASH_BASEMAT2 }, { C_NPS_P##FUNC }}, + +HASH_P(0, 0x9) +HASH_P(1, 0xA) +HASH_P(2, 0xB) +HASH_P(3, 0xC) + +/* tr<.f> a,b,c 00111bbb00100001FBBBCCCCCCAAAAAA */ +{ "tr", 0x38210000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }}, + +/* tr<.f> a,limm,c 0011111000100001F111CCCCCCAAAAAA */ +{ "tr", 0x3e217000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }}, + +/* tr<.f> a,b,u6 00111bbb01100001FBBBuuuuuuAAAAAA */ +{ "tr", 0x38610000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }}, + +/* tr<.f> 0,b,c 00111bbb00100001FBBBCCCCCC111110 */ +{ "tr", 0x3821003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }}, + +/* tr<.f> 0,limm,c 0011111000100001F111CCCCCC111110 */ +{ "tr", 0x3e21703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }}, + +/* tr<.f> 0,b,u6 00111bbb01100001FBBBuuuuuu111110 */ +{ "tr", 0x3861003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }}, + +/* tr<.f> 0,b,limm 00111bbb00100001FBBB111110111110 */ +{ "tr", 0x38210fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }}, + +/* tr<.f> a,b,limm 00111bbb00100001FBBB111110AAAAAA */ +{ "tr", 0x38210f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }}, + +/* tr<.f> a,limm,limm 0011111000100001F111111110AAAAAA */ +{ "tr", 0x3e217f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }}, + +/* tr<.f> a,limm,u6 0011111001100001F111uuuuuuAAAAAA */ +{ "tr", 0x3e617000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }}, + +/* tr<.f> 0,limm,u6 0011111001100001F111uuuuuu111110 */ +{ "tr", 0x3e61703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }}, + +/* utf8 a,b,c 00111bbb00100011FBBBCCCCCCAAAAAA */ +{ "utf8", 0x38220000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }}, + +/* utf8 a,limm,c 0011111000100011F111CCCCCCAAAAAA */ +{ "utf8", 0x3e227000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }}, + +/* utf8 a,b,u6 00111bbb01100011FBBBuuuuuuAAAAAA */ +{ "utf8", 0x38620000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }}, + +/* utf8 0,b,c 00111bbb00100011FBBBCCCCCC111110 */ +{ "utf8", 0x3822003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }}, + +/* utf8 0,limm,c 0011111000100011F111CCCCCC111110 */ +{ "utf8", 0x3e22703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }}, + +/* utf8 0,b,u6 00111bbb01100011FBBBuuuuuu111110 */ +{ "utf8", 0x3862003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }}, + +/* utf8 0,b,limm 00111bbb00100011FBBB111110111110 */ +{ "utf8", 0x38220fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }}, + +/* utf8 a,b,limm 00111bbb00100011FBBB111110AAAAAA */ +{ "utf8", 0x38220f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }}, + +/* utf8 a,limm,limm 0011111000100011F111111110AAAAAA */ +{ "utf8", 0x3e227f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }}, + +/* utf8 a,limm,u6 0011111001100011F111uuuuuuAAAAAA */ +{ "utf8", 0x3e627000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }}, + +/* utf8 0,limm,u6 0011111001100011F111uuuuuu111110 */ +{ "utf8", 0x3e62703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }}, + +/* e4by dst,src1,src2,index0,index1,index2,index3 */ +{ "e4by", 0x581d0000, 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_E4BY_INDEX0, NPS_E4BY_INDEX1, NPS_E4BY_INDEX2, NPS_E4BY_INDEX3 }, { 0 }}, + +/* addf<.f> a,b,c 00111bbb00100011FBBBCCCCCCAAAAAA */ +{ "addf", 0x38230000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }}, + +/* addf<.f> a,limm,c 0011111000100011F111CCCCCCAAAAAA */ +{ "addf", 0x3e237000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }}, + +/* addf<.f> a,b,u6 00111bbb01100011FBBBuuuuuuAAAAAA */ +{ "addf", 0x38630000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }}, + +/* addf<.f> 0,b,c 00111bbb00100011FBBBCCCCCC111110 */ +{ "addf", 0x3823003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }}, + +/* addf<.f> 0,limm,c 0011111000100011F111CCCCCC111110 */ +{ "addf", 0x3e23703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }}, + +/* addf<.f> 0,b,u6 00111bbb01100011FBBBuuuuuu111110 */ +{ "addf", 0x3863003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }}, + +/* addf<.f> 0,b,limm 00111bbb00100011FBBB111110111110 */ +{ "addf", 0x38230fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }}, + +/* addf<.f> a,b,limm 00111bbb00100011FBBB111110AAAAAA */ +{ "addf", 0x38230f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }}, + +/* addf<.f> a,limm,limm 0011111000100011F111111110AAAAAA */ +{ "addf", 0x3e237f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }}, + +/* addf<.f> a,limm,u6 0011111001100011F111uuuuuuAAAAAA */ +{ "addf", 0x3e637000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }}, + +/* addf<.f> 0,limm,u6 0011111001100011F111uuuuuu111110 */ +{ "addf", 0x3e63703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }}, + /**** Pipeline Control Instructions ****/ /* schd<.rw|.rd> */ diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 7e0ba46..f706ffa 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -940,13 +940,13 @@ extract_nps_##NAME##_pos (unsigned insn ATTRIBUTE_UNUSED, \ MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src2, 12) MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src1, 10) -#define MAKE_SIZE_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT)\ +#define MAKE_BIAS_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT)\ static unsigned \ -insert_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \ - int value ATTRIBUTE_UNUSED, \ - const char **errmsg ATTRIBUTE_UNUSED) \ +insert_nps_##NAME (unsigned insn ATTRIBUTE_UNUSED, \ + int value ATTRIBUTE_UNUSED, \ + const char **errmsg ATTRIBUTE_UNUSED) \ { \ - if (value < LOWER || value > 32) \ + if (value < LOWER || value > UPPER) \ { \ *errmsg = _("Invalid size, value must be " \ #LOWER " to " #UPPER "."); \ @@ -958,20 +958,23 @@ insert_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \ } \ \ static int \ -extract_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \ - bfd_boolean * invalid ATTRIBUTE_UNUSED) \ +extract_nps_##NAME (unsigned insn ATTRIBUTE_UNUSED, \ + bfd_boolean * invalid ATTRIBUTE_UNUSED) \ { \ return ((insn >> SHIFT) & ((1 << BITS) - 1)) + BIAS; \ } -MAKE_SIZE_INSERT_EXTRACT_FUNCS(addb,2,32,5,1,5) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(andb,1,32,5,1,5) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(fxorb,8,32,5,8,5) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(wxorb,16,32,5,16,5) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop,1,32,5,1,10) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(qcmp,1,8,3,1,9) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop1,1,32,5,1,20) -MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop2,1,32,5,1,25) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(addb_size,2,32,5,1,5) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(andb_size,1,32,5,1,5) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(fxorb_size,8,32,5,8,5) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(wxorb_size,16,32,5,16,5) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop_size,1,32,5,1,10) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(qcmp_size,1,8,3,1,9) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop1_size,1,32,5,1,20) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop2_size,1,32,5,1,25) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(hash_width,1,32,5,1,6) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(hash_len,1,8,3,1,2) +MAKE_BIAS_INSERT_EXTRACT_FUNCS(index3,4,7,2,4,0) static int extract_nps_qcmp_m3 (unsigned insn ATTRIBUTE_UNUSED, @@ -1372,6 +1375,18 @@ const struct arc_flag_operand arc_flag_operands[] = #define F_NPS_ZNCV_WR (F_NPS_ZNCV_RD + 1) { "wr", 1, 1, 15, 1 }, + +#define F_NPS_P0 (F_NPS_ZNCV_WR + 1) + { "p0", 0, 0, 0, 1 }, + +#define F_NPS_P1 (F_NPS_P0 + 1) + { "p1", 0, 0, 0, 1 }, + +#define F_NPS_P2 (F_NPS_P1 + 1) + { "p2", 0, 0, 0, 1 }, + +#define F_NPS_P3 (F_NPS_P2 + 1) + { "p3", 0, 0, 0, 1 }, }; const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands); @@ -1484,6 +1499,18 @@ const struct arc_flag_class arc_flag_classes[] = #define C_NPS_ZNCV (C_NPS_S + 1) { F_CLASS_REQUIRED, { F_NPS_ZNCV_RD, F_NPS_ZNCV_WR, F_NULL}}, + +#define C_NPS_P0 (C_NPS_ZNCV + 1) + { F_CLASS_REQUIRED, { F_NPS_P0, F_NULL }}, + +#define C_NPS_P1 (C_NPS_P0 + 1) + { F_CLASS_REQUIRED, { F_NPS_P1, F_NULL }}, + +#define C_NPS_P2 (C_NPS_P1 + 1) + { F_CLASS_REQUIRED, { F_NPS_P2, F_NULL }}, + +#define C_NPS_P3 (C_NPS_P2 + 1) + { F_CLASS_REQUIRED, { F_NPS_P3, F_NULL }}, }; const unsigned char flags_none[] = { 0 }; @@ -1980,6 +2007,46 @@ const struct arc_operand arc_operands[] = #define NPS_PSBC (NPS_MIN_HOFS + 1) { 1, 11, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_DPI_DST (NPS_PSBC + 1) + { 5, 11, 0, ARC_OPERAND_IR, NULL, NULL }, + + /* NPS_DPI_SRC1_3B is similar to NPS_R_SRC1_3B but doesn't duplicate an operand */ +#define NPS_DPI_SRC1_3B (NPS_DPI_DST + 1) + { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_dst, extract_nps_3bit_dst }, + +#define NPS_HASH_WIDTH (NPS_DPI_SRC1_3B + 1) + { 5, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_width, extract_nps_hash_width }, + +#define NPS_HASH_PERM (NPS_HASH_WIDTH + 1) + { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_HASH_NONLINEAR (NPS_HASH_PERM + 1) + { 1, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_HASH_BASEMAT (NPS_HASH_NONLINEAR + 1) + { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_HASH_LEN (NPS_HASH_BASEMAT + 1) + { 3, 2, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_len, extract_nps_hash_len }, + +#define NPS_HASH_OFS (NPS_HASH_LEN + 1) + { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_HASH_BASEMAT2 (NPS_HASH_OFS + 1) + { 1, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_E4BY_INDEX0 (NPS_HASH_BASEMAT2 + 1) + { 3, 8, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_E4BY_INDEX1 (NPS_E4BY_INDEX0 + 1) + { 3, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_E4BY_INDEX2 (NPS_E4BY_INDEX1 + 1) + { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL }, + +#define NPS_E4BY_INDEX3 (NPS_E4BY_INDEX2 + 1) + { 2, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_index3, extract_nps_index3 }, }; const unsigned arc_num_operands = ARRAY_SIZE (arc_operands); |