diff options
-rw-r--r-- | sim/common/ChangeLog | 7 | ||||
-rw-r--r-- | sim/common/sim-n-bits.h | 11 | ||||
-rw-r--r-- | sim/common/sim-n-core.h | 63 |
3 files changed, 66 insertions, 15 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 237905d..e2aa248 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,10 @@ +Tue Sep 2 14:57:06 1997 Doug Evans <dje@canuck.cygnus.com> + + * Makefile.in (TAGS): Add support for "/* TAGS: foo */" marker. + * sim-n-bits.h: Add TAGS comments for all functions. + * sim-n-core.h: Likewise. + * sim-n-endian.h: Likewise. + Mon Sep 1 10:50:11 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-utils.c (sim_state_alloc): Set CPU backlinks, callback and diff --git a/sim/common/sim-n-bits.h b/sim/common/sim-n-bits.h index 85184e7..0843af3 100644 --- a/sim/common/sim-n-bits.h +++ b/sim/common/sim-n-bits.h @@ -26,7 +26,7 @@ #include "sim-xcat.h" -#ifdef __STDC__ +#if defined(__STDC__) && defined(signed) /* If signed were defined to be say __signed (ie, some versions of Linux), then the signedN macro would not work correctly. If we have a standard compiler, we have signed. */ @@ -49,6 +49,7 @@ #define ROTRn XCONCAT2(ROTR,N) #define SEXTn XCONCAT2(SEXT,N) +/* TAGS: MASKED16 MASKED32 MASKED64 */ INLINE_SIM_BITS\ (unsignedN) @@ -59,6 +60,7 @@ MASKEDn (unsignedN word, return (word & MASKn (start, stop)); } +/* TAGS: LSMASKED16 LSMASKED32 LSMASKED64 */ INLINE_SIM_BITS\ (unsignedN) @@ -68,6 +70,7 @@ LSMASKEDn (unsignedN word, return (word & LSMASKn (nr_bits)); } +/* TAGS: MSMASKED16 MSMASKED32 MSMASKED64 */ INLINE_SIM_BITS\ (unsignedN) @@ -77,6 +80,7 @@ MSMASKEDn (unsignedN word, return (word & MSMASKn (nr_bits)); } +/* TAGS: EXTRACTED16 EXTRACTED32 EXTRACTED64 */ INLINE_SIM_BITS\ (unsignedN) @@ -89,6 +93,7 @@ EXTRACTEDn (unsignedN val, return val; } +/* TAGS: INSERTED16 INSERTED32 INSERTED64 */ INLINE_SIM_BITS\ (unsignedN) @@ -101,6 +106,7 @@ INSERTEDn (unsignedN val, return val; } +/* TAGS: ROT16 ROT32 ROT64 */ INLINE_SIM_BITS\ (unsignedN) @@ -115,6 +121,7 @@ ROTn (unsignedN val, return val; } +/* TAGS: ROTL16 ROTL32 ROTL64 */ INLINE_SIM_BITS\ (unsignedN) @@ -127,6 +134,7 @@ ROTLn (unsignedN val, return result; } +/* TAGS: ROTR16 ROTR32 ROTR64 */ INLINE_SIM_BITS\ (unsignedN) @@ -139,6 +147,7 @@ ROTRn (unsignedN val, return result; } +/* TAGS: SEXT16 SEXT32 SEXT64 */ INLINE_SIM_BITS\ (unsignedN) diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h index 614a32f..4aefd2d 100644 --- a/sim/common/sim-n-core.h +++ b/sim/common/sim-n-core.h @@ -35,6 +35,9 @@ #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N) #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N) +/* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */ +/* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */ +/* TAGS: sim_core_read_aligned_word */ INLINE_SIM_CORE(unsigned_N) sim_core_read_aligned_N(sim_cpu *cpu, @@ -72,16 +75,30 @@ sim_core_read_aligned_N(sim_cpu *cpu, #endif val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr)); if (TRACE_P (cpu, TRACE_CORE_IDX)) - trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%lx\n", - __LINE__, - sizeof (unsigned_N), - sim_core_map_to_str (map), - (unsigned long) addr, - (unsigned long) val); + if (sizeof (unsigned_N) > 4) + trace_printf (CPU_STATE (cpu), cpu, + "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%08lx%08lx\n", + __LINE__, + sizeof (unsigned_N), + sim_core_map_to_str (map), + (unsigned long) addr, + (unsigned long) (((unsigned64)(val)) >> 32), + (unsigned long) val); + else + trace_printf (CPU_STATE (cpu), cpu, + "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%0*lx\n", + __LINE__, + sizeof (unsigned_N), + sim_core_map_to_str (map), + (unsigned long) addr, + sizeof (unsigned_N) * 2, + (unsigned long) val); return val; } +/* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */ +/* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */ +/* TAGS: sim_core_read_unaligned_word */ INLINE_SIM_CORE(unsigned_N) sim_core_read_unaligned_N(sim_cpu *cpu, @@ -130,6 +147,9 @@ sim_core_read_unaligned_N(sim_cpu *cpu, } } +/* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */ +/* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */ +/* TAGS: sim_core_write_aligned_word */ INLINE_SIM_CORE(void) sim_core_write_aligned_N(sim_cpu *cpu, @@ -168,15 +188,29 @@ sim_core_write_aligned_N(sim_cpu *cpu, #endif *(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val); if (TRACE_P (cpu, TRACE_CORE_IDX)) - trace_printf (CPU_STATE (cpu), cpu, - "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%lx\n", - __LINE__, - sizeof (unsigned_N), - sim_core_map_to_str (map), - (unsigned long) addr, - (unsigned long) val); + if (sizeof (unsigned_N) > 4) + trace_printf (CPU_STATE (cpu), cpu, + "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%08lx%08lx\n", + __LINE__, + sizeof (unsigned_N), + sim_core_map_to_str (map), + (unsigned long) addr, + (unsigned long) (((unsigned64)(val)) >> 32), + (unsigned long) val); + else + trace_printf (CPU_STATE (cpu), cpu, + "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%0*lx\n", + __LINE__, + sizeof (unsigned_N), + sim_core_map_to_str (map), + (unsigned long) addr, + sizeof (unsigned_N) * 2, + (unsigned long) val); } +/* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */ +/* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */ +/* TAGS: sim_core_write_unaligned_word */ INLINE_SIM_CORE(void) sim_core_write_unaligned_N(sim_cpu *cpu, @@ -212,6 +246,7 @@ sim_core_write_unaligned_N(sim_cpu *cpu, } case FORCED_ALIGNMENT: sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val); + break; case MIXED_ALIGNMENT: sim_engine_abort (CPU_STATE (cpu), cpu, cia, "internal error - %s - mixed alignment", |