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-rw-r--r--bfd/ChangeLog5
-rw-r--r--bfd/elfnn-aarch64.c2
-rw-r--r--gas/ChangeLog12
-rw-r--r--gas/config/tc-aarch64.c71
-rw-r--r--gas/testsuite/ChangeLog9
-rw-r--r--gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d9
-rw-r--r--gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.s5
-rw-r--r--gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d8
-rw-r--r--gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.s5
-rw-r--r--gas/testsuite/gas/aarch64/tls-desc.d17
-rw-r--r--gas/testsuite/gas/aarch64/tls-desc.s16
11 files changed, 158 insertions, 1 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index bad620e..87aae5e 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,10 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
+ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
+ BFD_RELOC_AARCH64_TLSDESC_OFF_G1.
+
+2015-10-02 Renlin Li <renlin.li@arm.com>
+
* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
(aarch64_tls_transition_without_check): Likewise
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index cff77ce..18ca46f 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1616,7 +1616,7 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
- complain_overflow_dont, /* complain_on_overflow */
+ complain_overflow_unsigned, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSDESC_OFF_G1), /* name */
FALSE, /* partial_inplace */
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 38175b1..2ece5c0 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,17 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
+ * config/tc-aarch64.c (s_tlsdescadd): New.
+ (s_tlsdescldr): New.
+ (md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
+ (reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
+ BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
+ (process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
+ AARCH64_TLSDESC_OFF_G0_NC.
+ (md_apply_fix): Likewise.
+ (aarch64_force_relocation): Likewise.
+
+2015-10-02 Renlin Li <renlin.li@arm.com>
+
* config/tc-aarch64.c (reloc_table): Add two entries for
gottprel_g0_nc and gottprel_g1.
(process_movw_reloc_info): Add support.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 8d6f1f9..a0cf976 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -1892,6 +1892,21 @@ s_aarch64_inst (int ignored ATTRIBUTE_UNUSED)
}
#ifdef OBJ_ELF
+/* Emit BFD_RELOC_AARCH64_TLSDESC_ADD on the next ADD instruction. */
+
+static void
+s_tlsdescadd (int ignored ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+
+ expression (&exp);
+ frag_grow (4);
+ fix_new_aarch64 (frag_now, frag_more (0) - frag_now->fr_literal, 4, &exp, 0,
+ BFD_RELOC_AARCH64_TLSDESC_ADD);
+
+ demand_empty_rest_of_line ();
+}
+
/* Emit BFD_RELOC_AARCH64_TLSDESC_CALL on the next BLR instruction. */
static void
@@ -1911,6 +1926,21 @@ s_tlsdesccall (int ignored ATTRIBUTE_UNUSED)
demand_empty_rest_of_line ();
}
+
+/* Emit BFD_RELOC_AARCH64_TLSDESC_LDR on the next LDR instruction. */
+
+static void
+s_tlsdescldr (int ignored ATTRIBUTE_UNUSED)
+{
+ expressionS exp;
+
+ expression (&exp);
+ frag_grow (4);
+ fix_new_aarch64 (frag_now, frag_more (0) - frag_now->fr_literal, 4, &exp, 0,
+ BFD_RELOC_AARCH64_TLSDESC_LDR);
+
+ demand_empty_rest_of_line ();
+}
#endif /* OBJ_ELF */
static void s_aarch64_arch (int);
@@ -1936,7 +1966,9 @@ const pseudo_typeS md_pseudo_table[] = {
{"arch_extension", s_aarch64_arch_extension, 0},
{"inst", s_aarch64_inst, 0},
#ifdef OBJ_ELF
+ {"tlsdescadd", s_tlsdescadd, 0},
{"tlsdesccall", s_tlsdesccall, 0},
+ {"tlsdescldr", s_tlsdescldr, 0},
{"word", s_aarch64_elf_cons, 4},
{"long", s_aarch64_elf_cons, 4},
{"xword", s_aarch64_elf_cons, 8},
@@ -2648,6 +2680,24 @@ static struct reloc_table_entry reloc_table[] = {
0,
0},
+ /* Lower 16 bit offset into GOT entry for a symbol */
+ {"tlsdesc_off_g0_nc", 0,
+ 0, /* adr_type */
+ 0,
+ BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC,
+ 0,
+ 0,
+ 0},
+
+ /* Higher 16 bit offset into GOT entry for a symbol */
+ {"tlsdesc_off_g1", 0,
+ 0, /* adr_type */
+ 0,
+ BFD_RELOC_AARCH64_TLSDESC_OFF_G1,
+ 0,
+ 0,
+ 0},
+
/* Get to the page containing GOT TLS entry for a symbol */
{"gottprel", 0,
0, /* adr_type */
@@ -4723,6 +4773,7 @@ process_movw_reloc_info (void)
case BFD_RELOC_AARCH64_MOVW_G0_NC:
case BFD_RELOC_AARCH64_MOVW_G0_S:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC:
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
@@ -4735,6 +4786,7 @@ process_movw_reloc_info (void)
case BFD_RELOC_AARCH64_MOVW_G1_NC:
case BFD_RELOC_AARCH64_MOVW_G1_S:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_MOVW_G1:
case BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1:
case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
@@ -6859,6 +6911,22 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
scale = 16;
goto movw_common;
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
+ scale = 0;
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ /* Should always be exported to object file, see
+ aarch64_force_relocation(). */
+ gas_assert (!fixP->fx_done);
+ gas_assert (seg->use_rela_p);
+ goto movw_common;
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
+ scale = 16;
+ S_SET_THREAD_LOCAL (fixP->fx_addsy);
+ /* Should always be exported to object file, see
+ aarch64_force_relocation(). */
+ gas_assert (!fixP->fx_done);
+ gas_assert (seg->use_rela_p);
+ goto movw_common;
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G2_NC:
case BFD_RELOC_AARCH64_MOVW_G2_S:
@@ -6888,6 +6956,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_MOVW_G2:
case BFD_RELOC_AARCH64_MOVW_G3:
case BFD_RELOC_AARCH64_MOVW_GOTOFF_G1:
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
if (unsigned_overflow (value, scale + 16))
as_bad_where (fixP->fx_file, fixP->fx_line,
_("unsigned value out of range"));
@@ -7185,6 +7254,8 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC:
case BFD_RELOC_AARCH64_TLSDESC_LD_PREL19:
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC:
+ case BFD_RELOC_AARCH64_TLSDESC_OFF_G1:
case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSGD_ADR_PREL21:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index ce49c44..ba63994 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,14 @@
2015-10-02 Renlin Li <renlin.li@arm.com>
+ * gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
+ * gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
+ * gas/aarch64/reloc-tlsdesc_off_g1.d: New.
+ * gas/aarch64/reloc-tlsdesc_off_g1.s: New.
+ * gas/aarch64/tls-desc.d: New.
+ * gas/aarch64/tls-desc.s: New.
+
+2015-10-02 Renlin Li <renlin.li@arm.com>
+
* gas/aarch64/reloc-gottprel_g0_nc.d: New.
* gas/aarch64/reloc-gottprel_g0_nc.s: New.
* gas/aarch64/reloc-gottprel_g1.d: New.
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
new file mode 100644
index 0000000..3d3c548
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: f280001c movk x28, #0x0
+ 0: R_AARCH64_TLSDESC_OFF_G0_NC x
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.s b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.s
new file mode 100644
index 0000000..1c8a208
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g0_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- tlsdesc_off_g0_nc
+
+func:
+ // BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
+ movk x28, #:tlsdesc_off_g0_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
new file mode 100644
index 0000000..4fc1082
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.d
@@ -0,0 +1,8 @@
+#objdump: -dr
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: d2a0001c movz x28, #0x0, lsl #16
+ 0: R_AARCH64_TLSDESC_OFF_G1 x
diff --git a/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.s b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.s
new file mode 100644
index 0000000..5b3ec7f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-tlsdesc_off_g1.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- tlsdesc_off_g1
+
+func:
+ // BFD_RELOC_AARCH64_TLSDESC_OFF_G1
+ movz x28, #:tlsdesc_off_g1:x
diff --git a/gas/testsuite/gas/aarch64/tls-desc.d b/gas/testsuite/gas/aarch64/tls-desc.d
new file mode 100644
index 0000000..751e797
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tls-desc.d
@@ -0,0 +1,17 @@
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+ 0: d2a00000 movz x0, #0x0, lsl #16
+ 0: R_AARCH64_TLSDESC_OFF_G1 var
+ 4: f2800000 movk x0, #0x0
+ 4: R_AARCH64_TLSDESC_OFF_G0_NC var
+ 8: f8606a41 ldr x1, \[x18,x0\]
+ 8: R_AARCH64_TLSDESC_LDR var
+ c: 8b000240 add x0, x18, x0
+ c: R_AARCH64_TLSDESC_ADD var
+ 10: d63f0020 blr x1
+ 10: R_AARCH64_TLSDESC_CALL var
diff --git a/gas/testsuite/gas/aarch64/tls-desc.s b/gas/testsuite/gas/aarch64/tls-desc.s
new file mode 100644
index 0000000..fb9995e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/tls-desc.s
@@ -0,0 +1,16 @@
+func:
+
+ // R_AARCH64_TLSDESC_0FF_G1 var
+ movz x0, #:tlsdesc_off_g1:var
+ // R_AARCH64_TLSDESC_OFF_G0_NC var
+ movk x0, #:tlsdesc_off_g0_nc:var
+
+ .tlsdescldr var
+ // R_AARCH64_TLSDESC_LDR var
+ ldr x1, [x18, x0]
+ .tlsdescadd var
+ // R_AARCH64_TLSDESC_ADD var
+ add x0, x18, x0
+ .tlsdesccall var
+ // R_AARCH64_TLSDESC_CALL var
+ blr x1
generated by cgit v1.1 at 2024-11-23 13:37:34 +0000