aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--bfd/ChangeLog15
-rw-r--r--bfd/Makefile.am7
-rw-r--r--bfd/Makefile.in8
-rw-r--r--bfd/archures.c3
-rw-r--r--bfd/bfd-in2.h25
-rw-r--r--bfd/coff-tic54x.c680
-rw-r--r--bfd/coffcode.h91
-rw-r--r--bfd/config.bfd7
-rwxr-xr-xbfd/configure6
-rw-r--r--bfd/configure.in6
-rw-r--r--bfd/cpu-tic54x.c39
-rw-r--r--bfd/libbfd.h5
-rw-r--r--bfd/reloc.c35
-rw-r--r--bfd/targets.c12
-rw-r--r--include/coff/ChangeLog6
-rw-r--r--include/coff/internal.h4
-rw-r--r--include/coff/ti.h431
-rw-r--r--include/coff/tic54x.h11
18 files changed, 1382 insertions, 9 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a1f2d4f..ab63a35 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,18 @@
+2000-04-07 Timothy Wall <twall@cygnus.com>
+
+ * targets.c: Added vecs for tic54x.
+ * reloc.c: Added relocs for tic54x.
+ * libbfd.h: Regenerated.
+ * configure: Add TI COFF vecs for tic54x.
+ * configure.in: Ditto.
+ * config.bfd (targ_cpu): Recognize new tic54x target.
+ * coffcode.h (coff_slurp_symbol_table): Additions for TI COFF handling.
+ * bfd-in2.h: Add tic54x target and relocations.
+ * Makefile.am, Makefile.in: Add tic54x target.
+ * archures.c (bfd_archures_list): Add tic54x target.
+ * coff-tic54x.c: New.
+ * cpu-tic54x.c: New.
+
2000-04-06 Michael Snyder <msnyder@seadog.cygnus.com>
* elfcore.h (elf_core_file_p): call backend_object_p which
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index b8537db..b3a157a 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -66,6 +66,7 @@ ALL_MACHINES = \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
+ cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
@@ -103,6 +104,7 @@ ALL_MACHINES_CFILES = \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
+ cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
@@ -145,6 +147,7 @@ BFD32_BACKENDS = \
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
+ coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
coff-we32k.lo \
@@ -275,6 +278,7 @@ BFD32_BACKENDS_CFILES = \
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
+ coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
coff-we32k.c \
@@ -715,6 +719,7 @@ cpu-sh.lo: cpu-sh.c
cpu-sparc.lo: cpu-sparc.c
cpu-tic30.lo: cpu-tic30.c
cpu-tic80.lo: cpu-tic80.c
+cpu-tic54x.lo: cpu-tic54x.c
cpu-v850.lo: cpu-v850.c
cpu-vax.lo: cpu-vax.c
cpu-we32k.lo: cpu-we32k.c
@@ -809,6 +814,8 @@ coff-tic30.lo: coff-tic30.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic30.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic54x.h \
+ $(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
$(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
coffcode.h coffswap.h
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index faa8459..b229d16 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -184,6 +184,7 @@ ALL_MACHINES = \
cpu-sh.lo \
cpu-sparc.lo \
cpu-tic30.lo \
+ cpu-tic54x.lo \
cpu-tic80.lo \
cpu-v850.lo \
cpu-vax.lo \
@@ -222,6 +223,7 @@ ALL_MACHINES_CFILES = \
cpu-sh.c \
cpu-sparc.c \
cpu-tic30.c \
+ cpu-tic54x.c \
cpu-tic80.c \
cpu-v850.c \
cpu-vax.c \
@@ -265,6 +267,7 @@ BFD32_BACKENDS = \
coff-stgo32.lo \
coff-svm68k.lo \
coff-tic30.lo \
+ coff-tic54x.lo \
coff-tic80.lo \
coff-u68k.lo \
coff-we32k.lo \
@@ -396,6 +399,7 @@ BFD32_BACKENDS_CFILES = \
coff-stgo32.c \
coff-svm68k.c \
coff-tic30.c \
+ coff-tic54x.c \
coff-tic80.c \
coff-u68k.c \
coff-we32k.c \
@@ -1262,6 +1266,7 @@ cpu-sh.lo: cpu-sh.c
cpu-sparc.lo: cpu-sparc.c
cpu-tic30.lo: cpu-tic30.c
cpu-tic80.lo: cpu-tic80.c
+cpu-tic54x.lo: cpu-tic54x.c
cpu-v850.lo: cpu-v850.c
cpu-vax.lo: cpu-vax.c
cpu-we32k.lo: cpu-we32k.c
@@ -1356,6 +1361,9 @@ coff-tic30.lo: coff-tic30.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic30.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
coff-tic80.lo: coff-tic80.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/tic80.h \
$(INCDIR)/coff/internal.h libcoff.h coffcode.h coffswap.h
+coff-tic54x.lo: coff-tic54x.c $(INCDIR)/bfdlink.h $(INCDIR)/coff/ti.h \
+ $(INCDIR)/coff/tic54x.h $(INCDIR)/coff/internal.h \
+ libcoff.h coffcode.h coffswap.h
coff-u68k.lo: coff-u68k.c coff-m68k.c $(INCDIR)/coff/m68k.h \
$(INCDIR)/coff/internal.h libcoff.h $(INCDIR)/bfdlink.h \
coffcode.h coffswap.h
diff --git a/bfd/archures.c b/bfd/archures.c
index 7462592..d24ee82 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -181,6 +181,7 @@ DESCRIPTION
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
+. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
.#define bfd_mach_v850 0
@@ -267,6 +268,7 @@ extern const bfd_arch_info_type bfd_pj_arch;
extern const bfd_arch_info_type bfd_sh_arch;
extern const bfd_arch_info_type bfd_sparc_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
+extern const bfd_arch_info_type bfd_tic54x_arch;
extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
@@ -307,6 +309,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_sh_arch,
&bfd_sparc_arch,
&bfd_tic30_arch,
+ &bfd_tic54x_arch,
&bfd_tic80_arch,
&bfd_vax_arch,
&bfd_we32k_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 68e2db5..06276d3 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1407,6 +1407,7 @@ enum bfd_architecture
bfd_arch_ns32k, /* National Semiconductors ns32000 */
bfd_arch_w65, /* WDC 65816 */
bfd_arch_tic30, /* Texas Instruments TMS320C30 */
+ bfd_arch_tic54x, /* Texas Instruments TMS320C54X */
bfd_arch_tic80, /* TI TMS320c80 (MVP) */
bfd_arch_v850, /* NEC V850 */
#define bfd_mach_v850 0
@@ -2281,6 +2282,30 @@ significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode. */
BFD_RELOC_TIC30_LDP,
+/* This is a 7bit reloc for the tms320c54x, where the least
+significant 7 bits of a 16 bit word are placed into the least
+significant 7 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTLS7,
+
+/* This is a 9bit DP reloc for the tms320c54x, where the most
+significant 9 bits of a 16 bit word are placed into the least
+significant 9 bits of the opcode. */
+ BFD_RELOC_TIC54X_PARTMS9,
+
+/* This is an extended address 23-bit reloc for the tms320c54x. */
+ BFD_RELOC_TIC54X_23,
+
+/* This is a 16-bit reloc for the tms320c54x, where the least
+significant 16 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_16_OF_23,
+
+/* This is a reloc for the tms320c54x, where the most
+significant 7 bits of a 23-bit extended address are placed into
+the opcode. */
+ BFD_RELOC_TIC54X_MS7_OF_23,
+
+
/* This is a 48 bit reloc for the FR30 that stores 32 bits. */
BFD_RELOC_FR30_48,
diff --git a/bfd/coff-tic54x.c b/bfd/coff-tic54x.c
new file mode 100644
index 0000000..f67343a
--- /dev/null
+++ b/bfd/coff-tic54x.c
@@ -0,0 +1,680 @@
+/* BFD back-end for TMS320C54X coff binaries.
+ Copyright (C) 1998 Free Software Foundation, Inc.
+ Contributed by Steven Haworth (steve@pm.cse.rmit.edu.au)
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+#include "bfdlink.h"
+#include "coff/tic54x.h"
+#include "coff/internal.h"
+#include "libcoff.h"
+
+#undef F_LSYMS
+#define F_LSYMS F_LSYMS_TICOFF
+
+/*
+ 32-bit operations
+ The octet order is screwy. words are LSB first (LS octet, actually), but
+ longwords are MSW first. For example, 0x12345678 is encoded 0x5678 in the
+ first word and 0x1234 in the second. When looking at the data as stored in
+ the COFF file, you would see the octets ordered as 0x78, 0x56, 0x34, 0x12.
+ Don't bother with 64-bits, as there aren't any.
+ */
+static bfd_vma
+tic54x_getl32(addr)
+ register const bfd_byte *addr;
+{
+ unsigned long v;
+ v = (unsigned long) addr[2];
+ v |= (unsigned long) addr[3] << 8;
+ v |= (unsigned long) addr[0] << 16;
+ v |= (unsigned long) addr[1] << 24;
+ return (bfd_vma) v;
+}
+
+static void
+tic54x_putl32 (data, addr)
+ bfd_vma data;
+ register bfd_byte *addr;
+{
+ addr[2] = (bfd_byte)data;
+ addr[3] = (bfd_byte)(data >> 8);
+ addr[0] = (bfd_byte)(data >> 16);
+ addr[1] = (bfd_byte)(data >> 24);
+}
+
+bfd_signed_vma
+tic54x_getl_signed_32 (addr)
+ register const bfd_byte *addr;
+{
+ unsigned long v;
+
+ v = (unsigned long) addr[2];
+ v |= (unsigned long) addr[3] << 8;
+ v |= (unsigned long) addr[0] << 16;
+ v |= (unsigned long) addr[1] << 24;
+#define COERCE32(x) \
+ ((bfd_signed_vma) (long) (((unsigned long) (x) ^ 0x80000000) - 0x80000000))
+ return COERCE32 (v);
+}
+
+static bfd_reloc_status_type
+tic54x_relocation (abfd, reloc_entry, symbol, data, input_section,
+ output_bfd, error_message)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ arelent *reloc_entry;
+ asymbol *symbol ATTRIBUTE_UNUSED;
+ PTR data ATTRIBUTE_UNUSED;
+ asection *input_section;
+ bfd *output_bfd;
+ char **error_message ATTRIBUTE_UNUSED;
+{
+
+ if (output_bfd != (bfd *) NULL)
+ {
+ /* This is a partial relocation, and we want to apply the
+ relocation to the reloc entry rather than the raw data.
+ Modify the reloc inplace to reflect what we now know. */
+ reloc_entry->address += input_section->output_offset;
+ return bfd_reloc_ok;
+ }
+ return bfd_reloc_continue;
+}
+
+reloc_howto_type tic54x_howto_table[] =
+{
+/* type,rightshift,size (0=byte, 1=short, 2=long),
+ bit size, pc_relative, bitpos, dont complain_on_overflow,
+ special_function, name, partial_inplace, src_mask, dst_mask, pcrel_offset */
+
+ /* NORMAL BANK */
+ /* 16-bit direct reference to symbol's address */
+ HOWTO (R_RELWORD,0,1,16,false,0,complain_overflow_dont,
+ tic54x_relocation,"REL16",false,0xFFFF,0xFFFF,false),
+
+ /* 7 LSBs of an address */
+ HOWTO (R_PARTLS7,0,1,7,false,0,complain_overflow_dont,
+ tic54x_relocation,"LS7",false,0x007F,0x007F,false),
+
+ /* 9 MSBs of an address */
+ /* TI assembler doesn't shift its encoding, and is thus incompatible */
+ HOWTO (R_PARTMS9,7,1,9,false,0,complain_overflow_dont,
+ tic54x_relocation,"MS9",false,0x01FF,0x01FF,false),
+
+ /* 23-bit relocation */
+ HOWTO (R_EXTWORD,0,2,23,false,0,complain_overflow_dont,
+ tic54x_relocation,"RELEXT",false,0x7FFFFF,0x7FFFFF,false),
+
+ /* 16 bits of 23-bit extended address */
+ HOWTO (R_EXTWORD16,0,1,16,false,0,complain_overflow_dont,
+ tic54x_relocation,"RELEXT16",false,0x7FFFFF,0x7FFFFF,false),
+
+ /* upper 7 bits of 23-bit extended address */
+ HOWTO (R_EXTWORDMS7,16,1,7,false,0,complain_overflow_dont,
+ tic54x_relocation,"RELEXTMS7",false,0x7F,0x7F,false),
+
+ /* ABSOLUTE BANK */
+ /* 16-bit direct reference to symbol's address, absolute */
+ HOWTO (R_RELWORD,0,1,16,false,0,complain_overflow_dont,
+ tic54x_relocation,"AREL16",false,0xFFFF,0xFFFF,false),
+
+ /* 7 LSBs of an address, absolute */
+ HOWTO (R_PARTLS7,0,1,7,false,0,complain_overflow_dont,
+ tic54x_relocation,"ALS7",false,0x007F,0x007F,false),
+
+ /* 9 MSBs of an address, absolute */
+ /* TI assembler doesn't shift its encoding, and is thus incompatible */
+ HOWTO (R_PARTMS9,7,1,9,false,0,complain_overflow_dont,
+ tic54x_relocation,"AMS9",false,0x01FF,0x01FF,false),
+
+ /* 23-bit direct reference, absolute */
+ HOWTO (R_EXTWORD,0,2,23,false,0,complain_overflow_dont,
+ tic54x_relocation,"ARELEXT",false,0x7FFFFF,0x7FFFFF,false),
+
+ /* 16 bits of 23-bit extended address, absolute */
+ HOWTO (R_EXTWORD16,0,1,16,false,0,complain_overflow_dont,
+ tic54x_relocation,"ARELEXT16",false,0x7FFFFF,0x7FFFFF,false),
+
+ /* upper 7 bits of 23-bit extended address, absolute */
+ HOWTO (R_EXTWORDMS7,16,1,7,false,0,complain_overflow_dont,
+ tic54x_relocation,"ARELEXTMS7",false,0x7F,0x7F,false),
+
+ /* 32-bit relocation exclusively for stabs */
+ HOWTO (R_RELLONG,0,2,32,false,0,complain_overflow_dont,
+ tic54x_relocation,"STAB",false,0xFFFFFFFF,0xFFFFFFFF,false),
+
+};
+
+#define coff_bfd_reloc_type_lookup tic54x_coff_reloc_type_lookup
+
+/* For the case statement use the code values used tc_gen_reloc (defined in
+ bfd/reloc.c) to map to the howto table entries */
+reloc_howto_type *
+tic54x_coff_reloc_type_lookup (abfd, code)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ bfd_reloc_code_real_type code;
+{
+ switch (code)
+ {
+ case BFD_RELOC_16:
+ return &tic54x_howto_table[0];
+ case BFD_RELOC_TIC54X_PARTLS7:
+ return &tic54x_howto_table[1];
+ case BFD_RELOC_TIC54X_PARTMS9:
+ return &tic54x_howto_table[2];
+ case BFD_RELOC_TIC54X_23:
+ return &tic54x_howto_table[3];
+ case BFD_RELOC_TIC54X_16_OF_23:
+ return &tic54x_howto_table[4];
+ case BFD_RELOC_TIC54X_MS7_OF_23:
+ return &tic54x_howto_table[5];
+ case BFD_RELOC_32:
+ return &tic54x_howto_table[12];
+ default:
+ return (reloc_howto_type *) NULL;
+ }
+}
+
+/* Code to turn a r_type into a howto ptr, uses the above howto table.
+ Called after some initial checking by the tic54x_rtype_to_howto fn below */
+static void
+tic54x_lookup_howto (internal, dst)
+ arelent *internal;
+ struct internal_reloc *dst;
+{
+ unsigned i;
+ int bank = (dst->r_symndx == -1) ? HOWTO_BANK : 0;
+ for (i = 0; i < sizeof tic54x_howto_table/sizeof tic54x_howto_table[0]; i++)
+ {
+ if (tic54x_howto_table[i].type == dst->r_type)
+ {
+ internal->howto = tic54x_howto_table + i + bank;
+ return;
+ }
+ }
+
+ (*_bfd_error_handler) (_("Unrecognized reloc type 0x%x"),
+ (unsigned int) dst->r_type);
+ abort();
+}
+
+#define RELOC_PROCESSING(RELENT,RELOC,SYMS,ABFD,SECT)\
+ tic54x_reloc_processing(RELENT,RELOC,SYMS,ABFD,SECT)
+
+static void tic54x_reloc_processing();
+
+#define coff_rtype_to_howto coff_tic54x_rtype_to_howto
+
+static reloc_howto_type *
+coff_tic54x_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ asection *sec;
+ struct internal_reloc *rel;
+ struct coff_link_hash_entry *h ATTRIBUTE_UNUSED;
+ struct internal_syment *sym ATTRIBUTE_UNUSED;
+ bfd_vma *addendp;
+{
+ arelent genrel;
+
+ if (rel->r_symndx == -1 && addendp != NULL)
+ {
+ /* This is a TI "internal relocation", which means that the relocation
+ amount is the amount by which the current section is being relocated
+ in the output section. */
+ *addendp = (sec->output_section->vma + sec->output_offset) - sec->vma;
+ }
+
+ tic54x_lookup_howto (&genrel, rel);
+
+ return genrel.howto;
+}
+
+static boolean
+ticoff0_bad_format_hook (abfd, filehdr)
+ bfd * abfd ATTRIBUTE_UNUSED;
+ PTR filehdr;
+{
+ struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
+
+ if (COFF0_BADMAG (*internal_f))
+ return false;
+
+ return true;
+}
+
+static boolean
+ticoff1_bad_format_hook (abfd, filehdr)
+ bfd * abfd ATTRIBUTE_UNUSED;
+ PTR filehdr;
+{
+ struct internal_filehdr *internal_f = (struct internal_filehdr *) filehdr;
+
+ if (COFF1_BADMAG (*internal_f))
+ return false;
+
+ return true;
+}
+
+/* replace the stock _bfd_coff_is_local_label_name to recognize TI COFF local
+ labels */
+static boolean
+ticoff_bfd_is_local_label_name (abfd, name)
+ bfd *abfd ATTRIBUTE_UNUSED;
+ const char *name;
+{
+ if (TICOFF_LOCAL_LABEL_P(name))
+ return true;
+ return false;
+}
+
+#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name
+
+/* Customize coffcode.h; the default coff_ functions are set up to use COFF2;
+ coff_bad_format_hook uses BADMAG, so set that for COFF2. The COFF1
+ and COFF0 vectors use custom _bad_format_hook procs instead of setting
+ BADMAG.
+ */
+#define BADMAG(x) COFF2_BADMAG(x)
+#include "coffcode.h"
+
+static void
+tic54x_reloc_processing (relent, reloc, symbols, abfd, section)
+ arelent *relent;
+ struct internal_reloc *reloc;
+ asymbol **symbols;
+ bfd *abfd;
+ asection *section;
+{
+ asymbol *ptr;
+
+ relent->address = reloc->r_vaddr;
+
+ if (reloc->r_symndx != -1)
+ {
+ if (reloc->r_symndx < 0 || reloc->r_symndx >= obj_conv_table_size (abfd))
+ {
+ (*_bfd_error_handler)
+ (_("%s: warning: illegal symbol index %ld in relocs"),
+ bfd_get_filename (abfd), reloc->r_symndx);
+ relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
+ ptr = NULL;
+ }
+ else
+ {
+ relent->sym_ptr_ptr = (symbols
+ + obj_convert (abfd)[reloc->r_symndx]);
+ ptr = *(relent->sym_ptr_ptr);
+ }
+ }
+ else
+ {
+ relent->sym_ptr_ptr = section->symbol_ptr_ptr;
+ ptr = *(relent->sym_ptr_ptr);
+ }
+
+ /* The symbols definitions that we have read in have been
+ relocated as if their sections started at 0. But the offsets
+ refering to the symbols in the raw data have not been
+ modified, so we have to have a negative addend to compensate.
+
+ Note that symbols which used to be common must be left alone */
+
+ /* Calculate any reloc addend by looking at the symbol */
+ CALC_ADDEND (abfd, ptr, *reloc, relent);
+
+ relent->address -= section->vma;
+ /* !! relent->section = (asection *) NULL;*/
+
+ /* Fill in the relent->howto field from reloc->r_type */
+ tic54x_lookup_howto (relent, reloc);
+}
+
+/* COFF0 differs in file/section header size and relocation entry size */
+static CONST bfd_coff_backend_data ticoff0_swap_table =
+{
+ coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
+ coff_SWAP_aux_out, coff_SWAP_sym_out,
+ coff_SWAP_lineno_out, coff_SWAP_reloc_out,
+ coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
+ coff_SWAP_scnhdr_out,
+ FILHSZ_V0, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ_V0, LINESZ, FILNMLEN,
+#ifdef COFF_LONG_FILENAMES
+ true,
+#else
+ false,
+#endif
+#ifdef COFF_LONG_SECTION_NAMES
+ true,
+#else
+ false,
+#endif
+ COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
+ coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
+ coff_SWAP_reloc_in, ticoff0_bad_format_hook, coff_set_arch_mach_hook,
+ coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
+ coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
+ coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
+ coff_classify_symbol, coff_compute_section_file_positions,
+ coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
+ coff_adjust_symndx, coff_link_add_one_symbol,
+ coff_link_output_has_begun, coff_final_link_postscript
+};
+
+/* COFF1 differs in section header size */
+static CONST bfd_coff_backend_data ticoff1_swap_table =
+{
+ coff_SWAP_aux_in, coff_SWAP_sym_in, coff_SWAP_lineno_in,
+ coff_SWAP_aux_out, coff_SWAP_sym_out,
+ coff_SWAP_lineno_out, coff_SWAP_reloc_out,
+ coff_SWAP_filehdr_out, coff_SWAP_aouthdr_out,
+ coff_SWAP_scnhdr_out,
+ FILHSZ, AOUTSZ, SCNHSZ_V01, SYMESZ, AUXESZ, RELSZ, LINESZ, FILNMLEN,
+#ifdef COFF_LONG_FILENAMES
+ true,
+#else
+ false,
+#endif
+#ifdef COFF_LONG_SECTION_NAMES
+ true,
+#else
+ false,
+#endif
+ COFF_DEFAULT_SECTION_ALIGNMENT_POWER,
+ coff_SWAP_filehdr_in, coff_SWAP_aouthdr_in, coff_SWAP_scnhdr_in,
+ coff_SWAP_reloc_in, ticoff1_bad_format_hook, coff_set_arch_mach_hook,
+ coff_mkobject_hook, styp_to_sec_flags, coff_set_alignment_hook,
+ coff_slurp_symbol_table, symname_in_debug_hook, coff_pointerize_aux_hook,
+ coff_print_aux, coff_reloc16_extra_cases, coff_reloc16_estimate,
+ coff_classify_symbol, coff_compute_section_file_positions,
+ coff_start_final_link, coff_relocate_section, coff_rtype_to_howto,
+ coff_adjust_symndx, coff_link_add_one_symbol,
+ coff_link_output_has_begun, coff_final_link_postscript
+};
+
+
+/* TI COFF v0, DOS tools (little-endian headers) */
+const bfd_target tic54x_coff0_vec =
+{
+ "coff0-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_LITTLE, /* header byte order is little (DOS tools) */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+ NULL,
+
+ (PTR)&ticoff0_swap_table
+};
+
+/* TI COFF v0, SPARC tools (big-endian headers) */
+const bfd_target tic54x_coff0_beh_vec =
+{
+ "coff0-beh-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_BIG, /* header byte order is big */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+ bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+ bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ &tic54x_coff0_vec,
+
+ (PTR)&ticoff0_swap_table
+};
+
+/* TI COFF v1, DOS tools (little-endian headers) */
+const bfd_target tic54x_coff1_vec =
+{
+ "coff1-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_LITTLE, /* header byte order is little (DOS tools) */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ &tic54x_coff0_beh_vec,
+
+ (PTR)&ticoff1_swap_table
+};
+
+/* TI COFF v1, SPARC tools (big-endian headers) */
+const bfd_target tic54x_coff1_beh_vec =
+{
+ "coff1-beh-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_BIG, /* header byte order is big */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+ bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+ bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ &tic54x_coff1_vec,
+
+ (PTR)&ticoff1_swap_table
+};
+
+/* TI COFF v2, TI DOS tools output (little-endian headers) */
+const bfd_target tic54x_coff2_vec =
+{
+ "coff2-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_LITTLE, /* header byte order is little (DOS tools) */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ &tic54x_coff1_beh_vec,
+
+ COFF_SWAP_TABLE
+};
+
+/* TI COFF v2, TI SPARC tools output (big-endian headers) */
+const bfd_target tic54x_coff2_beh_vec =
+{
+ "coff2-beh-c54x", /* name */
+ bfd_target_coff_flavour,
+ BFD_ENDIAN_LITTLE, /* data byte order is little */
+ BFD_ENDIAN_BIG, /* header byte order is big */
+
+ (HAS_RELOC | EXEC_P | /* object flags */
+ HAS_LINENO | HAS_DEBUG |
+ HAS_SYMS | HAS_LOCALS | WP_TEXT | HAS_LOAD_PAGE ),
+
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
+ '_', /* leading symbol underscore */
+ '/', /* ar_pad_char */
+ 15, /* ar_max_namelen */
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
+ tic54x_getl32, tic54x_getl_signed_32, tic54x_putl32,
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
+ bfd_getb64, bfd_getb_signed_64, bfd_putb64,
+ bfd_getb32, bfd_getb_signed_32, bfd_putb32,
+ bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
+
+ {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
+ bfd_generic_archive_p, _bfd_dummy_target},
+ {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
+ bfd_false},
+ {bfd_false, coff_write_object_contents, /* bfd_write_contents */
+ _bfd_write_archive_contents, bfd_false},
+
+ BFD_JUMP_TABLE_GENERIC (coff),
+ BFD_JUMP_TABLE_COPY (coff),
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
+ BFD_JUMP_TABLE_SYMBOLS (coff),
+ BFD_JUMP_TABLE_RELOCS (coff),
+ BFD_JUMP_TABLE_WRITE (coff),
+ BFD_JUMP_TABLE_LINK (coff),
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
+
+ &tic54x_coff2_vec,
+
+ COFF_SWAP_TABLE
+};
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index c635d33..27d467c 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -398,7 +398,11 @@ sec_to_styp_flags (sec_name, sec_flags)
}
else if (!strncmp (sec_name, ".stab", 5))
{
+#ifdef COFF_ALIGN_IN_S_FLAGS
+ styp_flags = STYP_DSECT;
+#else
styp_flags = STYP_INFO;
+#endif
}
#ifdef RS6000COFF_C
else if (!strcmp (sec_name, _PAD))
@@ -1520,9 +1524,12 @@ coff_set_alignment_hook (abfd, section, scnhdr)
break;
#endif
#ifdef TIC80COFF
- /* TI tools hijack bits 8-11 for the alignment */
+ /* TI tools puts the alignment power in bits 8-11 */
i = (hdr->s_flags >> 8) & 0xF ;
#endif
+#ifdef COFF_DECODE_ALIGNMENT
+ i = COFF_DECODE_ALIGNMENT(hdr->s_flags);
+#endif
section->alignment_power = i;
}
@@ -2035,6 +2042,36 @@ coff_set_arch_mach_hook (abfd, filehdr)
break;
#endif
+#ifdef TICOFF0MAGIC
+#ifdef TICOFF_TARGET_ARCH
+ /* this TI COFF section should be used by all new TI COFF v0 targets */
+ case TICOFF0MAGIC:
+ arch = TICOFF_TARGET_ARCH;
+ break;
+#endif
+#endif
+
+#ifdef TICOFF1MAGIC
+ /* this TI COFF section should be used by all new TI COFF v1/2 targets */
+ /* TI COFF1 and COFF2 use the target_id field to specify which arch */
+ case TICOFF1MAGIC:
+ case TICOFF2MAGIC:
+ switch (internal_f->f_target_id)
+ {
+#ifdef TI_TARGET_ID
+ case TI_TARGET_ID:
+ arch = TICOFF_TARGET_ARCH;
+ break;
+#endif
+ default:
+ (*_bfd_error_handler)
+ (_("Unrecognized TI COFF target id '0x%x'"),
+ internal_f->f_target_id);
+ break;
+ }
+ break;
+#endif
+
#ifdef TIC80_ARCH_MAGIC
case TIC80_ARCH_MAGIC:
arch = bfd_arch_tic80;
@@ -2427,6 +2464,33 @@ coff_set_flags (abfd, magicp, flagsp)
*magicp = TIC30MAGIC;
return true;
#endif
+
+#ifdef TICOFF_DEFAULT_MAGIC
+ case TICOFF_TARGET_ARCH:
+ /* if there's no indication of which version we want, use the default */
+ if (!abfd->xvec )
+ *magicp = TICOFF_DEFAULT_MAGIC;
+ else
+ {
+ /* we may want to output in a different COFF version */
+ switch (abfd->xvec->name[4])
+ {
+ case '0':
+ *magicp = TICOFF0MAGIC;
+ break;
+ case '1':
+ *magicp = TICOFF1MAGIC;
+ break;
+ case '2':
+ *magicp = TICOFF2MAGIC;
+ break;
+ default:
+ return false;
+ }
+ }
+ return true;
+#endif
+
#ifdef TIC80_ARCH_MAGIC
case bfd_arch_tic80:
*magicp = TIC80_ARCH_MAGIC;
@@ -2661,7 +2725,7 @@ sort_by_secaddr (arg1, arg2)
#ifndef I960
#define ALIGN_SECTIONS_IN_FILE
#endif
-#ifdef TIC80COFF
+#if defined(TIC80COFF) || defined(TICOFF)
#undef ALIGN_SECTIONS_IN_FILE
#endif
@@ -3253,10 +3317,13 @@ coff_write_object_contents (abfd)
section.s_align = (current->alignment_power
? 1 << current->alignment_power
: 0);
-#else
-#ifdef TIC80COFF
+#endif
+#ifdef TIC80COFF
+ /* TI COFF puts the alignment power in bits 8-11 of the flags */
section.s_flags |= (current->alignment_power & 0xF) << 8;
#endif
+#ifdef COFF_ENCODE_ALIGNMENT
+ COFF_ENCODE_ALIGNMENT(section, current->alignment_power);
#endif
#ifdef COFF_IMAGE_WITH_PE
@@ -3446,6 +3513,11 @@ coff_write_object_contents (abfd)
internal_f.f_flags |= F_AR32W;
#endif
+#ifdef TI_TARGET_ID
+ /* target id is used in TI COFF v1 and later; COFF0 won't use this field,
+ but it doesn't hurt to set it internally */
+ internal_f.f_target_id = TI_TARGET_ID;
+#endif
#ifdef TIC80_TARGET_ID
internal_f.f_target_id = TIC80_TARGET_ID;
#endif
@@ -3487,6 +3559,10 @@ coff_write_object_contents (abfd)
internal_a.magic = NMAGIC; /* Assume separate i/d */
#define __A_MAGIC_SET__
#endif /* A29K */
+#ifdef TICOFF_AOUT_MAGIC
+ internal_a.magic = TICOFF_AOUT_MAGIC;
+#define __A_MAGIC_SET__
+#endif
#ifdef TIC80COFF
internal_a.magic = TIC80_ARCH_MAGIC;
#define __A_MAGIC_SET__
@@ -4220,7 +4296,8 @@ coff_slurp_symbol_table (abfd)
#endif
case C_REGPARM: /* register parameter */
case C_REG: /* register variable */
-#ifndef TIC80COFF
+ /* C_AUTOARG conflictes with TI COFF C_UEXT */
+#if !defined (TIC80COFF) && !defined (TICOFF)
#ifdef C_AUTOARG
case C_AUTOARG: /* 960-specific storage class */
#endif
@@ -4347,8 +4424,8 @@ coff_slurp_symbol_table (abfd)
/* NT uses 0x67 for a weak symbol, not C_ALIAS. */
case C_ALIAS: /* duplicate tag */
#endif
- /* New storage classes for TIc80 */
-#ifdef TIC80COFF
+ /* New storage classes for TI COFF */
+#if defined(TIC80COFF) || defined(TICOFF)
case C_UEXT: /* Tentative external definition */
#endif
case C_EXTLAB: /* External load time label */
diff --git a/bfd/config.bfd b/bfd/config.bfd
index d8f91d2..3d290a4 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -33,6 +33,7 @@ arm*) targ_archs=bfd_arm_arch ;;
strongarm*) targ_archs=bfd_arm_arch ;;
thumb*) targ_archs=bfd_arm_arch ;;
c30*) targ_archs=bfd_tic30_arch ;;
+c54x*) targ_archs=bfd_tic54x_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3456]86) targ_archs=bfd_i386_arch ;;
i370) targ_archs=bfd_i370_arch ;;
@@ -186,6 +187,12 @@ case "${targ}" in
targ_defvec=tic30_coff_vec
;;
+ c54x*-*-*coff* | tic54x-*-*coff*)
+ targ_defvec=tic54x_coff1_vec
+ targ_selvecs="tic54x_coff1_beh_vec tic54x_coff2_vec tic54x_coff2_beh_vec tic54x_coff0_vec tic54x_coff0_beh_vec"
+ targ_underscore=yes
+ ;;
+
d10v-*-*)
targ_defvec=bfd_elf32_d10v_vec
;;
diff --git a/bfd/configure b/bfd/configure
index 049cad9..748ed8b 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -5213,6 +5213,12 @@ do
tekhex_vec) tb="$tb tekhex.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
+ tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic80coff_vec) tb="$tb coff-tic80.lo cofflink.lo" ;;
versados_vec) tb="$tb versados.lo" ;;
vms_alpha_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
diff --git a/bfd/configure.in b/bfd/configure.in
index bb71da8..6371d68 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -574,6 +574,12 @@ do
tekhex_vec) tb="$tb tekhex.lo" ;;
tic30_aout_vec) tb="$tb aout-tic30.lo" ;;
tic30_coff_vec) tb="$tb coff-tic30.lo" ;;
+ tic54x_coff0_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff0_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff1_beh_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_vec) tb="$tb coff-tic54x.lo" ;;
+ tic54x_coff2_beh_vec) tb="$tb coff-tic54x.lo" ;;
tic80coff_vec) tb="$tb coff-tic80.lo cofflink.lo" ;;
versados_vec) tb="$tb versados.lo" ;;
vms_alpha_vec) tb="$tb vms.lo vms-hdr.lo vms-gsd.lo vms-tir.lo vms-misc.lo"
diff --git a/bfd/cpu-tic54x.c b/bfd/cpu-tic54x.c
new file mode 100644
index 0000000..3913b56
--- /dev/null
+++ b/bfd/cpu-tic54x.c
@@ -0,0 +1,39 @@
+/* BFD support for the Texas Instruments TMS320C54X architecture.
+ Copyright 1998 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+const bfd_arch_info_type bfd_tic54x_arch =
+{
+ 16, /* 16 bits in a word */
+ 16, /* 16 bits in an address (except '548) */
+ 16, /* 16 bits in a byte */
+ bfd_arch_tic54x,
+ 0, /* only 1 machine */
+ "tic54x",
+ "tms320c54x",
+ 1,
+ true, /* the one and only */
+ bfd_default_compatible,
+ bfd_default_scan,
+ 0,
+};
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 774cfc3..44d6205 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -859,6 +859,11 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_MN10300_32_PCREL",
"BFD_RELOC_MN10300_16_PCREL",
"BFD_RELOC_TIC30_LDP",
+ "BFD_RELOC_TIC54X_PARTLS7",
+ "BFD_RELOC_TIC54X_PARTMS9",
+ "BFD_RELOC_TIC54X_23",
+ "BFD_RELOC_TIC54X_16_OF_23",
+ "BFD_RELOC_TIC54X_MS7_OF_23",
"BFD_RELOC_FR30_48",
"BFD_RELOC_FR30_20",
"BFD_RELOC_FR30_6_IN_4",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 3b1a00f..aafa71a 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -2539,6 +2539,41 @@ ENUMDOC
significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode.
+COMMENT
+ENUM
+ BFD_RELOC_TIC54X_PARTLS7
+ENUMDOC
+ This is a 7bit reloc for the tms320c54x, where the least
+ significant 7 bits of a 16 bit word are placed into the least
+ significant 7 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_PARTMS9
+ENUMDOC
+ This is a 9bit DP reloc for the tms320c54x, where the most
+ significant 9 bits of a 16 bit word are placed into the least
+ significant 9 bits of the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_23
+ENUMDOC
+ This is an extended address 23-bit reloc for the tms320c54x.
+
+ENUM
+ BFD_RELOC_TIC54X_16_OF_23
+ENUMDOC
+ This is a 16-bit reloc for the tms320c54x, where the least
+ significant 16 bits of a 23-bit extended address are placed into
+ the opcode.
+
+ENUM
+ BFD_RELOC_TIC54X_MS7_OF_23
+ENUMDOC
+ This is a reloc for the tms320c54x, where the most
+ significant 7 bits of a 23-bit extended address are placed into
+ the opcode.
+COMMENT
+
ENUM
BFD_RELOC_FR30_48
ENUMDOC
diff --git a/bfd/targets.c b/bfd/targets.c
index 1f2217b..e54eb29 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -625,6 +625,12 @@ extern const bfd_target sunos_big_vec;
extern const bfd_target tekhex_vec;
extern const bfd_target tic30_aout_vec;
extern const bfd_target tic30_coff_vec;
+extern const bfd_target tic54x_coff0_vec;
+extern const bfd_target tic54x_coff0_beh_vec;
+extern const bfd_target tic54x_coff1_vec;
+extern const bfd_target tic54x_coff1_beh_vec;
+extern const bfd_target tic54x_coff2_vec;
+extern const bfd_target tic54x_coff2_beh_vec;
extern const bfd_target tic80coff_vec;
extern const bfd_target vaxnetbsd_vec;
extern const bfd_target versados_vec;
@@ -862,6 +868,12 @@ const bfd_target * const bfd_target_vector[] = {
&aout0_big_vec,
&tic30_aout_vec,
&tic30_coff_vec,
+ &tic54x_coff0_vec,
+ &tic54x_coff0_beh_vec,
+ &tic54x_coff1_vec,
+ &tic54x_coff1_beh_vec,
+ &tic54x_coff2_vec,
+ &tic54x_coff2_beh_vec,
&tic80coff_vec,
&vaxnetbsd_vec,
&versados_vec,
diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog
index 9630f40..6da6a6f 100644
--- a/include/coff/ChangeLog
+++ b/include/coff/ChangeLog
@@ -1,3 +1,9 @@
+2000-04-07 Timothy Wall <twall@cygnus.com>
+
+ * internal.h: Fix some comments related to TI COFF (instead of tic80).
+ * ti.h: New.
+ * tic54x.h: New.
+
Wed Apr 5 22:08:41 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
diff --git a/include/coff/internal.h b/include/coff/internal.h
index e89b528..4fbea7a 100644
--- a/include/coff/internal.h
+++ b/include/coff/internal.h
@@ -53,7 +53,7 @@ struct internal_filehdr
long f_nsyms; /* number of symtab entries */
unsigned short f_opthdr; /* sizeof(optional hdr) */
unsigned short f_flags; /* flags */
- unsigned short f_target_id; /* (TIc80 specific) */
+ unsigned short f_target_id; /* (TI COFF specific) */
};
@@ -222,7 +222,7 @@ struct internal_aouthdr
#define C_WEAKEXT 127 /* weak symbol -- GNU extension */
-/* New storage classes for TIc80 */
+/* New storage classes for TI COFF */
#define C_UEXT 19 /* Tentative external definition */
#define C_STATLAB 20 /* Static load time label */
#define C_EXTLAB 21 /* External load time label */
diff --git a/include/coff/ti.h b/include/coff/ti.h
new file mode 100644
index 0000000..06a315b
--- /dev/null
+++ b/include/coff/ti.h
@@ -0,0 +1,431 @@
+/*** COFF information for generic Texas Instruments COFF flavour */
+
+/********************** FILE HEADER **********************/
+
+struct external_filehdr {
+ char f_magic[2]; /* magic number */
+ char f_nscns[2]; /* number of sections */
+ char f_timdat[4]; /* time & date stamp */
+ char f_symptr[4]; /* file pointer to symtab */
+ char f_nsyms[4]; /* number of symtab entries */
+ char f_opthdr[2]; /* sizeof(optional hdr) */
+ char f_flags[2]; /* flags */
+ char f_target_id[2]; /* magic no. (TI COFF-specific) */
+};
+
+/* COFF0 has magic number in f_magic, and omits f_target_id from the file
+ header; for later versions, f_magic is 0xC1 for COFF1 and 0xC2 for COFF2
+ and the target-specific magic number is found in f_target_id */
+
+#define TICOFF0MAGIC TI_TARGET_ID
+#define TICOFF1MAGIC 0x00C1
+#define TICOFF2MAGIC 0x00C2
+#define TICOFF_AOUT_MAGIC 0x0108 /* magic number in optional header */
+#define TICOFF 1 /* customize coffcode.h */
+
+/* The target_id field changes depending on the particular CPU target */
+/* for COFF0, the target id appeared in f_magic, where COFFX magic is now */
+#ifndef TI_TARGET_ID
+#error "TI_TARGET_ID needs to be defined for your CPU"
+#endif
+
+/* Which bfd_arch to use... */
+#ifndef TICOFF_TARGET_ARCH
+#error "TICOFF_TARGET_ARCH needs to be defined for your CPU"
+#endif
+
+/* Default to COFF2 for file output */
+#ifndef TICOFF_DEFAULT_MAGIC
+#define TICOFF_DEFAULT_MAGIC TICOFF2MAGIC
+#endif
+
+/* This value is made available in the rare case where a bfd is unavailable */
+#ifndef OCTETS_PER_BYTE_POWER
+#warn OCTETS_PER_BYTE_POWER not defined for this CPU, it will default to 0
+#else
+#define OCTETS_PER_BYTE (1<<OCTETS_PER_BYTE_POWER)
+#endif
+
+/* default alignment is on a byte (not octet!) boundary */
+#ifndef COFF_DEFAULT_SECTION_ALIGNMENT_POWER
+#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 0
+#endif
+
+/* TI COFF encodes the section alignment in the section header flags */
+#define COFF_ALIGN_IN_SECTION_HEADER 1
+#define COFF_ALIGN_IN_S_FLAGS 1
+/* requires a power-of-two argument */
+#define COFF_ENCODE_ALIGNMENT(S,X) ((S).s_flags |= (((unsigned)(X)&0xF)<<8))
+/* result is a power of two */
+#define COFF_DECODE_ALIGNMENT(X) (((X)>>8)&0xF)
+
+#define COFF0_P(ABFD) (bfd_coff_filhsz(ABFD) == FILHSZ_V0)
+#define COFF2_P(ABFD) (bfd_coff_scnhsz(ABFD) != SCNHSZ_V01)
+
+#define COFF0_BADMAG(x) ((x).f_magic != TICOFF0MAGIC)
+#define COFF1_BADMAG(x) ((x).f_magic != TICOFF1MAGIC || (x).f_target_id != TI_TARGET_ID)
+#define COFF2_BADMAG(x) ((x).f_magic != TICOFF2MAGIC || (x).f_target_id != TI_TARGET_ID)
+
+/* we need to read/write an extra field in the coff file header */
+#ifndef COFF_ADJUST_FILEHDR_IN_POST
+#define COFF_ADJUST_FILEHDR_IN_POST(abfd,src,dst) \
+do { ((struct internal_filehdr *)(dst))->f_target_id = \
+bfd_h_get_16(abfd, (bfd_byte *)(((FILHDR *)(src))->f_target_id)); \
+((struct internal_filehdr *)(dst))->f_flags |= F_LDPAGE; \
+} while(0)
+#endif
+
+#ifndef COFF_ADJUST_FILEHDR_OUT_POST
+#define COFF_ADJUST_FILEHDR_OUT_POST(abfd,src,dst) \
+do { bfd_h_put_16(abfd, ((struct internal_filehdr *)(src))->f_target_id, \
+ (bfd_byte *)(((FILHDR *)(dst))->f_target_id)); \
+} while(0)
+#endif
+
+#define FILHDR struct external_filehdr
+#define FILHSZ 22
+#define FILHSZ_V0 20 /* COFF0 omits target_id field */
+
+/* File header flags */
+#define F_RELFLG (0x0001)
+#define F_EXEC (0x0002)
+#define F_LNNO (0x0004)
+/* F_LSYMS needs to be redefined in your source file */
+#define F_LSYMS_TICOFF (0x0010) /* normal COFF is 0x8 */
+
+#define F_10 0x00 /* file built for TMS320C1x devices */
+#define F_20 0x10 /* file built for TMS320C2x devices */
+#define F_25 0x20 /* file built for TMS320C2x/C5x devices */
+#define F_LENDIAN 0x0100 /* 16 bits/word, LSB first */
+#define F_SYMMERGE 0x1000 /* duplicate symbols were removed */
+
+/********************** OPTIONAL HEADER **********************/
+
+
+typedef struct
+{
+ char magic[2]; /* type of file (0x108) */
+ char vstamp[2]; /* version stamp */
+ char tsize[4]; /* text size in bytes, padded to FW bdry*/
+ char dsize[4]; /* initialized data " " */
+ char bsize[4]; /* uninitialized data " " */
+ char entry[4]; /* entry pt. */
+ char text_start[4]; /* base of text used for this file */
+ char data_start[4]; /* base of data used for this file */
+}
+AOUTHDR;
+
+
+#define AOUTHDRSZ 28
+#define AOUTSZ 28
+
+
+/********************** SECTION HEADER **********************/
+/* COFF0, COFF1 */
+struct external_scnhdr_v01 {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size (in WORDS) */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[2]; /* number of relocation entries */
+ char s_nlnno[2]; /* number of line number entries*/
+ char s_flags[2]; /* flags */
+ char s_reserved[1]; /* reserved */
+ char s_page[1]; /* section page number (LOAD) */
+};
+
+/* COFF2 */
+struct external_scnhdr {
+ char s_name[8]; /* section name */
+ char s_paddr[4]; /* physical address, aliased s_nlib */
+ char s_vaddr[4]; /* virtual address */
+ char s_size[4]; /* section size (in WORDS) */
+ char s_scnptr[4]; /* file ptr to raw data for section */
+ char s_relptr[4]; /* file ptr to relocation */
+ char s_lnnoptr[4]; /* file ptr to line numbers */
+ char s_nreloc[4]; /* number of relocation entries */
+ char s_nlnno[4]; /* number of line number entries*/
+ char s_flags[4]; /* flags */
+ char s_reserved[2]; /* reserved */
+ char s_page[2]; /* section page number (LOAD) */
+};
+
+/*
+ * Special section flags
+ * TI COFF puts the section alignment power of two in the section flags
+ * e.g. 2**N is alignment, flags |= (N & 0xF) << 8
+ */
+/* recognized load pages */
+#define PG_PROG 0x0 /* PROG page */
+#define PG_DATA 0x1 /* DATA page */
+
+/* TI COFF defines these flags;
+ STYP_CLINK: the section should be excluded from the final
+ linker output if there are no references found to any symbol in the section
+ STYP_BLOCK: the section should be blocked, i.e. if the section would cross
+ a page boundary, it is started at a page boundary instead.
+*/
+#define STYP_CLINK (0x4000)
+#define STYP_BLOCK (0x1000)
+#define STYP_ALIGN (0x0F00) /* TI COFF stores section alignment here */
+
+#define SCNHDR_V01 struct external_scnhdr_v01
+#define SCNHDR struct external_scnhdr
+#define SCNHSZ_V01 40 /* for v0 and v1 */
+#define SCNHSZ 48
+
+/* COFF2 changes the offsets and sizes of these fields
+ Assume we're dealing with the COFF2 scnhdr structure, and adjust
+ accordingly
+ */
+#define GET_SCNHDR_NRELOC(ABFD,PTR) \
+(COFF2_P(ABFD) ? bfd_h_get_32 (ABFD,PTR) : bfd_h_get_16 (ABFD, PTR))
+#define PUT_SCNHDR_NRELOC(ABFD,VAL,PTR) \
+(COFF2_P(ABFD) ? bfd_h_put_32 (ABFD,VAL,PTR) : bfd_h_put_16 (ABFD,VAL,PTR))
+#define GET_SCNHDR_NLNNO(ABFD,PTR) \
+(COFF2_P(ABFD) ? bfd_h_get_32 (ABFD,PTR) : bfd_h_get_16 (ABFD, (PTR)-2))
+#define PUT_SCNHDR_NLNNO(ABFD,VAL,PTR) \
+(COFF2_P(ABFD) ? bfd_h_put_32 (ABFD,VAL,PTR) : bfd_h_put_16 (ABFD,VAL,(PTR)-2))
+#define GET_SCNHDR_FLAGS(ABFD,PTR) \
+(COFF2_P(ABFD) ? bfd_h_get_32 (ABFD,PTR) : bfd_h_get_16 (ABFD, (PTR)-4))
+#define PUT_SCNHDR_FLAGS(ABFD,VAL,PTR) \
+(COFF2_P(ABFD) ? bfd_h_put_32 (ABFD,VAL,PTR) : bfd_h_put_16 (ABFD,VAL,(PTR)-4))
+#define GET_SCNHDR_PAGE(ABFD,PTR) \
+(COFF2_P(ABFD) ? bfd_h_get_16 (ABFD,PTR) : bfd_h_get_8 (ABFD, (PTR)-7))
+/* on output, make sure that the "reserved" field is zero */
+#define PUT_SCNHDR_PAGE(ABFD,VAL,PTR) \
+(COFF2_P(ABFD) ? bfd_h_put_16 (ABFD,VAL,PTR) : \
+bfd_h_put_8 (ABFD,VAL,(PTR)-7), bfd_h_put_8 (ABFD, 0, (PTR)-8))
+
+/* TI COFF stores section size as number of bytes (address units, not octets),
+ so adjust to be number of octets, which is what BFD expects */
+#define GET_SCNHDR_SIZE(ABFD,SZP) \
+(bfd_h_get_32(ABFD,SZP)*bfd_octets_per_byte(ABFD))
+#define PUT_SCNHDR_SIZE(ABFD,SZ,SZP) \
+bfd_h_put_32(ABFD,(SZ)/bfd_octets_per_byte(ABFD),SZP)
+
+#define COFF_ADJUST_SCNHDR_IN_POST(ABFD,EXT,INT) \
+do { ((struct internal_scnhdr *)(INT))->s_page = \
+GET_SCNHDR_PAGE(ABFD,(bfd_byte *)((SCNHDR *)(EXT))->s_page); \
+} while(0)
+
+/* The line number and reloc overflow checking in coff_swap_scnhdr_out in
+ coffswap.h doesn't use PUT_X for s_nlnno and s_nreloc.
+ Due to different sized v0/v1/v2 section headers, we have to re-write these
+ fields.
+ */
+#define COFF_ADJUST_SCNHDR_OUT_POST(ABFD,INT,EXT) \
+do { \
+PUT_SCNHDR_NLNNO(ABFD,((struct internal_scnhdr *)(INT))->s_nlnno,\
+ (bfd_byte *)((SCNHDR *)(EXT))->s_nlnno); \
+PUT_SCNHDR_NRELOC(ABFD,((struct internal_scnhdr *)(INT))->s_nreloc,\
+ (bfd_byte *)((SCNHDR *)(EXT))->s_nreloc); \
+PUT_SCNHDR_FLAGS(ABFD,((struct internal_scnhdr *)(INT))->s_flags, \
+ (bfd_byte *)((SCNHDR *)(EXT))->s_flags); \
+PUT_SCNHDR_PAGE(ABFD,((struct internal_scnhdr *)(INT))->s_page, \
+ (bfd_byte *)((SCNHDR *)(EXT))->s_page); \
+} while(0)
+
+/* page macros
+
+ the first GDB port requires flags in its remote memory access commands to
+ distinguish between data/prog space. hopefully we can make this go away
+ eventually. stuff the page in the upper bits of a 32-bit address, since
+ the c5x family only uses 16 or 23 bits.
+
+ c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
+ 23-bit program addresses. make sure the page flags don't interfere
+
+*/
+
+#define LONG_ADDRESSES 1
+#define PG_SHIFT (LONG_ADDRESSES ? 30 : 16)
+#define ADDR_MASK ((1ul<<PG_SHIFT)-1)/* 16 or 24-bit addresses */
+#define PG_MASK (3ul<<PG_SHIFT)
+#define PG_TO_FLAG(p) ((p)<<PG_SHIFT)
+#define FLAG_TO_PG(f) (((f)&PG_MASK)>>PG_SHIFT)
+
+/*
+ * names of "special" sections
+ */
+#define _TEXT ".text"
+#define _DATA ".data"
+#define _BSS ".bss"
+#define _CINIT ".cinit" /* initialized C data */
+#define _SCONST ".const" /* constants */
+#define _SWITCH ".switch" /* switch tables */
+#define _STACK ".stack" /* C stack */
+#define _SYSMEM ".sysmem" /* used for malloc et al. syscalls */
+
+/********************** LINE NUMBERS **********************/
+
+/* 1 line number entry for every "breakpointable" source line in a section.
+ * Line numbers are grouped on a per function basis; first entry in a function
+ * grouping will have l_lnno = 0 and in place of physical address will be the
+ * symbol table index of the function name.
+ */
+struct external_lineno {
+ union {
+ char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
+ char l_paddr[4]; /* (physical) address of line number */
+ } l_addr;
+ char l_lnno[2]; /* line number */
+};
+
+#define LINENO struct external_lineno
+#define LINESZ 6
+
+
+/********************** SYMBOLS **********************/
+
+/* NOTE: this is what a local label looks like in assembly source; what it
+ looks like in COFF output is undefined */
+#define TICOFF_LOCAL_LABEL_P(NAME) \
+((NAME[0] == '$' && NAME[1] >= '0' && NAME[1] <= '9' && NAME[2] == '\0') \
+ || NAME[strlen(NAME)-1] == '?')
+
+#define E_SYMNMLEN 8 /* # characters in a symbol name */
+#define E_FILNMLEN 14 /* # characters in a file name */
+#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
+
+struct external_syment
+{
+ union {
+ char e_name[E_SYMNMLEN];
+ struct {
+ char e_zeroes[4];
+ char e_offset[4];
+ } e;
+ } e;
+ char e_value[4];
+ char e_scnum[2];
+ char e_type[2];
+ char e_sclass[1];
+ char e_numaux[1];
+};
+
+
+#define N_BTMASK (017)
+#define N_TMASK (060)
+#define N_BTSHFT (4)
+#define N_TSHIFT (2)
+
+
+union external_auxent {
+ struct {
+ char x_tagndx[4]; /* str, un, or enum tag indx */
+ union {
+ struct {
+ char x_lnno[2]; /* declaration line number */
+ char x_size[2]; /* str/union/array size */
+ } x_lnsz;
+ char x_fsize[4]; /* size of function */
+ } x_misc;
+ union {
+ struct { /* if ISFCN, tag, or .bb */
+ char x_lnnoptr[4]; /* ptr to fcn line # */
+ char x_endndx[4]; /* entry ndx past block end */
+ } x_fcn;
+ struct { /* if ISARY, up to 4 dimen. */
+ char x_dimen[E_DIMNUM][2];
+ } x_ary;
+ } x_fcnary;
+ char x_tvndx[2]; /* tv index */
+ } x_sym;
+
+ union {
+ char x_fname[E_FILNMLEN];
+ struct {
+ char x_zeroes[4];
+ char x_offset[4];
+ } x_n;
+ } x_file;
+
+ struct {
+ char x_scnlen[4]; /* section length */
+ char x_nreloc[2]; /* # relocation entries */
+ char x_nlinno[2]; /* # line numbers */
+ } x_scn;
+
+ struct {
+ char x_tvfill[4]; /* tv fill value */
+ char x_tvlen[2]; /* length of .tv */
+ char x_tvran[2][2]; /* tv range */
+ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
+
+
+};
+
+#define SYMENT struct external_syment
+#define SYMESZ 18
+#define AUXENT union external_auxent
+#define AUXESZ 18
+
+/* section lengths are in target bytes (not host bytes) */
+#define GET_SCN_SCNLEN(ABFD,EXT) \
+(bfd_h_get_32(ABFD,(bfd_byte *)(EXT)->x_scn.x_scnlen)*bfd_octets_per_byte(ABFD))
+#define PUT_SCN_SCNLEN(ABFD,INT,EXT) \
+bfd_h_put_32(ABFD,(INT)/bfd_octets_per_byte(ABFD),\
+ (bfd_byte *)(EXT)->x_scn.x_scnlen)
+
+/* lnsz size is in bits in COFF file, in bytes in BFD */
+#define GET_LNSZ_SIZE(abfd, ext) \
+(bfd_h_get_16(abfd, (bfd_byte *)ext->x_sym.x_misc.x_lnsz.x_size) / \
+ (class != C_FIELD ? 8 : 1))
+
+#define PUT_LNSZ_SIZE(abfd, in, ext) \
+ bfd_h_put_16(abfd, ((class != C_FIELD) ? (in)*8 : (in)), \
+ (bfd_byte*) ext->x_sym.x_misc.x_lnsz.x_size)
+
+/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes */
+#define COFF_ADJUST_SYM_IN_POST(ABFD,EXT,INT) \
+do { struct internal_syment *dst = (struct internal_syment *)(INT); \
+if (dst->n_sclass == C_MOS || dst->n_sclass == C_MOU) dst->n_value /= 8; \
+} while (0)
+
+#define COFF_ADJUST_SYM_OUT_POST(ABFD,INT,EXT) \
+do { struct internal_syment *src = (struct internal_syment *)(INT); \
+SYMENT *dst = (SYMENT *)(EXT); \
+if(src->n_sclass == C_MOU || src->n_sclass == C_MOS) \
+bfd_h_put_32(abfd,src->n_value * 8,(bfd_byte *)dst->e_value); \
+} while (0)
+
+/* detect section-relative absolute symbols so they get flagged with a sym
+ index of -1
+*/
+#define SECTION_RELATIVE_ABSOLUTE_SYMBOL_P(RELOC,SECT) \
+((*(RELOC)->sym_ptr_ptr)->section->output_section == (SECT) \
+ && (RELOC)->howto->name[0] == 'A')
+
+/********************** RELOCATION DIRECTIVES **********************/
+
+struct external_reloc_v0 {
+ char r_vaddr[4];
+ char r_symndx[2];
+ char r_reserved[2];
+ char r_type[2];
+};
+
+struct external_reloc {
+ char r_vaddr[4];
+ char r_symndx[4];
+ char r_reserved[2]; /* extended pmad byte for COFF2 */
+ char r_type[2];
+};
+
+#define RELOC struct external_reloc
+#define RELSZ_V0 10 /* FIXME -- coffcode.h needs fixing */
+#define RELSZ 12 /* for COFF1/2 */
+
+/* various relocation types. */
+#define R_ABS 0x0000 /* no relocation */
+#define R_REL13 0x002A /* 13-bit direct reference (???) */
+#define R_PARTLS7 0x0028 /* 7 LSBs of an address */
+#define R_PARTMS9 0x0029 /* 9MSBs of an address */
+#define R_EXTWORD 0x002B /* 23-bit direct reference */
+#define R_EXTWORD16 0x002C /* 16-bit direct reference to 23-bit addr*/
+#define R_EXTWORDMS7 0x002D /* upper 7 bits of 23-bit address */
+/*EOF*/
diff --git a/include/coff/tic54x.h b/include/coff/tic54x.h
new file mode 100644
index 0000000..a2e45f2
--- /dev/null
+++ b/include/coff/tic54x.h
@@ -0,0 +1,11 @@
+/*** COFF information for Texas Instruments TMS320C54X */
+#define TIC54X_TARGET_ID 0x98
+#define TIC54XALGMAGIC 0x009B /* c54x algebraic assembler output */
+#define TIC5X_TARGET_ID 0x92
+#define TI_TARGET_ID TIC54X_TARGET_ID
+#define OCTETS_PER_BYTE_POWER 1 /* octets per byte, as a power of two */
+#define HOWTO_BANK 6 /* add to howto to get absolute/sect-relative version */
+#define TICOFF_TARGET_ARCH bfd_arch_tic54x
+#define TICOFF_DEFAULT_MAGIC TICOFF1MAGIC /* we use COFF1 for compatibility */
+#include "coff/ti.h"
+/*EOF*/
generated by cgit v1.1 at 2024-12-02 02:15:53 +0000