aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--gas/ChangeLog8
-rw-r--r--gas/config/tc-arm.c20
2 files changed, 27 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2a8146b..6c7928d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,13 @@
2006-08-16 Julian Brown <julian@codesourcery.com>
+ * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
+ to use ARM instructions on non-ARM-supporting cores.
+ (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
+ mode automatically based on cpu variant.
+ (md_begin): Call above function.
+
+2006-08-16 Julian Brown <julian@codesourcery.com>
+
* config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
recognized in non-unified syntax mode.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index dc3d7a2..577c76c 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -13844,7 +13844,7 @@ md_assemble (char *str)
ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
arm_ext_v6t2);
}
- else
+ else if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1))
{
/* Check that this instruction is supported for this CPU. */
if (!opcode->avariant ||
@@ -13877,6 +13877,12 @@ md_assemble (char *str)
ARM_MERGE_FEATURE_SETS (arm_arch_used, arm_arch_used,
*opcode->avariant);
}
+ else
+ {
+ as_bad (_("attempt to use an ARM instruction on a Thumb-only processor "
+ "-- `%s'"), str);
+ return;
+ }
output_inst (str);
}
@@ -18957,6 +18963,16 @@ set_constant_flonums (void)
abort ();
}
+/* Auto-select Thumb mode if it's the only available instruction set for the
+ given architecture. */
+
+static void
+autoselect_thumb_from_cpu_variant (void)
+{
+ if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v1))
+ opcode_select (16);
+}
+
void
md_begin (void)
{
@@ -19057,6 +19073,8 @@ md_begin (void)
ARM_MERGE_FEATURE_SETS (cpu_variant, *mcpu_cpu_opt, *mfpu_opt);
+ autoselect_thumb_from_cpu_variant ();
+
arm_arch_used = thumb_arch_used = arm_arch_none;
#if defined OBJ_COFF || defined OBJ_ELF