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-rw-r--r--bfd/ChangeLog5
-rw-r--r--bfd/cpu-riscv.c18
2 files changed, 19 insertions, 4 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 943139e..de2e917 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-24 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * cpu-riscv.c (riscv_scan): Don't allow shorter matches using the
+ default architecture.
+
2020-06-24 H.J. Lu <hongjiu.lu@intel.com>
PR ld/26083
diff --git a/bfd/cpu-riscv.c b/bfd/cpu-riscv.c
index b5c972f..22067ab 100644
--- a/bfd/cpu-riscv.c
+++ b/bfd/cpu-riscv.c
@@ -47,10 +47,20 @@ riscv_scan (const struct bfd_arch_info *info, const char *string)
if (bfd_default_scan (info, string))
return TRUE;
- /* The string might have extra characters for supported subsets. So allow
- a match that ignores trailing characters in string. */
- if (strncasecmp (string, info->printable_name,
- strlen (info->printable_name)) == 0)
+ /* The incoming STRING might take the form of riscv:rvXXzzz, where XX is
+ 32 or 64, and zzz are one or more extension characters. As we
+ currently only have 3 architectures defined, 'riscv', 'riscv:rv32',
+ and 'riscv:rv64', we would like to ignore the zzz for the purpose of
+ matching here.
+
+ However, we don't want the default 'riscv' to match over a more
+ specific 'riscv:rv32' or 'riscv:rv64', so in the case of the default
+ architecture (with the shorter 'riscv' name) we don't allow any
+ special matching, but for the 'riscv:rvXX' cases, we allow a match
+ with any additional trailing characters being ignored. */
+ if (!info->the_default
+ && strncasecmp (string, info->printable_name,
+ strlen (info->printable_name)) == 0)
return TRUE;
return FALSE;