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-rw-r--r--gas/ChangeLog.linaro12
-rw-r--r--gas/config/tc-aarch64.c6
-rw-r--r--gas/testsuite/gas/aarch64/pr22529.d4
-rw-r--r--gas/testsuite/gas/aarch64/pr22529.l17
-rw-r--r--gas/testsuite/gas/aarch64/pr22529.s3
-rw-r--r--include/ChangeLog.linaro7
-rw-r--r--include/opcode/aarch64.h1
-rw-r--r--opcodes/ChangeLog.linaro9
-rw-r--r--opcodes/aarch64-opc.c1
9 files changed, 57 insertions, 3 deletions
diff --git a/gas/ChangeLog.linaro b/gas/ChangeLog.linaro
index 717640e..8d3b812 100644
--- a/gas/ChangeLog.linaro
+++ b/gas/ChangeLog.linaro
@@ -1,3 +1,15 @@
+2017-01-15 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ Backport from master.
+
+ 2017-12-19 Tamar Christina <tamar.christina@arm.com>
+
+ PR 22529
+ * config/tc-aarch64.c (vectype_to_qualifier): Support AARCH64_OPND_QLF_V_4B.
+ * gas/testsuite/gas/aarch64/pr22529.s: New.
+ * gas/testsuite/gas/aarch64/pr22529.d: New.
+ * gas/testsuite/gas/aarch64/pr22529.l: New.
+
2017-08-04 Adhemerval Zanella <adhemerval.zanella@linaro.org>
Backport from master.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 3f3a5ea..4a256e1 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4902,7 +4902,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype)
= {1, 2, 4, 8, 16};
const unsigned int ele_base [5] =
{
- AARCH64_OPND_QLF_V_8B,
+ AARCH64_OPND_QLF_V_4B,
AARCH64_OPND_QLF_V_2H,
AARCH64_OPND_QLF_V_2S,
AARCH64_OPND_QLF_V_1D,
@@ -4937,7 +4937,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype)
a vector-type dependent amount. */
shift = 0;
if (vectype->type == NT_b)
- shift = 4;
+ shift = 3;
else if (vectype->type == NT_h || vectype->type == NT_s)
shift = 2;
else if (vectype->type >= NT_d)
@@ -4946,7 +4946,7 @@ vectype_to_qualifier (const struct vector_type_el *vectype)
gas_assert (0);
offset = ele_base [vectype->type] + (vectype->width >> shift);
- gas_assert (AARCH64_OPND_QLF_V_8B <= offset
+ gas_assert (AARCH64_OPND_QLF_V_4B <= offset
&& offset <= AARCH64_OPND_QLF_V_1Q);
return offset;
}
diff --git a/gas/testsuite/gas/aarch64/pr22529.d b/gas/testsuite/gas/aarch64/pr22529.d
new file mode 100644
index 0000000..e192734
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr22529.d
@@ -0,0 +1,4 @@
+#as: -march=armv8.3-a
+#source: pr22529.s
+#error-output: pr22529.l
+
diff --git a/gas/testsuite/gas/aarch64/pr22529.l b/gas/testsuite/gas/aarch64/pr22529.l
new file mode 100644
index 0000000..646e00a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr22529.l
@@ -0,0 +1,17 @@
+[^:]*: Assembler messages:
+[^:]*:1: Error: operand mismatch -- `udot v0\.2s,v1\.8b,v2\.4b'
+[^:]*:1: Info: did you mean this\?
+[^:]*:1: Info: udot v0\.2s, v1\.8b, v2\.8b
+[^:]*:1: Info: other valid variant\(s\):
+[^:]*:1: Info: udot v0\.4s, v1\.16b, v2\.16b
+[^:]*:2: Error: operand mismatch -- `udot v0\.2s,v1\.4b,v2\.8b'
+[^:]*:2: Info: did you mean this\?
+[^:]*:2: Info: udot v0\.2s, v1\.8b, v2\.8b
+[^:]*:2: Info: other valid variant\(s\):
+[^:]*:2: Info: udot v0\.4s, v1\.16b, v2\.16b
+[^:]*:3: Error: operand mismatch -- `udot v0\.2s,v1\.4b,v2\.4b'
+[^:]*:3: Info: did you mean this\?
+[^:]*:3: Info: udot v0\.2s, v1\.8b, v2\.8b
+[^:]*:3: Info: other valid variant\(s\):
+[^:]*:3: Info: udot v0\.4s, v1\.16b, v2\.16b
+
diff --git a/gas/testsuite/gas/aarch64/pr22529.s b/gas/testsuite/gas/aarch64/pr22529.s
new file mode 100644
index 0000000..f87b897
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr22529.s
@@ -0,0 +1,3 @@
+udot v0.2s, v1.8b, v2.4b
+udot v0.2s, v1.4b, v2.8b
+udot v0.2s, v1.4b, v2.4b
diff --git a/include/ChangeLog.linaro b/include/ChangeLog.linaro
index 23d01ac..6e342a8 100644
--- a/include/ChangeLog.linaro
+++ b/include/ChangeLog.linaro
@@ -1,3 +1,10 @@
+2017-01-15 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ 2017-12-19 Tamar Christina <tamar.christina@arm.com>
+
+ PR gas/22529
+ * opcode/aarch64.h (aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_4B.
+
2017-08-04 Adhemerval Zanella <adhemerval.zanella@linaro.org>
Backport from master.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index c5788e2..0d4f2c4 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -389,6 +389,7 @@ enum aarch64_opnd_qualifier
a use is only for the ease of operand encoding/decoding and qualifier
sequence matching; such a use should not be applied widely; use the value
constraint qualifiers for immediate operands wherever possible. */
+ AARCH64_OPND_QLF_V_4B,
AARCH64_OPND_QLF_V_8B,
AARCH64_OPND_QLF_V_16B,
AARCH64_OPND_QLF_V_2H,
diff --git a/opcodes/ChangeLog.linaro b/opcodes/ChangeLog.linaro
index f3d7e4a..ddaea51 100644
--- a/opcodes/ChangeLog.linaro
+++ b/opcodes/ChangeLog.linaro
@@ -1,3 +1,12 @@
+2017-01-15 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ Backport from master.
+
+ 2017-12-19 Tamar Christina <tamar.christina@arm.com>
+
+ PR gas/22529
+ * aarch64-opc.c (aarch64_opnd_qualifiers): Add 4b variant.
+
2017-08-04 Adhemerval Zanella <adhemerval.zanella@linaro.org>
Backport from master.
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 3c1b00f..86f40a2 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -696,6 +696,7 @@ struct operand_qualifier_data aarch64_opnd_qualifiers[] =
{8, 1, 0x3, "d", OQK_OPD_VARIANT},
{16, 1, 0x4, "q", OQK_OPD_VARIANT},
+ {1, 4, 0x0, "4b", OQK_OPD_VARIANT},
{1, 8, 0x0, "8b", OQK_OPD_VARIANT},
{1, 16, 0x1, "16b", OQK_OPD_VARIANT},
{2, 2, 0x0, "2h", OQK_OPD_VARIANT},