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-rw-r--r--sim/v850/ChangeLog5
-rw-r--r--sim/v850/sim-main.h4
-rw-r--r--sim/v850/simops.c38
3 files changed, 26 insertions, 21 deletions
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index 2053096..5510497 100644
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,3 +1,8 @@
+2002-11-30 Andrew Cagney <cagney@redhat.com>
+
+ * simops.c: Use int, 1, 0 instead of boolean, true and false.
+ * sim-main.h: Ditto.
+
2002-09-27 Jim Wilson <wilson@redhat.com>
* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
index a16ec00..e9f7aad 100644
--- a/sim/v850/sim-main.h
+++ b/sim/v850/sim-main.h
@@ -374,14 +374,14 @@ extern void divun ( unsigned int N,
unsigned long int sfi,
unsigned32 /*unsigned long int*/ * quotient_ptr,
unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int *overflow_ptr
);
extern void divn ( unsigned int N,
unsigned long int als,
unsigned long int sfi,
signed32 /*signed long int*/ * quotient_ptr,
signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int *overflow_ptr
);
extern int type1_regs[];
extern int type2_regs[];
diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index 0404523..fd0172e 100644
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -329,7 +329,7 @@ Add32 (unsigned long a1, unsigned long a2, int * carry)
}
static void
-Multiply64 (boolean sign, unsigned long op0)
+Multiply64 (int sign, unsigned long op0)
{
unsigned long op1;
unsigned long lo;
@@ -1911,7 +1911,7 @@ OP_22207E0 (void)
{
trace_input ("mulu", OP_REG_REG_REG, 0);
- Multiply64 (false, State.regs[ OP[0] ]);
+ Multiply64 (0, State.regs[ OP[0] ]);
trace_output (OP_REG_REG_REG);
@@ -1982,7 +1982,7 @@ divun
unsigned long int sfi,
unsigned32 /*unsigned long int*/ * quotient_ptr,
unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int * overflow_ptr
)
{
unsigned long ald = sfi >> (N - 1);
@@ -2056,7 +2056,7 @@ divn
unsigned long int sfi,
signed32 /*signed long int*/ * quotient_ptr,
signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
+ int * overflow_ptr
)
{
unsigned long ald = (signed long) sfi >> (N - 1);
@@ -2155,7 +2155,7 @@ OP_1C207E0 (void)
unsigned32 /*unsigned long int*/ remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivun", OP_IMM_REG_REG_REG, 0);
@@ -2190,7 +2190,7 @@ OP_1C007E0 (void)
signed32 /*signed long int*/ remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivn", OP_IMM_REG_REG_REG, 0);
@@ -2225,7 +2225,7 @@ OP_18207E0 (void)
unsigned32 /*unsigned long int*/ remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivhun", OP_IMM_REG_REG_REG, 0);
@@ -2260,7 +2260,7 @@ OP_18007E0 (void)
signed32 /*signed long int*/ remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
unsigned int imm5;
trace_input ("sdivhn", OP_IMM_REG_REG_REG, 0);
@@ -2295,7 +2295,7 @@ OP_2C207E0 (void)
unsigned long int remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divu", OP_REG_REG_REG, 0);
@@ -2306,7 +2306,7 @@ OP_2C207E0 (void)
if (divide_by == 0)
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2333,7 +2333,7 @@ OP_2C007E0 (void)
signed long int remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("div", OP_REG_REG_REG, 0);
@@ -2344,7 +2344,7 @@ OP_2C007E0 (void)
if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2371,7 +2371,7 @@ OP_28207E0 (void)
unsigned long int remainder;
unsigned long int divide_by;
unsigned long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divhu", OP_REG_REG_REG, 0);
@@ -2382,7 +2382,7 @@ OP_28207E0 (void)
if (divide_by == 0)
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2409,7 +2409,7 @@ OP_28007E0 (void)
signed long int remainder;
signed long int divide_by;
signed long int divide_this;
- boolean overflow = false;
+ int overflow = 0;
trace_input ("divh", OP_REG_REG_REG, 0);
@@ -2420,7 +2420,7 @@ OP_28007E0 (void)
if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
{
- overflow = true;
+ overflow = 1;
divide_by = 1;
}
@@ -2445,7 +2445,7 @@ OP_24207E0 (void)
{
trace_input ("mulu", OP_IMM_REG_REG, 0);
- Multiply64 (false, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
+ Multiply64 (0, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
trace_output (OP_IMM_REG_REG);
@@ -2458,7 +2458,7 @@ OP_24007E0 (void)
{
trace_input ("mul", OP_IMM_REG_REG, 0);
- Multiply64 (true, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
+ Multiply64 (1, SEXT9 ((OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0)));
trace_output (OP_IMM_REG_REG);
@@ -2608,7 +2608,7 @@ OP_22007E0 (void)
{
trace_input ("mul", OP_REG_REG_REG, 0);
- Multiply64 (true, State.regs[ OP[0] ]);
+ Multiply64 (1, State.regs[ OP[0] ]);
trace_output (OP_REG_REG_REG);
generated by cgit v1.1 at 2024-12-14 17:56:38 +0000