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-rw-r--r--bfd/ChangeLog14
-rw-r--r--bfd/elf32-pru.c163
-rw-r--r--gas/ChangeLog12
-rw-r--r--gas/config/tc-pru.c18
-rw-r--r--gas/testsuite/gas/pru/illegal2.l2
-rw-r--r--gas/testsuite/gas/pru/illegal2.s5
-rw-r--r--gas/testsuite/gas/pru/ldi.d8
-rw-r--r--gas/testsuite/gas/pru/pru.exp1
-rw-r--r--ld/ChangeLog11
-rw-r--r--ld/scripttempl/pru.sc47
-rw-r--r--ld/testsuite/ld-pru/ldi32.d2
-rw-r--r--ld/testsuite/ld-pru/norelax_ldi32-data.d8
-rw-r--r--ld/testsuite/ld-pru/norelax_ldi32-dis.d28
-rw-r--r--ld/testsuite/ld-pru/relax_ldi32-data.d8
-rw-r--r--ld/testsuite/ld-pru/relax_ldi32-dis.d20
15 files changed, 268 insertions, 79 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ecae716..6f6a89a 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,17 @@
+2018-05-09 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * elf32-pru.c (pru_elf32_do_ldi32_relocate): Make LDI32 relocation
+ conformant to TI ABI.
+ (pru_elf32_relax_section): Likewise.
+ (pru_elf_relax_delete_bytes): Fix offsets for new LDI32 code.
+ * elf32-pru.c (pru_elf32_do_ldi32_relocate): Ignore addend.
+ (pru_elf32_pmem_relocate): Trap - should not get here.
+ (pru_elf32_relocate_section): Add support for REL relocations.
+ (elf_info_to_howto_rel): Enable REL.
+ (elf_backend_may_use_rel_p): Likewise.
+ (elf_backend_may_use_rela_p): Likewise.
+ (elf_backend_default_use_rela_p): Likewise.
+
2018-05-09 Alan Modra <amodra@gmail.com>
PR 23148
diff --git a/bfd/elf32-pru.c b/bfd/elf32-pru.c
index a3c431b..0b9e7dc 100644
--- a/bfd/elf32-pru.c
+++ b/bfd/elf32-pru.c
@@ -539,7 +539,7 @@ pru_elf32_do_ldi32_relocate (bfd *abfd, reloc_howto_type *howto,
bfd_signed_vma relocation;
bfd_size_type octets = offset * bfd_octets_per_byte (abfd);
bfd_byte *location;
- unsigned long in1, in2, num;
+ unsigned long in1, in2;
/* A hacked-up version of _bfd_final_link_relocate() follows. */
@@ -564,18 +564,23 @@ pru_elf32_do_ldi32_relocate (bfd *abfd, reloc_howto_type *howto,
in1 = bfd_get_32 (abfd, location);
in2 = bfd_get_32 (abfd, location + 4);
- /* Extract the addend - should be zero per my understanding. */
- num = GET_INSN_FIELD (IMM16, in1) | (GET_INSN_FIELD (IMM16, in2) << 16);
- BFD_ASSERT (!num);
-
- relocation += num;
-
- SET_INSN_FIELD (IMM16, in1, relocation & 0xffff);
- SET_INSN_FIELD (IMM16, in2, relocation >> 16);
+ SET_INSN_FIELD (IMM16, in1, relocation >> 16);
+ SET_INSN_FIELD (IMM16, in2, relocation & 0xffff);
bfd_put_32 (abfd, in1, location);
bfd_put_32 (abfd, in2, location + 4);
+ /* Old GAS and LD versions have a bug, where the two
+ LDI instructions are swapped. Detect such object
+ files and bail. */
+ if (GET_INSN_FIELD (RDSEL, in1) != RSEL_31_16)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("error: %pB: old incompatible object file detected"),
+ abfd);
+ return bfd_reloc_notsupported;
+ }
+
return bfd_reloc_ok;
}
@@ -594,6 +599,7 @@ pru_elf32_pmem_relocate (bfd *abfd, arelent *reloc_entry,
return bfd_elf_generic_reloc (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message);
+ BFD_ASSERT (0);
return pru_elf32_do_pmem_relocate (abfd, reloc_entry->howto,
input_section,
data, reloc_entry->address,
@@ -681,15 +687,24 @@ pru_elf32_relocate_section (bfd *output_bfd,
Elf_Internal_Sym *local_syms,
asection **local_sections)
{
+ struct bfd_elf_section_data * esd = elf_section_data (input_section);
Elf_Internal_Shdr *symtab_hdr;
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel;
Elf_Internal_Rela *relend;
+ bfd_boolean is_rel_reloc;
symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes (input_bfd);
relend = relocs + input_section->reloc_count;
+ /* See if we have a REL type relocation. */
+ is_rel_reloc = (esd->rel.hdr != NULL);
+ /* Sanity check - only one type of relocation per section.
+ FIXME: Theoretically it is possible to have both types,
+ but if that happens how can we distinguish between the two ? */
+ BFD_ASSERT (! is_rel_reloc || ! esd->rela.hdr);
+
for (rel = relocs; rel < relend; rel++)
{
reloc_howto_type *howto;
@@ -702,6 +717,10 @@ pru_elf32_relocate_section (bfd *output_bfd,
const char *name = NULL;
const char* msg = (const char*) NULL;
bfd_boolean unresolved_reloc;
+ bfd_vma addend;
+
+ /* If we are using a REL relocation then the addend should be empty. */
+ BFD_ASSERT (! is_rel_reloc || rel->r_addend == 0);
r_symndx = ELF32_R_SYM (rel->r_info);
@@ -744,15 +763,52 @@ pru_elf32_relocate_section (bfd *output_bfd,
r = bfd_reloc_ok;
break;
+ case R_PRU_U16:
+ if (is_rel_reloc)
+ {
+ unsigned long insn;
+ insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ addend = GET_INSN_FIELD (IMM16, insn);
+ }
+ else
+ addend = rel->r_addend;
+ r = _bfd_final_link_relocate (howto, input_bfd,
+ input_section, contents,
+ rel->r_offset, relocation,
+ addend);
+ break;
+
case R_PRU_U16_PMEMIMM:
case R_PRU_32_PMEM:
case R_PRU_16_PMEM:
+ if (is_rel_reloc && howto->type == R_PRU_U16_PMEMIMM)
+ {
+ unsigned long insn;
+ insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ addend = GET_INSN_FIELD (IMM16, insn) << 2;
+ }
+ else if (is_rel_reloc && howto->type == R_PRU_32_PMEM)
+ {
+ addend = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ addend <<= 2;
+ }
+ else if (is_rel_reloc && howto->type == R_PRU_16_PMEM)
+ {
+ addend = bfd_get_16 (input_bfd, contents + rel->r_offset);
+ addend <<= 2;
+ }
+ else
+ {
+ BFD_ASSERT (!is_rel_reloc);
+ addend = rel->r_addend;
+ }
r = pru_elf32_do_pmem_relocate (input_bfd, howto,
input_section,
contents, rel->r_offset,
- relocation, rel->r_addend);
+ relocation, addend);
break;
case R_PRU_S10_PCREL:
+ BFD_ASSERT (! is_rel_reloc);
r = pru_elf32_do_s10_pcrel_relocate (input_bfd, howto,
input_section,
contents,
@@ -761,6 +817,7 @@ pru_elf32_relocate_section (bfd *output_bfd,
rel->r_addend);
break;
case R_PRU_U8_PCREL:
+ BFD_ASSERT (! is_rel_reloc);
r = pru_elf32_do_u8_pcrel_relocate (input_bfd, howto,
input_section,
contents,
@@ -769,29 +826,70 @@ pru_elf32_relocate_section (bfd *output_bfd,
rel->r_addend);
break;
case R_PRU_LDI32:
+ if (is_rel_reloc)
+ {
+ unsigned long in1, in2;
+ in1 = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ in2 = bfd_get_32 (input_bfd, contents + rel->r_offset + 4);
+ addend = (GET_INSN_FIELD (IMM16, in1) << 16)
+ | GET_INSN_FIELD (IMM16, in2);
+ }
+ else
+ {
+ addend = rel->r_addend;
+ }
r = pru_elf32_do_ldi32_relocate (input_bfd, howto,
input_section,
contents,
rel->r_offset,
relocation,
- rel->r_addend);
+ addend);
break;
case R_PRU_GNU_DIFF8:
case R_PRU_GNU_DIFF16:
case R_PRU_GNU_DIFF32:
case R_PRU_GNU_DIFF16_PMEM:
case R_PRU_GNU_DIFF32_PMEM:
+ /* GNU extensions support only rela. */
+ BFD_ASSERT (! is_rel_reloc);
/* Nothing to do here, as contents already contain the
diff value. */
r = bfd_reloc_ok;
break;
- default:
+ case R_PRU_BFD_RELOC_16:
+ if (is_rel_reloc)
+ addend = bfd_get_16 (input_bfd, contents + rel->r_offset);
+ else
+ addend = rel->r_addend;
+ r = _bfd_final_link_relocate (howto, input_bfd,
+ input_section, contents,
+ rel->r_offset, relocation,
+ addend);
+ break;
+
+ case R_PRU_BFD_RELOC_32:
+ if (is_rel_reloc)
+ addend = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ else
+ addend = rel->r_addend;
+ r = _bfd_final_link_relocate (howto, input_bfd,
+ input_section, contents,
+ rel->r_offset, relocation,
+ addend);
+ break;
+
+ case R_PRU_GNU_BFD_RELOC_8:
+ BFD_ASSERT (! is_rel_reloc);
r = _bfd_final_link_relocate (howto, input_bfd,
input_section, contents,
rel->r_offset, relocation,
rel->r_addend);
break;
+
+ default:
+ BFD_ASSERT (0);
+ break;
}
}
else
@@ -1094,7 +1192,7 @@ pru_elf_relax_delete_bytes (bfd *abfd,
continue;
shrinked_insn_address = (sec->output_section->vma
- + sec->output_offset + addr - count);
+ + sec->output_offset + addr);
irel = elf_section_data (isec)->relocs;
/* PR 12161: Read in the relocs for this section if necessary. */
@@ -1354,17 +1452,39 @@ pru_elf32_relax_section (bfd * abfd, asection * sec,
if ((long) value >> 16 == 0)
{
+ unsigned long insn;
+
/* Note that we've changed the relocs, section contents. */
elf_section_data (sec)->relocs = internal_relocs;
elf_section_data (sec)->this_hdr.contents = contents;
symtab_hdr->contents = (unsigned char *) isymbuf;
- /* Delete bytes. */
- if (!pru_elf_relax_delete_bytes (abfd, sec, irel->r_offset + 4, 4))
+ /* Make the second instruction load the 16-bit constant
+ into the full 32-bit register. */
+ insn = bfd_get_32 (abfd, contents + irel->r_offset + 4);
+
+ /* Old GAS and LD versions have a bug, where the two
+ LDI instructions are swapped. Detect such object
+ files and bail. */
+ if (GET_INSN_FIELD (RDSEL, insn) != RSEL_15_0)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("error: %pB: old incompatible object file detected"),
+ abfd);
+ goto error_return;
+ }
+
+ SET_INSN_FIELD (RDSEL, insn, RSEL_31_0);
+ bfd_put_32 (abfd, insn, contents + irel->r_offset + 4);
+
+ /* Delete the first LDI instruction. Note that there should
+ be no relocations or symbols pointing to the second LDI
+ instruction. */
+ if (!pru_elf_relax_delete_bytes (abfd, sec, irel->r_offset, 4))
goto error_return;
- /* We're done with deletion of the second instruction.
- Set a regular LDI relocation for the first instruction
+ /* We're done with deletion of the first instruction.
+ Set a regular LDI relocation for the second instruction
we left to load the 16-bit value into the 32-bit
register. */
irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
@@ -1466,12 +1586,17 @@ pru_elf32_link_hash_table_create (bfd *abfd)
#define bfd_elf32_bfd_reloc_type_lookup pru_elf32_bfd_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup pru_elf32_bfd_reloc_name_lookup
-/* elf_info_to_howto (using RELA relocations). */
-
#define elf_info_to_howto pru_elf32_info_to_howto
+#define elf_info_to_howto_rel NULL
/* elf backend functions. */
+/* TI folks like to use a mix of REL and RELA relocations. See also
+ the MSP430 and TI C6X backends. */
+#define elf_backend_may_use_rel_p 1
+#define elf_backend_may_use_rela_p 1
+#define elf_backend_default_use_rela_p 1
+
#define elf_backend_rela_normal 1
#define elf_backend_relocate_section pru_elf32_relocate_section
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 88ab077..b44c9e3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,15 @@
+2018-05-09 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * config/tc-pru.c (md_apply_fix): Make LDI32 relocation conformant
+ to TI ABI.
+ (pru_assemble_arg_i): Likewise.
+ (output_insn_ldi32): Likewise.
+ * testsuite/gas/pru/ldi.d: Update test for the now fixed LDI32.
+ * gas/config/tc-pru.c (pru_assemble_arg_b): Check imm8 operand range.
+ * gas/testsuite/gas/pru/illegal2.l: New test.
+ * gas/testsuite/gas/pru/illegal2.s: New test.
+ * gas/testsuite/gas/pru/pru.exp: Register new illegal2 test.
+
2018-05-08 Jim Wilson <jimw@sifive.com>
* testsuite/gas/riscv/c-zero-imm.d: Add more tests.
diff --git a/gas/config/tc-pru.c b/gas/config/tc-pru.c
index d0f630e..5121b1f 100644
--- a/gas/config/tc-pru.c
+++ b/gas/config/tc-pru.c
@@ -814,8 +814,11 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
/* As the only 64-bit "insn", LDI32 needs special handling. */
uint32_t insn1 = insn & 0xffffffff;
uint32_t insn2 = insn >> 32;
- SET_INSN_FIELD (IMM16, insn1, fixup & 0xffff);
- SET_INSN_FIELD (IMM16, insn2, fixup >> 16);
+ SET_INSN_FIELD (IMM16, insn1, fixup >> 16);
+ SET_INSN_FIELD (IMM16, insn2, fixup & 0xffff);
+
+ SET_INSN_FIELD (RDSEL, insn1, RSEL_31_16);
+ SET_INSN_FIELD (RDSEL, insn2, RSEL_15_0);
md_number_to_chars (buf, insn1, 4);
md_number_to_chars (buf + 4, insn2, 4);
@@ -1086,6 +1089,8 @@ pru_assemble_arg_b (pru_insn_infoS *insn_info, const char *argstr)
if (src2 == NULL)
{
unsigned long imm8 = pru_assemble_noreloc_expression (argstr);
+ if (imm8 >= 0x100)
+ as_bad (_("value %lu is too large for a byte operand"), imm8);
SET_INSN_FIELD (IMM8, insn_info->insn_code, imm8);
SET_INSN_FIELD (IO, insn_info->insn_code, 1);
}
@@ -1141,7 +1146,8 @@ pru_assemble_arg_i (pru_insn_infoS *insn_info, const char *argstr)
/* QUIRK: LDI must clear IO bit high, even though it has immediate arg. */
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
- SET_INSN_FIELD (IMM16, insn_info->insn_code, imm32 & 0xffff);
+ SET_INSN_FIELD (RDSEL, insn_info->insn_code, RSEL_31_16);
+ SET_INSN_FIELD (IMM16, insn_info->insn_code, imm32 >> 16);
insn_info->ldi32_imm32 = imm32;
}
@@ -1475,11 +1481,13 @@ output_insn_ldi32 (pru_insn_infoS *insn)
unsigned long insn2;
f = frag_more (8);
+ SET_INSN_FIELD (IMM16, insn->insn_code, insn->ldi32_imm32 >> 16);
+ SET_INSN_FIELD (RDSEL, insn->insn_code, RSEL_31_16);
md_number_to_chars (f, insn->insn_code, 4);
insn2 = insn->insn_code;
- SET_INSN_FIELD (IMM16, insn2, insn->ldi32_imm32 >> 16);
- SET_INSN_FIELD (RDSEL, insn2, RSEL_31_16);
+ SET_INSN_FIELD (IMM16, insn2, insn->ldi32_imm32 & 0xffff);
+ SET_INSN_FIELD (RDSEL, insn2, RSEL_15_0);
md_number_to_chars (f + 4, insn2, 4);
/* Emit debug info. */
diff --git a/gas/testsuite/gas/pru/illegal2.l b/gas/testsuite/gas/pru/illegal2.l
new file mode 100644
index 0000000..793eca7
--- /dev/null
+++ b/gas/testsuite/gas/pru/illegal2.l
@@ -0,0 +1,2 @@
+.*illegal2.s: Assembler messages:
+.*illegal2.s:5: Error: value 256 is too large for a byte operand
diff --git a/gas/testsuite/gas/pru/illegal2.s b/gas/testsuite/gas/pru/illegal2.s
new file mode 100644
index 0000000..c37f1b2
--- /dev/null
+++ b/gas/testsuite/gas/pru/illegal2.s
@@ -0,0 +1,5 @@
+# Source file used to test illegal operands.
+
+foo:
+# Out-of-bounds immediate value
+ add r2, r2, 256
diff --git a/gas/testsuite/gas/pru/ldi.d b/gas/testsuite/gas/pru/ldi.d
index 8851504..4c2cf7a 100644
--- a/gas/testsuite/gas/pru/ldi.d
+++ b/gas/testsuite/gas/pru/ldi.d
@@ -6,12 +6,12 @@
.*: +file format elf32-pru
Disassembly of section .text:
-0+0000 <[^>]*> 240000f0 ldi r16, 0
+0+0000 <[^>]*> 240000d0 ldi r16.w2, 0
[\t ]*0: R_PRU_LDI32 \*ABS\*\+0x12345678
-0+0004 <[^>]*> 240000d0 ldi r16.w2, 0
+0+0004 <[^>]*> 24000090 ldi r16.w0, 0
0+0008 <[^>]*> 241234f0 ldi r16, 4660
0+000c <[^>]*> 240000f0 ldi r16, 0
[\t ]*c: R_PRU_U16_PMEMIMM .text
-0+0010 <[^>]*> 240000f0 ldi r16, 0
+0+0010 <[^>]*> 240000d0 ldi r16.w2, 0
[\t ]*10: R_PRU_LDI32 var1
-0+0014 <[^>]*> 240000d0 ldi r16.w2, 0
+0+0014 <[^>]*> 24000090 ldi r16.w0, 0
diff --git a/gas/testsuite/gas/pru/pru.exp b/gas/testsuite/gas/pru/pru.exp
index 49bdf03..cacaa2b 100644
--- a/gas/testsuite/gas/pru/pru.exp
+++ b/gas/testsuite/gas/pru/pru.exp
@@ -22,5 +22,6 @@ if { [istarget pru-*-*] } {
run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
run_list_test "illegal" ""
+ run_list_test "illegal2" ""
run_list_test "warn_reglabel" ""
}
diff --git a/ld/ChangeLog b/ld/ChangeLog
index e8e1be0..0cbb953 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,14 @@
+2018-05-09 2018-05-02 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * scripttempl/pru.sc: Add LD sections to allow linking TI
+ toolchain object files.
+ * scripttempl/pru.sc: Switch to init_array.
+ * testsuite/ld-pru/ldi32.d: Update LDI32 test to conform to TI ABI.
+ * testsuite/ld-pru/norelax_ldi32-data.d: Likewise.
+ * testsuite/ld-pru/norelax_ldi32-dis.d: Likewise.
+ * testsuite/ld-pru/relax_ldi32-data.d: Likewise.
+ * testsuite/ld-pru/relax_ldi32-dis.d: Likewise.
+
2018-05-09 Alan Modra <amodra@gmail.com>
* po/BLD-POTFILES.in: Regenerate.
diff --git a/ld/scripttempl/pru.sc b/ld/scripttempl/pru.sc
index 88fe06c..f64e0b7 100644
--- a/ld/scripttempl/pru.sc
+++ b/ld/scripttempl/pru.sc
@@ -32,12 +32,14 @@ SECTIONS
{
*(.rel.text)
${RELOCATING+*(.rel.text.*)}
+ ${RELOCATING+*(.rel.text:*)}
${RELOCATING+*(.rel.gnu.linkonce.t*)}
}
.rela.text ${RELOCATING-0} :
{
*(.rela.text)
${RELOCATING+*(.rela.text.*)}
+ ${RELOCATING+*(.rela.text:*)}
${RELOCATING+*(.rela.gnu.linkonce.t*)}
}
.rel.fini ${RELOCATING-0} : { *(.rel.fini) }
@@ -46,36 +48,40 @@ SECTIONS
{
*(.rel.rodata)
${RELOCATING+*(.rel.rodata.*)}
+ ${RELOCATING+*(.rel.rodata:*)}
${RELOCATING+*(.rel.gnu.linkonce.r*)}
}
.rela.rodata ${RELOCATING-0} :
{
*(.rela.rodata)
${RELOCATING+*(.rela.rodata.*)}
+ ${RELOCATING+*(.rela.rodata:*)}
${RELOCATING+*(.rela.gnu.linkonce.r*)}
}
.rel.data ${RELOCATING-0} :
{
*(.rel.data)
${RELOCATING+*(.rel.data.*)}
+ ${RELOCATING+*(.rel.data:*)}
${RELOCATING+*(.rel.gnu.linkonce.d*)}
}
.rela.data ${RELOCATING-0} :
{
*(.rela.data)
${RELOCATING+*(.rela.data.*)}
+ ${RELOCATING+*(.rela.data:*)}
${RELOCATING+*(.rela.gnu.linkonce.d*)}
}
- .rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
- .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
- .rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
- .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
- .rel.got ${RELOCATING-0} : { *(.rel.got) }
- .rela.got ${RELOCATING-0} : { *(.rela.got) }
- .rel.bss ${RELOCATING-0} : { *(.rel.bss) }
- .rela.bss ${RELOCATING-0} : { *(.rela.bss) }
- .rel.plt ${RELOCATING-0} : { *(.rel.plt) }
- .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
+ .rel.init_array ${RELOCATING-0} : { *(.rel.init_array) }
+ .rela.init_array ${RELOCATING-0} : { *(.rela.init_array) }
+ .rel.fini_array ${RELOCATING-0} : { *(.rel.fini_array) }
+ .rela.fini_array ${RELOCATING-0} : { *(.rela.fini_array) }
+ .rel.got ${RELOCATING-0} : { *(.rel.got) }
+ .rela.got ${RELOCATING-0} : { *(.rela.got) }
+ .rel.bss ${RELOCATING-0} : { *(.rel.bss) }
+ .rela.bss ${RELOCATING-0} : { *(.rela.bss) }
+ .rel.plt ${RELOCATING-0} : { *(.rel.plt) }
+ .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
/* Internal text space. */
.text ${RELOCATING-0} :
@@ -92,6 +98,8 @@ SECTIONS
${RELOCATING+. = ALIGN(4);}
${RELOCATING+*(.text.*)}
${RELOCATING+. = ALIGN(4);}
+ ${RELOCATING+*(.text:*)}
+ ${RELOCATING+. = ALIGN(4);}
${RELOCATING+*(.gnu.linkonce.t*)}
${RELOCATING+. = ALIGN(4);}
@@ -105,14 +113,14 @@ SECTIONS
/* CRT is prepared for constructor/destructor table to have
a "valid" NULL address. */
- ${CONSTRUCTING+ _ctors_start = . ; }
- ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.ctors.*)))}
- ${CONSTRUCTING+ KEEP (*(.ctors))}
- ${CONSTRUCTING+ _ctors_end = . ; }
- ${CONSTRUCTING+ _dtors_start = . ; }
- ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.dtors.*)))}
- ${CONSTRUCTING+ KEEP (*(.dtors))}
- ${CONSTRUCTING+ _dtors_end = . ; }
+ ${CONSTRUCTING+ __init_array_begin = . ; }
+ ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*)))}
+ ${CONSTRUCTING+ KEEP (*(.init_array))}
+ ${CONSTRUCTING+ __init_array_end = . ; }
+ ${CONSTRUCTING+ __fini_array_begin = . ; }
+ ${CONSTRUCTING+ KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*)))}
+ ${CONSTRUCTING+ KEEP (*(.fini_array))}
+ ${CONSTRUCTING+ __fini_array_end = . ; }
/* DATA memory starts at address 0. So to avoid placing a valid static
variable at the invalid NULL address, we introduce the .data.atzero
@@ -123,8 +131,10 @@ SECTIONS
${RELOCATING+ PROVIDE (_data_start = .) ; }
*(.data)
${RELOCATING+ *(.data*)}
+ ${RELOCATING+ *(.data:*)}
${RELOCATING+ *(.rodata) /* We need to include .rodata here if gcc is used. */}
${RELOCATING+ *(.rodata.*) /* with -fdata-sections. */}
+ ${RELOCATING+ *(.rodata:*)}
${RELOCATING+*(.gnu.linkonce.d*)}
${RELOCATING+*(.gnu.linkonce.r*)}
${RELOCATING+. = ALIGN(4);}
@@ -142,6 +152,7 @@ SECTIONS
${RELOCATING+ PROVIDE (_bss_start = .) ; }
*(.bss)
${RELOCATING+ *(.bss.*)}
+ ${RELOCATING+ *(.bss:*)}
${RELOCATING+*(.gnu.linkonce.b*)}
*(COMMON)
${RELOCATING+ PROVIDE (_bss_end = .) ; }
diff --git a/ld/testsuite/ld-pru/ldi32.d b/ld/testsuite/ld-pru/ldi32.d
index 123ead3..cc9b86d 100644
--- a/ld/testsuite/ld-pru/ldi32.d
+++ b/ld/testsuite/ld-pru/ldi32.d
@@ -8,5 +8,5 @@
.*: +file format elf32-pru
Disassembly of section .text:
-[0-9a-f]+ <[^>]*> ldi r16, 48879
[0-9a-f]+ <[^>]*> ldi r16.w2, 57005
+[0-9a-f]+ <[^>]*> ldi r16.w0, 48879
diff --git a/ld/testsuite/ld-pru/norelax_ldi32-data.d b/ld/testsuite/ld-pru/norelax_ldi32-data.d
index 47fc2c1..cc7140e 100644
--- a/ld/testsuite/ld-pru/norelax_ldi32-data.d
+++ b/ld/testsuite/ld-pru/norelax_ldi32-data.d
@@ -10,10 +10,10 @@
.*: +file format elf32-pru
Contents of section .text:
- [0-9a-f]+ f0efbe24 d0adde24 0f00f630 f0efbe24 .*
- [0-9a-f]+ d0adde24 f0cace24 d0000024 e0cace24 .*
- [0-9a-f]+ f0cace24 d0010024 f0efbe24 d0acde24 .*
- [0-9a-f]+ f0785624 d0341224 f0785624 d0000024 .*
+ [0-9a-f]+ d0adde24 90efbe24 0f00f630 d0adde24 .*
+ [0-9a-f]+ 90efbe24 d0000024 90cace24 e0cace24 .*
+ [0-9a-f]+ d0010024 90cace24 d0acde24 90efbe24 .*
+ [0-9a-f]+ d0341224 90785624 d0000024 90785624 .*
[0-9a-f]+ f0120024 f100007e .*
Contents of section .data:
0000 00000000 48000020 40000000 12004000 .*
diff --git a/ld/testsuite/ld-pru/norelax_ldi32-dis.d b/ld/testsuite/ld-pru/norelax_ldi32-dis.d
index 072de5f..8f3be0f 100644
--- a/ld/testsuite/ld-pru/norelax_ldi32-dis.d
+++ b/ld/testsuite/ld-pru/norelax_ldi32-dis.d
@@ -9,21 +9,21 @@
.*: +file format elf32-pru
Disassembly of section .text:
-..000000 <[^>]*> ldi r16, 48879
-..000004 <[^>]*> ldi r16.w2, 57005
+..000000 <[^>]*> ldi r16.w2, 57005
+..000004 <[^>]*> ldi r16.w0, 48879
..000008 <[^>]*> loop ..000044 <__end_loop>, r22
-..00000c <[^>]*> ldi r16, 48879
-..000010 <[^>]*> ldi r16.w2, 57005
-..000014 <[^>]*> ldi r16, 52938
-..000018 <[^>]*> ldi r16.w2, 0
+..00000c <[^>]*> ldi r16.w2, 57005
+..000010 <[^>]*> ldi r16.w0, 48879
+..000014 <[^>]*> ldi r16.w2, 0
+..000018 <[^>]*> ldi r16.w0, 52938
..00001c <[^>]*> ldi r0, 52938
-..000020 <[^>]*> ldi r16, 52938
-..000024 <[^>]*> ldi r16.w2, 1
-..000028 <[^>]*> ldi r16, 48879
-..00002c <[^>]*> ldi r16.w2, 57004
-..000030 <[^>]*> ldi r16, 22136
-..000034 <[^>]*> ldi r16.w2, 4660
-..000038 <[^>]*> ldi r16, 22136
-..00003c <[^>]*> ldi r16.w2, 0
+..000020 <[^>]*> ldi r16.w2, 1
+..000024 <[^>]*> ldi r16.w0, 52938
+..000028 <[^>]*> ldi r16.w2, 57004
+..00002c <[^>]*> ldi r16.w0, 48879
+..000030 <[^>]*> ldi r16.w2, 4660
+..000034 <[^>]*> ldi r16.w0, 22136
+..000038 <[^>]*> ldi r16.w2, 0
+..00003c <[^>]*> ldi r16.w0, 22136
..000040 <[^>]*> ldi r16, 18
..000044 <[^>]*> qba ..000008 <__intermediate>
diff --git a/ld/testsuite/ld-pru/relax_ldi32-data.d b/ld/testsuite/ld-pru/relax_ldi32-data.d
index 2c24fe4..ffb5d81 100644
--- a/ld/testsuite/ld-pru/relax_ldi32-data.d
+++ b/ld/testsuite/ld-pru/relax_ldi32-data.d
@@ -10,10 +10,10 @@
.*: +file format elf32-pru
Contents of section .text:
- [0-9a-f]+ f0efbe24 d0adde24 0d00f630 f0efbe24 .*
- [0-9a-f]+ d0adde24 f0cace24 e0cace24 f0cace24 .*
- [0-9a-f]+ d0010024 f0efbe24 d0acde24 f0785624 .*
- [0-9a-f]+ d0341224 f0785624 f0100024 f300007e .*
+ [0-9a-f]+ d0adde24 90efbe24 0d00f630 d0adde24 .*
+ [0-9a-f]+ 90efbe24 f0cace24 e0cace24 d0010024 .*
+ [0-9a-f]+ 90cace24 d0acde24 90efbe24 d0341224 .*
+ [0-9a-f]+ 90785624 f0785624 f0100024 f300007e .*
Contents of section .data:
0000 00000000 40000020 38000000 10003800 .*
0010 0e000000 f2ffffff 0e0038aa .*
diff --git a/ld/testsuite/ld-pru/relax_ldi32-dis.d b/ld/testsuite/ld-pru/relax_ldi32-dis.d
index 1371f1c..31c7818 100644
--- a/ld/testsuite/ld-pru/relax_ldi32-dis.d
+++ b/ld/testsuite/ld-pru/relax_ldi32-dis.d
@@ -9,19 +9,19 @@
.*: +file format elf32-pru
Disassembly of section .text:
-..000000 <[^>]*> ldi r16, 48879
-..000004 <[^>]*> ldi r16.w2, 57005
+..000000 <[^>]*> ldi r16.w2, 57005
+..000004 <[^>]*> ldi r16.w0, 48879
..000008 <[^>]*> loop ..00003c <__end_loop>, r22
-..00000c <[^>]*> ldi r16, 48879
-..000010 <[^>]*> ldi r16.w2, 57005
+..00000c <[^>]*> ldi r16.w2, 57005
+..000010 <[^>]*> ldi r16.w0, 48879
..000014 <[^>]*> ldi r16, 52938
..000018 <[^>]*> ldi r0, 52938
-..00001c <[^>]*> ldi r16, 52938
-..000020 <[^>]*> ldi r16.w2, 1
-..000024 <[^>]*> ldi r16, 48879
-..000028 <[^>]*> ldi r16.w2, 57004
-..00002c <[^>]*> ldi r16, 22136
-..000030 <[^>]*> ldi r16.w2, 4660
+..00001c <[^>]*> ldi r16.w2, 1
+..000020 <[^>]*> ldi r16.w0, 52938
+..000024 <[^>]*> ldi r16.w2, 57004
+..000028 <[^>]*> ldi r16.w0, 48879
+..00002c <[^>]*> ldi r16.w2, 4660
+..000030 <[^>]*> ldi r16.w0, 22136
..000034 <[^>]*> ldi r16, 22136
..000038 <[^>]*> ldi r16, 16
..00003c <[^>]*> qba ..000008 <__intermediate>
generated by cgit v1.1 at 2024-11-26 00:30:48 +0000