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-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/config/tc-i386.c8
-rw-r--r--gas/testsuite/ChangeLog8
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-1.d15
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-1.s9
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-10.d28
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/i386-gen.c2
-rw-r--r--opcodes/i386-init.h2
10 files changed, 77 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2d61c1d..bee9359 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (md_show_usage): Replace tabs with spaces.
+
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c73cbee..ecf48bd 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7406,10 +7406,10 @@ md_show_usage (stream)
pentiumii, pentiumiii, pentium4, prescott, nocona,\n\
core, core2, k6, k6_2, athlon, k8, amdfam10,\n\
generic32, generic64\n\
- EXTENSION is combination of:\n\
- mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\
- vmx, smx, 3dnow, 3dnowa, sse4a, sse5, svme, abm,\n\
- padlock\n"));
+ EXTENSION is combination of:\n\
+ mmx, sse, sse2, sse3, ssse3, sse4.1, sse4.2, sse4,\n\
+ vmx, smx, 3dnow, 3dnowa, sse4a, sse5, svme, abm,\n\
+ padlock\n"));
fprintf (stream, _("\
-mtune=CPU optimize for CPU, CPU is one of:\n\
i8086, i186, i286, i386, i486, pentium, pentiumpro,\n\
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 65743a7..01739e2 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
+
+ * gas/i386/x86-64-arch-1.d: New.
+ * gas/i386/x86-64-arch-1.s: Likewise.
+ * gas/i386/x86-64-arch-10.d: Likewise.
+
2008-01-23 Tristan Gingold <gingold@adacore.com>
* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 78b80a2..14583dd 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -224,6 +224,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-opcode-inval"
run_dump_test "x86-64-opcode-inval-intel"
run_dump_test "rexw"
+ run_dump_test "x86-64-arch-1"
+ run_dump_test "x86-64-arch-10"
if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-arch-1.d b/gas/testsuite/gas/i386/x86-64-arch-1.d
new file mode 100644
index 0000000..2aa81fd
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-1.d
@@ -0,0 +1,15 @@
+#objdump: -dw
+#name: x86-64 arch 1
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest %xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd \$0x0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-1.s b/gas/testsuite/gas/i386/x86-64-arch-1.s
new file mode 100644
index 0000000..d295696
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-1.s
@@ -0,0 +1,9 @@
+# Test .arch .sse4.1
+.arch generic64
+.arch .sse4.1
+ptest %xmm1,%xmm0
+roundpd $0,%xmm1,%xmm0
+roundps $0,%xmm1,%xmm0
+roundsd $0,%xmm1,%xmm0
+roundss $0,%xmm1,%xmm0
+phminposuw %xmm1,%xmm3
diff --git a/gas/testsuite/gas/i386/x86-64-arch-10.d b/gas/testsuite/gas/i386/x86-64-arch-10.d
new file mode 100644
index 0000000..1e1a31e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-10.d
@@ -0,0 +1,28 @@
+#source: arch-10.s
+#as: -march=generic64+sse4+vmx+smx+sse5+3dnowa+svme+padlock
+#objdump: -dw
+#name: x86-64 arch 10
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
+[ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
+[ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
+[ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
+[ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
+[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
+[ ]*[a-f0-9]+: 0f 01 c4 vmxoff
+[ ]*[a-f0-9]+: 0f 37 getsec
+[ ]*[a-f0-9]+: 0f 0f dc b7 pmulhrw %mm4,%mm3
+[ ]*[a-f0-9]+: 0f 0f dc bb pswapd %mm4,%mm3
+[ ]*[a-f0-9]+: f2 0f 79 ca insertq %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f 01 da vmload
+[ ]*[a-f0-9]+: f3 0f bd d9 lzcnt %ecx,%ebx
+[ ]*[a-f0-9]+: 0f 7a 12 ca frczss %xmm2,%xmm1
+[ ]*[a-f0-9]+: 0f a7 c0 xstore-rng
+#pass
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 86a47cb..81b4003 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
+ * i386-init.h: Regenerated.
+
2008-01-23 Tristan Gingold <gingold@adacore.com>
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 74cb71b..515e2f7 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -45,7 +45,7 @@ static initializer cpu_flag_init [] =
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
{ "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index d13255d..a0c25e8 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -28,7 +28,7 @@
#define CPU_GENERIC64_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
- 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
+ 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_NONE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
generated by cgit v1.1 at 2024-12-04 16:33:13 +0000