diff options
-rw-r--r-- | sim/mips/ChangeLog | 7 | ||||
-rw-r--r-- | sim/mips/interp.c | 13 |
2 files changed, 18 insertions, 2 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 1c74f4d..48133c2 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,10 @@ +begin-sanitize-sky +Wed Apr 15 12:41:18 1998 Frank Ch. Eigler <fche@cygnus.com> + + * interp.c (decode_coproc): Make COP2 branch code compile after + igen signature changes. + +end-sanitize-sky Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com> * mips.igen (DSRAV): Use function do_dsrav. diff --git a/sim/mips/interp.c b/sim/mips/interp.c index f1210b7..3e83dfc 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -45,6 +45,8 @@ code on the hardware. #include "sky-libvpe.h" #include "sky-pke.h" #include "idecode.h" +#include "support.h" +#undef SD #endif /* end-sanitize-sky */ @@ -91,8 +93,8 @@ char* pr_uword64 PARAMS ((uword64 addr)); #endif /* Within interp.c we refer to the sim_state and sim_cpu directly. */ -#define SD sd #define CPU cpu +#define SD sd /* The following reserved instruction value is used when a simulator @@ -3239,7 +3241,6 @@ decode_coproc (SIM_DESC sd, typedef unsigned_4 instruction_word; int CIA = cia; int NIA = cia + 4; - sim_cpu* CPU_ = cpu; handle = 1; @@ -3250,6 +3251,10 @@ decode_coproc (SIM_DESC sd, /* NOTREACHED */ } +#define MY_INDEX itable_COPz_NORMAL +#define MY_PREFIX COPz_NORMAL +#define MY_NAME "COPz_NORMAL" + /* classify & execute basic COP2 instructions */ if(i_25_21 == 0x08 && i_20_16 == 0x00) /* BC2F */ { @@ -3419,6 +3424,10 @@ decode_coproc (SIM_DESC sd, /* cleanup for semantic.c-like actions above */ PC = NIA; +#undef MY_INDEX +#undef MY_PREFIX +#undef MY_NAME + #endif /* TARGET_SKY */ /* end-sanitize-sky */ |