diff options
| -rw-r--r-- | gas/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/ppc.exp | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d | 28 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s | 34 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/ppc-opc.c | 7 |
6 files changed, 86 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index acf75a9..05e06c6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2017-10-01 Alexander Fedotov <alfedotov@gmail.com> + + * testsuite/gas/ppc/vle-mult-ld-st-insns.s: New file: Tests the + support for the VLE multiple load/store instructions. + * testsuite/gas/ppc/vle-mult-ld-st-insns.d: New file: Test + driver. + * testsuite/gas/ppc/ppc.exp: Run it. + 2017-09-27 Nick Clifton <nickc@redhat.com> PR 22179 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index cdcd8a1..b12fbd3 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -60,6 +60,7 @@ if { [istarget powerpc*-*-*] } then { run_dump_test "vle-simple-4" run_dump_test "vle-simple-5" run_dump_test "vle-simple-6" + run_dump_test "vle-mult-ld-st-insns" #fail expected until get_powerpc_dialect() patch not applied setup_xfail "*-*-*" diff --git a/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d new file mode 100644 index 0000000..2f9d6c7 --- /dev/null +++ b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.d @@ -0,0 +1,28 @@ +#as: -a32 -mvle -mregnames +#objdump: -dr -Mvle +#name: VLE Instructions for improving interrupt handler efficiency + +.*: +file format elf.*-powerpc.* + +Disassembly of section .text: + +00000000 <prolog>: + 0: 18 01 11 00 e_stmvgprw 0\(r1\) + 4: 18 22 11 04 e_stmvsprw 4\(r2\) + 8: 18 83 11 08 e_stmvsrrw 8\(r3\) + c: 18 a4 11 0c e_stmvcsrrw 12\(r4\) + 10: 18 c5 11 10 e_stmvdsrrw 16\(r5\) + 14: 18 e6 11 14 e_stmvmcsrrw 20\(r6\) +00000018 <epilog>: + 18: 18 07 10 18 e_lmvgprw 24\(r7\) + 1c: 18 28 10 1c e_lmvsprw 28\(r8\) + 20: 18 89 10 20 e_lmvsrrw 32\(r9\) + 24: 18 aa 10 24 e_lmvcsrrw 36\(r10\) + 28: 18 cb 10 28 e_lmvdsrrw 40\(r11\) + 2c: 18 ec 10 2c e_lmvmcsrrw 44\(r12\) +00000030 <epilog_alt>: + 30: 18 0d 10 30 e_lmvgprw 48\(r13\) + 34: 18 2e 10 34 e_lmvsprw 52\(r14\) + 38: 18 8f 10 38 e_lmvsrrw 56\(r15\) + 3c: 18 b0 10 3c e_lmvcsrrw 60\(r16\) + 40: 18 d1 10 40 e_lmvdsrrw 64\(r17\) diff --git a/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s new file mode 100644 index 0000000..ecab85e --- /dev/null +++ b/gas/testsuite/gas/ppc/vle-mult-ld-st-insns.s @@ -0,0 +1,34 @@ +# VLE Instructions for Improving Interrupt Handler Efficiency (e200z760RM.pdf) +# Original Engineering Bullet (EB696.pdf) contains two writings of load instructions +# and has no ones for MCSRRs. + +# e_lmvgprw, e_stmvgprw - load/store multiple volatile GPRs (r0, r3:r12) +# e_lmvsprw, e_stmvsprw - load/store multiple volatile SPRs (CR, LR, CTR, and XER) +# e_lmvsrrw, e_stmvsrrw - load/store multiple volatile SRRs (SRR0, SRR1) +# e_lmvcsrrw, e_stmvcsrrw - load/store multiple volatile CSRRs (CSRR0, CSRR1) +# e_lmvdsrrw, e_stmvdsrrw - load/store multiple volatile DSRRs (DSRR0, DSRR1) +# e_lmvmcsrrw, e_stmvmcsrrw - load/store multiple volatile MCSRRs (MCSRR0, MCSRR1) + + .text +prolog: + e_stmvgprw 0x00 (r1) + e_stmvsprw 0x04 (r2) + e_stmvsrrw 0x08 (r3) + e_stmvcsrrw 0x0c (r4) + e_stmvdsrrw 0x10 (r5) + e_stmvmcsrrw 0x14 (r6) + +epilog: + e_lmvgprw 0x18 (r7) + e_lmvsprw 0x1c (r8) + e_lmvsrrw 0x20 (r9) + e_lmvcsrrw 0x24 (r10) + e_lmvdsrrw 0x28 (r11) + e_lmvmcsrrw 0x2c (r12) + +epilog_alt: + e_ldmvgprw 0x30 (r13) + e_ldmvsprw 0x34 (r14) + e_ldmvsrrw 0x38 (r15) + e_ldmvcsrrw 0x3c (r16) + e_ldmvdsrrw 0x40 (r17) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9280b2c..c90f097 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2017-10-01 Alexander Fedotov <alfedotov@gmail.com> + + * ppc-opc.c (vle_opcodes): Add e_lmvsprw, e_lmvgprw, + e_lmvsrrw, e_lmvcsrrw and e_lmvcsrrw as official mnemonics for + VLE multimple load/store instructions. Old e_ldm* variants are + kept as aliases. + Add missing e_lmvmcsrrw and e_stmvmcsrrw. + 2017-09-27 Nick Clifton <nickc@redhat.com> PR 22179 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 5edb1ad..39f320a 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -8315,16 +8315,23 @@ const struct powerpc_opcode vle_opcodes[] = { {"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}, {"e_stwu", OPVUP(6,6), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}, {"e_stmw", OPVUP(6,9), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}, +{"e_lmvgprw", OPVUPRT(6,16,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_ldmvgprw", OPVUPRT(6,16,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_stmvgprw", OPVUPRT(6,17,0),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_lmvsprw", OPVUPRT(6,16,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_ldmvsprw", OPVUPRT(6,16,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_stmvsprw", OPVUPRT(6,17,1),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_lmvsrrw", OPVUPRT(6,16,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_ldmvsrrw", OPVUPRT(6,16,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_stmvsrrw", OPVUPRT(6,17,4),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_lmvcsrrw", OPVUPRT(6,16,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_ldmvcsrrw", OPVUPRT(6,16,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_stmvcsrrw", OPVUPRT(6,17,5),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_lmvdsrrw", OPVUPRT(6,16,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_ldmvdsrrw", OPVUPRT(6,16,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_stmvdsrrw", OPVUPRT(6,17,6),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_lmvmcsrrw", OPVUPRT(6,16,7),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, +{"e_stmvmcsrrw", OPVUPRT(6,17,7),OPVUPRT_MASK, PPCVLE, 0, {D8, RA0}}, {"e_add16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, SI}}, {"e_la", OP(7), OP_MASK, PPCVLE, 0, {RT, D, RA0}}, {"e_sub16i", OP(7), OP_MASK, PPCVLE, 0, {RT, RA, NSI}}, |