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-rw-r--r--gas/ChangeLog16
-rw-r--r--gas/config/tc-arm.c71
-rw-r--r--gas/doc/as.texinfo5
-rw-r--r--gas/doc/c-arm.texi13
4 files changed, 96 insertions, 9 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index e4f1545..2ce547e 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2003-12-10 Paul Brook <paul@codesourcery.com>
+
+ * config/tc-arm.c (FPU_MAVERICK): Define.
+ (FPU_ARCH_MAVERICK): Define.
+ (arm_float_abi): Define.
+ (mfloat_abi_opt): New variable.
+ (md_begin): Use them.
+ (arm_opts): Add msoft-float and mhard-float.
+ (arm_cpus): Use FPU_ARCH_MAVERICK.
+ (arm_fpus): Add maverick.
+ (arm_float_abis): Add.
+ (arm_parse_float_abi): New function.
+ (arm_long_options): Add mfloat-abi.
+ * doc/as.texinfo: Document -mfloat-abi=.
+ * doc/c-arm.text: Ditto. Menution -fpu=maverick.
+
2003-12-09 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_umaal): Fix typo.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index a343607..85afdc2 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -102,6 +102,7 @@
#define FPU_VFP_EXT_V1xD 0x10000000 /* Base VFP instruction set. */
#define FPU_VFP_EXT_V1 0x08000000 /* Double-precision insns. */
#define FPU_VFP_EXT_V2 0x04000000 /* ARM10E VFPr1. */
+#define FPU_MAVERICK 0x02000000 /* Cirrus Maverick. */
#define FPU_NONE 0
#define FPU_ARCH_FPE FPU_FPA_EXT_V1
@@ -112,6 +113,15 @@
#define FPU_ARCH_VFP_V1 (FPU_ARCH_VFP_V1xD | FPU_VFP_EXT_V1)
#define FPU_ARCH_VFP_V2 (FPU_ARCH_VFP_V1 | FPU_VFP_EXT_V2)
+#define FPU_ARCH_MAVERICK FPU_MAVERICK
+
+enum arm_float_abi
+{
+ ARM_FLOAT_ABI_HARD,
+ ARM_FLOAT_ABI_SOFTFP,
+ ARM_FLOAT_ABI_SOFT
+};
+
/* Types of processor to assemble for. */
#define ARM_1 ARM_ARCH_V1
#define ARM_2 ARM_ARCH_V2
@@ -178,6 +188,7 @@ static int mcpu_fpu_opt = -1;
static int march_cpu_opt = -1;
static int march_fpu_opt = -1;
static int mfpu_opt = -1;
+static int mfloat_abi_opt = -1;
/* This array holds the chars that always start a comment. If the
pre-processor is disabled, these aren't very useful. */
@@ -2536,6 +2547,7 @@ static int arm_parse_extension PARAMS ((char *, int *));
static int arm_parse_cpu PARAMS ((char *));
static int arm_parse_arch PARAMS ((char *));
static int arm_parse_fpu PARAMS ((char *));
+static int arm_parse_float_abi PARAMS ((char *));
#if 0 /* Suppressed - for now. */
#if defined OBJ_COFF || defined OBJ_ELF
static void arm_add_note PARAMS ((const char *, const char *, unsigned int));
@@ -11652,17 +11664,28 @@ md_begin ()
if (uses_apcs_float) flags |= F_APCS_FLOAT;
if (pic_code) flags |= F_PIC;
if ((cpu_variant & FPU_ANY) == FPU_NONE
- || (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */
- flags |= F_SOFT_FLOAT;
+ || (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */
+ {
+ flags |= F_SOFT_FLOAT;
+ }
+ switch (mfloat_abi_opt)
+ {
+ case ARM_FLOAT_ABI_SOFT:
+ case ARM_FLOAT_ABI_SOFTFP:
+ flags |= F_SOFT_FLOAT;
+ break;
+
+ case ARM_FLOAT_ABI_HARD:
+ if (flags & F_SOFT_FLOAT)
+ as_bad (_("hard-float conflicts with specified fpu"));
+ break;
+ }
/* Using VFP conventions (even if soft-float). */
if (cpu_variant & FPU_VFP_EXT_NONE) flags |= F_VFP_FLOAT;
#if defined OBJ_ELF
- if (cpu_variant & ARM_CEXT_MAVERICK)
- {
- flags &= ~ F_SOFT_FLOAT;
+ if (cpu_variant & FPU_ARCH_MAVERICK)
flags |= EF_ARM_MAVERICK_FLOAT;
- }
#endif
bfd_set_private_flags (stdoutput, flags);
@@ -13281,7 +13304,7 @@ static struct arm_cpu_option_table arm_cpus[] =
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP_V2},
{"i80200", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2},
/* Maverick */
- {"ep9312", ARM_ARCH_V4T | ARM_CEXT_MAVERICK, FPU_NONE},
+ {"ep9312", ARM_ARCH_V4T | ARM_CEXT_MAVERICK, FPU_ARCH_MAVERICK},
{NULL, 0, 0}
};
@@ -13362,6 +13385,21 @@ static struct arm_fpu_option_table arm_fpus[] =
{"arm1020t", FPU_ARCH_VFP_V1},
{"arm1020e", FPU_ARCH_VFP_V2},
{"arm1136jfs", FPU_ARCH_VFP_V2},
+ {"maverick", FPU_ARCH_MAVERICK},
+ {NULL, 0}
+};
+
+struct arm_float_abi_option_table
+{
+ char *name;
+ int value;
+};
+
+static struct arm_float_abi_option_table arm_float_abis[] =
+{
+ {"hard", ARM_FLOAT_ABI_HARD},
+ {"softfp", ARM_FLOAT_ABI_SOFTFP},
+ {"soft", ARM_FLOAT_ABI_SOFT},
{NULL, 0}
};
@@ -13511,6 +13549,23 @@ arm_parse_fpu (str)
return 0;
}
+static int
+arm_parse_float_abi (str)
+ char * str;
+{
+ struct arm_float_abi_option_table *opt;
+
+ for (opt = arm_float_abis; opt->name != NULL; opt++)
+ if (strcmp (opt->name, str) == 0)
+ {
+ mfloat_abi_opt = opt->value;
+ return 1;
+ }
+
+ as_bad (_("unknown floating point abi `%s'\n"), str);
+ return 0;
+}
+
struct arm_long_option_table arm_long_opts[] =
{
{"mcpu=", N_("<cpu name>\t assemble for CPU <cpu name>"),
@@ -13519,6 +13574,8 @@ struct arm_long_option_table arm_long_opts[] =
arm_parse_arch, NULL},
{"mfpu=", N_("<fpu name>\t assemble for FPU architecture <fpu name>"),
arm_parse_fpu, NULL},
+ {"mfloat-abi=", N_("<abi>\t assemble for floating point ABI <abi>"),
+ arm_parse_float_abi, NULL},
{NULL, NULL, 0, NULL}
};
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 2878938..d137c21 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -297,7 +297,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@c Don't document the deprecated options
[@b{-mcpu}=@var{processor}[+@var{extension}@dots{}]]
[@b{-march}=@var{architecture}[+@var{extension}@dots{}]]
- [@b{-mfpu}=@var{floating-point-fromat}]
+ [@b{-mfpu}=@var{floating-point-format}]
+ [@b{-mfloat-abi}=@var{abi}]
[@b{-mthumb}]
[@b{-EB}|@b{-EL}]
[@b{-mapcs-32}|@b{-mapcs-26}|@b{-mapcs-float}|
@@ -635,6 +636,8 @@ Specify which ARM processor variant is the target.
Specify which ARM architecture variant is used by the target.
@item -mfpu=@var{floating-point-format}
Select which Floating Point architecture is the target.
+@item -mfloat-abi=@var{abi}
+Select which floating point ABI is in use.
@item -mthumb
Enable Thumb only instruction decoding.
@item -mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 1e010bf..766ac33 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -166,8 +166,9 @@ The following format options are recognized:
@code{vfpxd},
@code{arm1020t},
@code{arm1020e},
+@code{arm1136jfs}
and
-@code{arm1136jfs}.
+@code{maverick}.
In addition to determining which instructions are assembled, this option
also affects the way in which the @code{.double} assembler directive behaves
@@ -213,6 +214,16 @@ registers rather than integer registers.
This indicates that the reentrant variant of the APCS should be used.
This variant supports position independent code.
+@cindex @code{-mfloat-abi=} command line option, ARM
+@item -mfloat-abi=@var{abi}
+This option specifies that the output generated by the assembler should be
+marked as using specified floating point ABI.
+The following values are recognized:
+@code{soft},
+@code{softfp}
+and
+@code{hard}.
+
@cindex @code{-EB} command line option, ARM
@item -EB
This option specifies that the output generated by the assembler should
generated by cgit v1.1 at 2024-12-23 00:20:00 +0000