diff options
| -rw-r--r-- | sim/mn10300/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/mn10300/simops.c | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index a1e0301..1f45f27 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,5 +1,7 @@ Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com) + * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)" + * simops.c: Fix thinkos in last change to "inc dn". Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com) @@ -26,7 +28,7 @@ Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com) * simops.c: Fix overflow computation for many instructions. - * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)". + * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)". * simops.c: Fix "mov am, dn". diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c index cebd184..c944e8a 100644 --- a/sim/mn10300/simops.c +++ b/sim/mn10300/simops.c @@ -378,7 +378,7 @@ void OP_F83000 () /* mov am, (d16,an) */ void OP_FA300000 () { - store_mem ((State.regs[REG_A0 + ((insn & 0x30000) >> 17)] + store_mem ((State.regs[REG_A0 + ((insn & 0x30000) >> 16)] + SEXT16 (insn & 0xffff)), 4, State.regs[REG_A0 + ((insn & 0xc0000) >> 18)]); } @@ -386,7 +386,7 @@ void OP_FA300000 () /* mov am, (d32,an) */ void OP_FC300000 () { - store_mem ((State.regs[REG_A0 + ((insn & 0x30000) >> 17)] + store_mem ((State.regs[REG_A0 + ((insn & 0x30000) >> 16)] + ((insn & 0xffff) << 16) + extension), 4, State.regs[REG_A0 + ((insn & 0xc0000) >> 18)]); } |