diff options
-rw-r--r-- | gas/testsuite/ChangeLog | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/empic2.d | 176 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/empic2.s | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/jal-empic-elf-2.d | 48 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/jal-empic-elf-2.s | 28 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/jal-empic-elf-3.d | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/jal-empic-elf-3.s | 20 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/jal-empic-elf.d | 26 | ||||
-rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 3 |
9 files changed, 252 insertions, 91 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index d8617cf..e067808 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,15 @@ +2002-02-26 Chris Demetriou <cgd@broadcom.com> + + * gas/mips/empic2.d: Adjust for the fact that relocations on + symbols local to this file are resolved at assembly time into + section-relative relocations, even if the symbols are extern. + * gas/mips/empic2.s: Add file offset information, so the next + person to do the math mentioned above has an easier time. + * gas/mips/jal-empic-elf.d: New test. + * gas/mips/jal-empic-elf-2.d, gas/mips/jal-empic-elf-2.s: New test. + * gas/mips/jal-empic-elf-3.d, gas/mips/jal-empic-elf-3.s: New test. + * gas/mips/mips.exp: Run the new tests. + 2002-02-25 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * mips-gp64-fp32-pic.d: Fix test of 64bit register loads. diff --git a/gas/testsuite/gas/mips/empic2.d b/gas/testsuite/gas/mips/empic2.d index faff76f..0d1e573 100644 --- a/gas/testsuite/gas/mips/empic2.d +++ b/gas/testsuite/gas/mips/empic2.d @@ -16,30 +16,30 @@ Disassembly of section .text: 0+010014 <[^>]*> 6442000c daddiu v0,v0,12 [ ]*10014: R_MIPS_GNU_REL_LO16 .text 0+010018 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10018: R_MIPS_GNU_REL_HI16 g1 +[ ]*10018: R_MIPS_GNU_REL_HI16 .text 0+01001c <[^>]*> 0044102d daddu v0,v0,a0 -0+010020 <[^>]*> 64420014 daddiu v0,v0,20 -[ ]*10020: R_MIPS_GNU_REL_LO16 g1 +0+010020 <[^>]*> 64420018 daddiu v0,v0,24 +[ ]*10020: R_MIPS_GNU_REL_LO16 .text 0+010024 <[^>]*> 3c020001 lui v0,0x1 [ ]*10024: R_MIPS_GNU_REL_HI16 .text 0+010028 <[^>]*> 0044102d daddu v0,v0,a0 0+01002c <[^>]*> 64428028 daddiu v0,v0,-32728 [ ]*1002c: R_MIPS_GNU_REL_LO16 .text -0+010030 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10030: R_MIPS_GNU_REL_HI16 g2 +0+010030 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10030: R_MIPS_GNU_REL_HI16 .text 0+010034 <[^>]*> 0044102d daddu v0,v0,a0 -0+010038 <[^>]*> 6442002c daddiu v0,v0,44 -[ ]*10038: R_MIPS_GNU_REL_LO16 g2 +0+010038 <[^>]*> 64428034 daddiu v0,v0,-32716 +[ ]*10038: R_MIPS_GNU_REL_LO16 .text 0+01003c <[^>]*> 3c020001 lui v0,0x1 [ ]*1003c: R_MIPS_GNU_REL_HI16 .text 0+010040 <[^>]*> 0044102d daddu v0,v0,a0 0+010044 <[^>]*> 644202ac daddiu v0,v0,684 [ ]*10044: R_MIPS_GNU_REL_LO16 .text -0+010048 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10048: R_MIPS_GNU_REL_HI16 gf +0+010048 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10048: R_MIPS_GNU_REL_HI16 .text 0+01004c <[^>]*> 0044102d daddu v0,v0,a0 -0+010050 <[^>]*> 64420044 daddiu v0,v0,68 -[ ]*10050: R_MIPS_GNU_REL_LO16 gf +0+010050 <[^>]*> 644202b8 daddiu v0,v0,696 +[ ]*10050: R_MIPS_GNU_REL_LO16 .text 0+010054 <[^>]*> 3c020000 lui v0,0x0 [ ]*10054: R_MIPS_GNU_REL_HI16 e 0+010058 <[^>]*> 0044102d daddu v0,v0,a0 @@ -51,30 +51,30 @@ Disassembly of section .text: 0+010068 <[^>]*> 64420060 daddiu v0,v0,96 [ ]*10068: R_MIPS_GNU_REL_LO16 .text 0+01006c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1006c: R_MIPS_GNU_REL_HI16 g1 +[ ]*1006c: R_MIPS_GNU_REL_HI16 .text 0+010070 <[^>]*> 0044102d daddu v0,v0,a0 -0+010074 <[^>]*> 64420068 daddiu v0,v0,104 -[ ]*10074: R_MIPS_GNU_REL_LO16 g1 +0+010074 <[^>]*> 6442006c daddiu v0,v0,108 +[ ]*10074: R_MIPS_GNU_REL_LO16 .text 0+010078 <[^>]*> 3c020001 lui v0,0x1 [ ]*10078: R_MIPS_GNU_REL_HI16 .text 0+01007c <[^>]*> 0044102d daddu v0,v0,a0 0+010080 <[^>]*> 6442807c daddiu v0,v0,-32644 [ ]*10080: R_MIPS_GNU_REL_LO16 .text -0+010084 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10084: R_MIPS_GNU_REL_HI16 g2 +0+010084 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10084: R_MIPS_GNU_REL_HI16 .text 0+010088 <[^>]*> 0044102d daddu v0,v0,a0 -0+01008c <[^>]*> 64420080 daddiu v0,v0,128 -[ ]*1008c: R_MIPS_GNU_REL_LO16 g2 +0+01008c <[^>]*> 64428088 daddiu v0,v0,-32632 +[ ]*1008c: R_MIPS_GNU_REL_LO16 .text 0+010090 <[^>]*> 3c020001 lui v0,0x1 [ ]*10090: R_MIPS_GNU_REL_HI16 .text 0+010094 <[^>]*> 0044102d daddu v0,v0,a0 0+010098 <[^>]*> 64420300 daddiu v0,v0,768 [ ]*10098: R_MIPS_GNU_REL_LO16 .text -0+01009c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1009c: R_MIPS_GNU_REL_HI16 gf +0+01009c <[^>]*> 3c020001 lui v0,0x1 +[ ]*1009c: R_MIPS_GNU_REL_HI16 .text 0+0100a0 <[^>]*> 0044102d daddu v0,v0,a0 -0+0100a4 <[^>]*> 64420098 daddiu v0,v0,152 -[ ]*100a4: R_MIPS_GNU_REL_LO16 gf +0+0100a4 <[^>]*> 6442030c daddiu v0,v0,780 +[ ]*100a4: R_MIPS_GNU_REL_LO16 .text 0+0100a8 <[^>]*> 3c020000 lui v0,0x0 [ ]*100a8: R_MIPS_GNU_REL_HI16 e 0+0100ac <[^>]*> 0044102d daddu v0,v0,a0 @@ -85,25 +85,25 @@ Disassembly of section .text: 0+0100b8 <[^>]*> 644200b0 daddiu v0,v0,176 [ ]*100b8: R_MIPS_GNU_REL_LO16 .text 0+0100bc <[^>]*> 3c020000 lui v0,0x0 -[ ]*100bc: R_MIPS_GNU_REL_HI16 g1 -0+0100c0 <[^>]*> 644200b4 daddiu v0,v0,180 -[ ]*100c0: R_MIPS_GNU_REL_LO16 g1 +[ ]*100bc: R_MIPS_GNU_REL_HI16 .text +0+0100c0 <[^>]*> 644200b8 daddiu v0,v0,184 +[ ]*100c0: R_MIPS_GNU_REL_LO16 .text 0+0100c4 <[^>]*> 3c020001 lui v0,0x1 [ ]*100c4: R_MIPS_GNU_REL_HI16 .text 0+0100c8 <[^>]*> 644280c4 daddiu v0,v0,-32572 [ ]*100c8: R_MIPS_GNU_REL_LO16 .text -0+0100cc <[^>]*> 3c020000 lui v0,0x0 -[ ]*100cc: R_MIPS_GNU_REL_HI16 g2 -0+0100d0 <[^>]*> 644200c4 daddiu v0,v0,196 -[ ]*100d0: R_MIPS_GNU_REL_LO16 g2 +0+0100cc <[^>]*> 3c020001 lui v0,0x1 +[ ]*100cc: R_MIPS_GNU_REL_HI16 .text +0+0100d0 <[^>]*> 644280cc daddiu v0,v0,-32564 +[ ]*100d0: R_MIPS_GNU_REL_LO16 .text 0+0100d4 <[^>]*> 3c020001 lui v0,0x1 [ ]*100d4: R_MIPS_GNU_REL_HI16 .text 0+0100d8 <[^>]*> 64420340 daddiu v0,v0,832 [ ]*100d8: R_MIPS_GNU_REL_LO16 .text -0+0100dc <[^>]*> 3c020000 lui v0,0x0 -[ ]*100dc: R_MIPS_GNU_REL_HI16 gf -0+0100e0 <[^>]*> 644200d4 daddiu v0,v0,212 -[ ]*100e0: R_MIPS_GNU_REL_LO16 gf +0+0100dc <[^>]*> 3c020001 lui v0,0x1 +[ ]*100dc: R_MIPS_GNU_REL_HI16 .text +0+0100e0 <[^>]*> 64420348 daddiu v0,v0,840 +[ ]*100e0: R_MIPS_GNU_REL_LO16 .text 0+0100e4 <[^>]*> 3c020000 lui v0,0x0 [ ]*100e4: R_MIPS_GNU_REL_HI16 e 0+0100e8 <[^>]*> 644200dc daddiu v0,v0,220 @@ -113,25 +113,25 @@ Disassembly of section .text: 0+0100f0 <[^>]*> 644200e8 daddiu v0,v0,232 [ ]*100f0: R_MIPS_GNU_REL_LO16 .text 0+0100f4 <[^>]*> 3c020000 lui v0,0x0 -[ ]*100f4: R_MIPS_GNU_REL_HI16 g1 -0+0100f8 <[^>]*> 644200ec daddiu v0,v0,236 -[ ]*100f8: R_MIPS_GNU_REL_LO16 g1 +[ ]*100f4: R_MIPS_GNU_REL_HI16 .text +0+0100f8 <[^>]*> 644200f0 daddiu v0,v0,240 +[ ]*100f8: R_MIPS_GNU_REL_LO16 .text 0+0100fc <[^>]*> 3c020001 lui v0,0x1 [ ]*100fc: R_MIPS_GNU_REL_HI16 .text 0+010100 <[^>]*> 644280fc daddiu v0,v0,-32516 [ ]*10100: R_MIPS_GNU_REL_LO16 .text -0+010104 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10104: R_MIPS_GNU_REL_HI16 g2 -0+010108 <[^>]*> 644200fc daddiu v0,v0,252 -[ ]*10108: R_MIPS_GNU_REL_LO16 g2 +0+010104 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10104: R_MIPS_GNU_REL_HI16 .text +0+010108 <[^>]*> 64428104 daddiu v0,v0,-32508 +[ ]*10108: R_MIPS_GNU_REL_LO16 .text 0+01010c <[^>]*> 3c020001 lui v0,0x1 [ ]*1010c: R_MIPS_GNU_REL_HI16 .text 0+010110 <[^>]*> 64420378 daddiu v0,v0,888 [ ]*10110: R_MIPS_GNU_REL_LO16 .text -0+010114 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10114: R_MIPS_GNU_REL_HI16 gf -0+010118 <[^>]*> 6442010c daddiu v0,v0,268 -[ ]*10118: R_MIPS_GNU_REL_LO16 gf +0+010114 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10114: R_MIPS_GNU_REL_HI16 .text +0+010118 <[^>]*> 64420380 daddiu v0,v0,896 +[ ]*10118: R_MIPS_GNU_REL_LO16 .text 0+01011c <[^>]*> 3c020000 lui v0,0x0 [ ]*1011c: R_MIPS_GNU_REL_HI16 e 0+010120 <[^>]*> 64420114 daddiu v0,v0,276 @@ -142,30 +142,30 @@ Disassembly of section .text: 0+01012c <[^>]*> 8c420124 lw v0,292\(v0\) [ ]*1012c: R_MIPS_GNU_REL_LO16 .text 0+010130 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10130: R_MIPS_GNU_REL_HI16 g1 +[ ]*10130: R_MIPS_GNU_REL_HI16 .text 0+010134 <[^>]*> 0044102d daddu v0,v0,a0 -0+010138 <[^>]*> 8c42012c lw v0,300\(v0\) -[ ]*10138: R_MIPS_GNU_REL_LO16 g1 +0+010138 <[^>]*> 8c420130 lw v0,304\(v0\) +[ ]*10138: R_MIPS_GNU_REL_LO16 .text 0+01013c <[^>]*> 3c020001 lui v0,0x1 [ ]*1013c: R_MIPS_GNU_REL_HI16 .text 0+010140 <[^>]*> 0044102d daddu v0,v0,a0 0+010144 <[^>]*> 8c428140 lw v0,-32448\(v0\) [ ]*10144: R_MIPS_GNU_REL_LO16 .text -0+010148 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10148: R_MIPS_GNU_REL_HI16 g2 +0+010148 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10148: R_MIPS_GNU_REL_HI16 .text 0+01014c <[^>]*> 0044102d daddu v0,v0,a0 -0+010150 <[^>]*> 8c420144 lw v0,324\(v0\) -[ ]*10150: R_MIPS_GNU_REL_LO16 g2 +0+010150 <[^>]*> 8c42814c lw v0,-32436\(v0\) +[ ]*10150: R_MIPS_GNU_REL_LO16 .text 0+010154 <[^>]*> 3c020001 lui v0,0x1 [ ]*10154: R_MIPS_GNU_REL_HI16 .text 0+010158 <[^>]*> 0044102d daddu v0,v0,a0 0+01015c <[^>]*> 8c4203c4 lw v0,964\(v0\) [ ]*1015c: R_MIPS_GNU_REL_LO16 .text -0+010160 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10160: R_MIPS_GNU_REL_HI16 gf +0+010160 <[^>]*> 3c020001 lui v0,0x1 +[ ]*10160: R_MIPS_GNU_REL_HI16 .text 0+010164 <[^>]*> 0044102d daddu v0,v0,a0 -0+010168 <[^>]*> 8c42015c lw v0,348\(v0\) -[ ]*10168: R_MIPS_GNU_REL_LO16 gf +0+010168 <[^>]*> 8c4203d0 lw v0,976\(v0\) +[ ]*10168: R_MIPS_GNU_REL_LO16 .text 0+01016c <[^>]*> 3c020000 lui v0,0x0 [ ]*1016c: R_MIPS_GNU_REL_HI16 e 0+010170 <[^>]*> 0044102d daddu v0,v0,a0 @@ -177,30 +177,30 @@ Disassembly of section .text: 0+010180 <[^>]*> dc420178 ld v0,376\(v0\) [ ]*10180: R_MIPS_GNU_REL_LO16 .text 0+010184 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10184: R_MIPS_GNU_REL_HI16 g1 +[ ]*10184: R_MIPS_GNU_REL_HI16 .text 0+010188 <[^>]*> 0044102d daddu v0,v0,a0 -0+01018c <[^>]*> dc420180 ld v0,384\(v0\) -[ ]*1018c: R_MIPS_GNU_REL_LO16 g1 +0+01018c <[^>]*> dc420184 ld v0,388\(v0\) +[ ]*1018c: R_MIPS_GNU_REL_LO16 .text 0+010190 <[^>]*> 3c020001 lui v0,0x1 [ ]*10190: R_MIPS_GNU_REL_HI16 .text 0+010194 <[^>]*> 0044102d daddu v0,v0,a0 0+010198 <[^>]*> dc428194 ld v0,-32364\(v0\) [ ]*10198: R_MIPS_GNU_REL_LO16 .text -0+01019c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1019c: R_MIPS_GNU_REL_HI16 g2 +0+01019c <[^>]*> 3c020001 lui v0,0x1 +[ ]*1019c: R_MIPS_GNU_REL_HI16 .text 0+0101a0 <[^>]*> 0044102d daddu v0,v0,a0 -0+0101a4 <[^>]*> dc420198 ld v0,408\(v0\) -[ ]*101a4: R_MIPS_GNU_REL_LO16 g2 +0+0101a4 <[^>]*> dc4281a0 ld v0,-32352\(v0\) +[ ]*101a4: R_MIPS_GNU_REL_LO16 .text 0+0101a8 <[^>]*> 3c020001 lui v0,0x1 [ ]*101a8: R_MIPS_GNU_REL_HI16 .text 0+0101ac <[^>]*> 0044102d daddu v0,v0,a0 0+0101b0 <[^>]*> dc420418 ld v0,1048\(v0\) [ ]*101b0: R_MIPS_GNU_REL_LO16 .text -0+0101b4 <[^>]*> 3c020000 lui v0,0x0 -[ ]*101b4: R_MIPS_GNU_REL_HI16 gf +0+0101b4 <[^>]*> 3c020001 lui v0,0x1 +[ ]*101b4: R_MIPS_GNU_REL_HI16 .text 0+0101b8 <[^>]*> 0044102d daddu v0,v0,a0 -0+0101bc <[^>]*> dc4201b0 ld v0,432\(v0\) -[ ]*101bc: R_MIPS_GNU_REL_LO16 gf +0+0101bc <[^>]*> dc420424 ld v0,1060\(v0\) +[ ]*101bc: R_MIPS_GNU_REL_LO16 .text 0+0101c0 <[^>]*> 3c020000 lui v0,0x0 [ ]*101c0: R_MIPS_GNU_REL_HI16 e 0+0101c4 <[^>]*> 0044102d daddu v0,v0,a0 @@ -212,30 +212,30 @@ Disassembly of section .text: 0+0101d4 <[^>]*> ac2201cc sw v0,460\(at\) [ ]*101d4: R_MIPS_GNU_REL_LO16 .text 0+0101d8 <[^>]*> 3c010000 lui at,0x0 -[ ]*101d8: R_MIPS_GNU_REL_HI16 g1 +[ ]*101d8: R_MIPS_GNU_REL_HI16 .text 0+0101dc <[^>]*> 0024082d daddu at,at,a0 -0+0101e0 <[^>]*> ac2201d4 sw v0,468\(at\) -[ ]*101e0: R_MIPS_GNU_REL_LO16 g1 +0+0101e0 <[^>]*> ac2201d8 sw v0,472\(at\) +[ ]*101e0: R_MIPS_GNU_REL_LO16 .text 0+0101e4 <[^>]*> 3c010001 lui at,0x1 [ ]*101e4: R_MIPS_GNU_REL_HI16 .text 0+0101e8 <[^>]*> 0024082d daddu at,at,a0 0+0101ec <[^>]*> ac2281e8 sw v0,-32280\(at\) [ ]*101ec: R_MIPS_GNU_REL_LO16 .text -0+0101f0 <[^>]*> 3c010000 lui at,0x0 -[ ]*101f0: R_MIPS_GNU_REL_HI16 g2 +0+0101f0 <[^>]*> 3c010001 lui at,0x1 +[ ]*101f0: R_MIPS_GNU_REL_HI16 .text 0+0101f4 <[^>]*> 0024082d daddu at,at,a0 -0+0101f8 <[^>]*> ac2201ec sw v0,492\(at\) -[ ]*101f8: R_MIPS_GNU_REL_LO16 g2 +0+0101f8 <[^>]*> ac2281f4 sw v0,-32268\(at\) +[ ]*101f8: R_MIPS_GNU_REL_LO16 .text 0+0101fc <[^>]*> 3c010001 lui at,0x1 [ ]*101fc: R_MIPS_GNU_REL_HI16 .text 0+010200 <[^>]*> 0024082d daddu at,at,a0 0+010204 <[^>]*> ac22046c sw v0,1132\(at\) [ ]*10204: R_MIPS_GNU_REL_LO16 .text -0+010208 <[^>]*> 3c010000 lui at,0x0 -[ ]*10208: R_MIPS_GNU_REL_HI16 gf +0+010208 <[^>]*> 3c010001 lui at,0x1 +[ ]*10208: R_MIPS_GNU_REL_HI16 .text 0+01020c <[^>]*> 0024082d daddu at,at,a0 -0+010210 <[^>]*> ac220204 sw v0,516\(at\) -[ ]*10210: R_MIPS_GNU_REL_LO16 gf +0+010210 <[^>]*> ac220478 sw v0,1144\(at\) +[ ]*10210: R_MIPS_GNU_REL_LO16 .text 0+010214 <[^>]*> 3c010000 lui at,0x0 [ ]*10214: R_MIPS_GNU_REL_HI16 e 0+010218 <[^>]*> 0024082d daddu at,at,a0 @@ -247,30 +247,30 @@ Disassembly of section .text: 0+010228 <[^>]*> fc220220 sd v0,544\(at\) [ ]*10228: R_MIPS_GNU_REL_LO16 .text 0+01022c <[^>]*> 3c010000 lui at,0x0 -[ ]*1022c: R_MIPS_GNU_REL_HI16 g1 +[ ]*1022c: R_MIPS_GNU_REL_HI16 .text 0+010230 <[^>]*> 0024082d daddu at,at,a0 -0+010234 <[^>]*> fc220228 sd v0,552\(at\) -[ ]*10234: R_MIPS_GNU_REL_LO16 g1 +0+010234 <[^>]*> fc22022c sd v0,556\(at\) +[ ]*10234: R_MIPS_GNU_REL_LO16 .text 0+010238 <[^>]*> 3c010001 lui at,0x1 [ ]*10238: R_MIPS_GNU_REL_HI16 .text 0+01023c <[^>]*> 0024082d daddu at,at,a0 0+010240 <[^>]*> fc22823c sd v0,-32196\(at\) [ ]*10240: R_MIPS_GNU_REL_LO16 .text -0+010244 <[^>]*> 3c010000 lui at,0x0 -[ ]*10244: R_MIPS_GNU_REL_HI16 g2 +0+010244 <[^>]*> 3c010001 lui at,0x1 +[ ]*10244: R_MIPS_GNU_REL_HI16 .text 0+010248 <[^>]*> 0024082d daddu at,at,a0 -0+01024c <[^>]*> fc220240 sd v0,576\(at\) -[ ]*1024c: R_MIPS_GNU_REL_LO16 g2 +0+01024c <[^>]*> fc228248 sd v0,-32184\(at\) +[ ]*1024c: R_MIPS_GNU_REL_LO16 .text 0+010250 <[^>]*> 3c010001 lui at,0x1 [ ]*10250: R_MIPS_GNU_REL_HI16 .text 0+010254 <[^>]*> 0024082d daddu at,at,a0 0+010258 <[^>]*> fc2204c0 sd v0,1216\(at\) [ ]*10258: R_MIPS_GNU_REL_LO16 .text -0+01025c <[^>]*> 3c010000 lui at,0x0 -[ ]*1025c: R_MIPS_GNU_REL_HI16 gf +0+01025c <[^>]*> 3c010001 lui at,0x1 +[ ]*1025c: R_MIPS_GNU_REL_HI16 .text 0+010260 <[^>]*> 0024082d daddu at,at,a0 -0+010264 <[^>]*> fc220258 sd v0,600\(at\) -[ ]*10264: R_MIPS_GNU_REL_LO16 gf +0+010264 <[^>]*> fc2204cc sd v0,1228\(at\) +[ ]*10264: R_MIPS_GNU_REL_LO16 .text 0+010268 <[^>]*> 3c010000 lui at,0x0 [ ]*10268: R_MIPS_GNU_REL_HI16 e 0+01026c <[^>]*> 0024082d daddu at,at,a0 diff --git a/gas/testsuite/gas/mips/empic2.s b/gas/testsuite/gas/mips/empic2.s index f8d14a4..e63e02b 100644 --- a/gas/testsuite/gas/mips/empic2.s +++ b/gas/testsuite/gas/mips/empic2.s @@ -8,7 +8,7 @@ start: .globl g1 .ent g1 -i1: +i1: # 0x00004 g1: .space 0x8000 nop @@ -16,7 +16,7 @@ g1: .globl g2 .ent g2 -i2: +i2: # 0x08008 g2: .space 0x8000 nop @@ -24,7 +24,7 @@ g2: .globl g3 .ent g3 -i3: +i3: # 0x1000c g3: la $2, (i1 - i3)($4) diff --git a/gas/testsuite/gas/mips/jal-empic-elf-2.d b/gas/testsuite/gas/mips/jal-empic-elf-2.d new file mode 100644 index 0000000..3571dd4 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic-elf-2.d @@ -0,0 +1,48 @@ +#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn +#name: MIPS jal-empic-elf-2 +#as: -mips1 -membedded-pic + +# Test the jal macro harder with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: + \.\.\. + \.\.\. +0+0018 <[^>]*> 04110002 bal 0+0024 <g1\+0x18> +[ ]*18: R_MIPS_GNU_REL16_S2 .text +0+001c <[^>]*> 00000000 nop +0+0020 <[^>]*> 04110002 bal 0+002c <g1\+0x20> +[ ]*20: R_MIPS_GNU_REL16_S2 .text +0+0024 <[^>]*> 00000000 nop +0+0028 <[^>]*> 0411ffff bal 0+0028 <g1\+0x1c> +[ ]*28: R_MIPS_GNU_REL16_S2 e1 +0+002c <[^>]*> 00000000 nop +0+0030 <[^>]*> 10000002 b 0+003c <g1\+0x30> +[ ]*30: R_MIPS_GNU_REL16_S2 .text +0+0034 <[^>]*> 00000000 nop +0+0038 <[^>]*> 10000002 b 0+0044 <g1\+0x38> +[ ]*38: R_MIPS_GNU_REL16_S2 .text +0+003c <[^>]*> 00000000 nop +0+0040 <[^>]*> 1000ffff b 0+0040 <g1\+0x34> +[ ]*40: R_MIPS_GNU_REL16_S2 e1 +0+0044 <[^>]*> 00000000 nop +0+0048 <[^>]*> 0411ffff bal 0+0048 <g1\+0x3c> +[ ]*48: R_MIPS_GNU_REL16_S2 .text +0+004c <[^>]*> 00000000 nop +0+0050 <[^>]*> 0411ffff bal 0+0050 <g1\+0x44> +[ ]*50: R_MIPS_GNU_REL16_S2 .text +0+0054 <[^>]*> 00000000 nop +0+0058 <[^>]*> 0411fffc bal 0+004c <g1\+0x40> +[ ]*58: R_MIPS_GNU_REL16_S2 e1 +0+005c <[^>]*> 00000000 nop +0+0060 <[^>]*> 04110005 bal 0+0078 <g1\+0x6c> +[ ]*60: R_MIPS_GNU_REL16_S2 .text +0+0064 <[^>]*> 00000000 nop +0+0068 <[^>]*> 04110005 bal 0+0080 <g1\+0x74> +[ ]*68: R_MIPS_GNU_REL16_S2 .text +0+006c <[^>]*> 00000000 nop +0+0070 <[^>]*> 04110002 bal 0+007c <g1\+0x70> +[ ]*70: R_MIPS_GNU_REL16_S2 e1 +0+0074 <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal-empic-elf-2.s b/gas/testsuite/gas/mips/jal-empic-elf-2.s new file mode 100644 index 0000000..3a17555 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic-elf-2.s @@ -0,0 +1,28 @@ +# Source file used to test the jal macro even harder + # some space so offets won't be 0. + .space 0xc + + .globl g1 .text +g1: +l1: + # some more space, so offset from label won't be 0. + .space 0xc + + jal g1 # 0x18 + jal l1 # 0x20 + jal e1 # 0x28 + + j g1 # 0x30 + j l1 # 0x38 + j e1 # 0x40 + + jal g1 - 0xc # 0x48 + jal l1 - 0xc # 0x50 + jal e1 - 0xc # 0x58 + + jal g1 + 0xc # 0x60 + jal l1 + 0xc # 0x68 + jal e1 + 0xc # 0x70 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/jal-empic-elf-3.d b/gas/testsuite/gas/mips/jal-empic-elf-3.d new file mode 100644 index 0000000..c3647d3 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic-elf-3.d @@ -0,0 +1,24 @@ +#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn +#name: MIPS jal-empic-elf-3 +#as: -mips1 -membedded-pic + +# Test the jal macro harder with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: + \.\.\. + \.\.\. +0+0018 <[^>]*> 0411fffa bal 0+0004 <g1\-0x8> +[ ]*18: R_MIPS_GNU_REL16_S2 .text +0+001c <[^>]*> 00000000 nop +0+0020 <[^>]*> 0411fff8 bal 0+0004 <g1\-0x8> +[ ]*20: R_MIPS_GNU_REL16_S2 .text +0+0024 <[^>]*> 00000000 nop +0+0028 <[^>]*> 0411fff6 bal 0+0004 <g1\-0x8> +[ ]*28: R_MIPS_GNU_REL16_S2 e1 +0+002c <[^>]*> 00000000 nop +0+0030 <[^>]*> 0411fff4 bal 0+0004 <g1\-0x8> +[ ]*30: R_MIPS_GNU_REL16_S2 e2 +0+0034 <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/jal-empic-elf-3.s b/gas/testsuite/gas/mips/jal-empic-elf-3.s new file mode 100644 index 0000000..7043d52 --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic-elf-3.s @@ -0,0 +1,20 @@ +# Source file used to test the jal macro even harder + # some space so offets won't be 0. + .space 0xc + + .globl g1 .text + .globl e2 .text +g1: +l1: + # some more space, so offset from label won't be 0. + .space 0xc + + # Hit the case where 'value == 0' in the BFD_RELOC_16_PCREL_S2 + # handling in tc-mips.c:md_apply_fix3(). + jal g1 - 0x20 # 0x18 + jal l1 - 0x28 # 0x20 + jal e1 - 0x24 # 0x28 + jal e2 - 0x2c # 0x30 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/jal-empic-elf.d b/gas/testsuite/gas/mips/jal-empic-elf.d new file mode 100644 index 0000000..d46a52f --- /dev/null +++ b/gas/testsuite/gas/mips/jal-empic-elf.d @@ -0,0 +1,26 @@ +#objdump: -dr --prefix-addresses -mmips:3000 --show-raw-insn +#name: MIPS jal-empic-elf +#as: -mips1 -membedded-pic +#source: jal.s + +# Test the jal macro with -membedded-pic. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 0320f809 jalr t9 +0+0004 <[^>]*> 00000000 nop +0+0008 <[^>]*> 03202009 jalr a0,t9 +0+000c <[^>]*> 00000000 nop +0+0010 <[^>]*> 0411ffff bal 0+0010 <text_label\+0x10> +[ ]*10: R_MIPS_GNU_REL16_S2 .text +0+0014 <[^>]*> 00000000 nop +0+0018 <[^>]*> 0411ffff bal 0+0018 <text_label\+0x18> +[ ]*18: R_MIPS_GNU_REL16_S2 external_text_label +0+001c <[^>]*> 00000000 nop +0+0020 <[^>]*> 1000ffff b 0+0020 <text_label\+0x20> +[ ]*20: R_MIPS_GNU_REL16_S2 .text +0+0024 <[^>]*> 00000000 nop +0+0028 <[^>]*> 1000ffff b 0+0028 <text_label\+0x28> +[ ]*28: R_MIPS_GNU_REL16_S2 external_text_label +0+002c <[^>]*> 00000000 nop diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 82b2446..2b977d3 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -70,6 +70,9 @@ if { [istarget mips*-*-*] } then { # It appears that it broke between 2000-03-11 00:00UTC and # 2000-03-12 00:00 UTC. if $ecoff { run_dump_test "jal-empic" } + if $elf { run_dump_test "jal-empic-elf" } + if $elf { run_dump_test "jal-empic-elf-2" } + if $elf { run_dump_test "jal-empic-elf-3" } if !$aout { run_dump_test "la" } if $elf { run_dump_test "la-svr4pic" } if $elf { run_dump_test "la-xgot" } |