diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/micromips@mips32r2.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32-mt.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32-mt.s | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32r2.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips32r2.s | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 1 |
8 files changed, 20 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 5296794..ad677ba 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,4 +1,12 @@ 2011-12-08 Andrew Pinski <apinski@cavium.com> + + * gas/mips/mips32-mt.d: Add pause instruction encoding to the end. + * gas/mips/micromips@mips32r2.d: Likewise. + * gas/mips/mips32r2.d: Likewise. + * gas/mips/mips32-mt.s: Add pause instruction to the end. + * gas/mips/mips32r2.s: Likewise. + +2011-12-08 Andrew Pinski <apinski@cavium.com> Adam Nemet <anemet@caviumnetworks.com> * gas/mips/mips.exp: Add Octeon2 for an architecture. diff --git a/gas/testsuite/gas/mips/micromips@mips32r2.d b/gas/testsuite/gas/mips/micromips@mips32r2.d index c898e58..3e0bf9c 100644 --- a/gas/testsuite/gas/mips/micromips@mips32r2.d +++ b/gas/testsuite/gas/mips/micromips@mips32r2.d @@ -41,4 +41,5 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 000a 577c ei \$10 [0-9a-f]+ <[^>]*> 0159 e17c rdpgpr \$10,\$25 [0-9a-f]+ <[^>]*> 0159 f17c wrpgpr \$10,\$25 +[0-9a-f]+ <[^>]*> 0000 2800 pause \.\.\. diff --git a/gas/testsuite/gas/mips/mips32-mt.d b/gas/testsuite/gas/mips/mips32-mt.d index e1c4cf3..f2807f9 100644 --- a/gas/testsuite/gas/mips/mips32-mt.d +++ b/gas/testsuite/gas/mips/mips32-mt.d @@ -631,4 +631,5 @@ Disassembly of section .text: 0+09b0 <[^>]*> 418d7035 mttr t5,t6,1,5,1 0+09b4 <[^>]*> 418d7036 mttr t5,t6,1,6,1 0+09b8 <[^>]*> 418d7037 mttr t5,t6,1,7,1 +0+09bc <[^>]*> 00000140 pause \.\.\. diff --git a/gas/testsuite/gas/mips/mips32-mt.s b/gas/testsuite/gas/mips/mips32-mt.s index 8363256..9819cb1 100644 --- a/gas/testsuite/gas/mips/mips32-mt.s +++ b/gas/testsuite/gas/mips/mips32-mt.s @@ -630,5 +630,7 @@ text_label: mttr $13,$14,1,6,1 mttr $13,$14,1,7,1 + pause + # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... .space 8 diff --git a/gas/testsuite/gas/mips/mips32r2.d b/gas/testsuite/gas/mips/mips32r2.d index 5d72709..0b04de6 100644 --- a/gas/testsuite/gas/mips/mips32r2.d +++ b/gas/testsuite/gas/mips/mips32r2.d @@ -40,4 +40,5 @@ Disassembly of section .text: 0+0078 <[^>]*> 416a6020 ei \$10 0+007c <[^>]*> 41595000 rdpgpr \$10,\$25 0+0080 <[^>]*> 41d95000 wrpgpr \$10,\$25 +0+0084 <[^>]*> 00000140 pause ... diff --git a/gas/testsuite/gas/mips/mips32r2.s b/gas/testsuite/gas/mips/mips32r2.s index 8dc6a51..a91a8fc 100644 --- a/gas/testsuite/gas/mips/mips32r2.s +++ b/gas/testsuite/gas/mips/mips32r2.s @@ -63,5 +63,7 @@ text_label: wrpgpr $10, $25 + pause + # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... .space 8 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6f1ccbf..2c835d5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,4 +1,8 @@ 2011-12-08 Andrew Pinski <apinski@cavium.com> + + * mips-opc.c (mips_builtin_opcodes): Add "pause". + +2011-12-08 Andrew Pinski <apinski@cavium.com> Adam Nemet <anemet@caviumnetworks.com> * mips-dis.c (mips_arch_choices): Add Octeon2. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index ce92b12..4083c1a 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1189,6 +1189,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, 0, I1 }, {"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, SB1 }, {"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_S|RD_T|FP_D, WR_MACC, SB1 }, +{"pause", "", 0x00000140, 0xffffffff, TRAP, 0, I33 }, {"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, SB1 }, {"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 }, {"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T, 0, N54 }, |