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-rw-r--r--gas/testsuite/ChangeLog10
-rw-r--r--gas/testsuite/gas/h8300/h8300-coff.exp2
-rw-r--r--gas/testsuite/gas/h8300/h8300.exp2
-rw-r--r--gas/testsuite/gas/h8300/pr3134.d11
-rw-r--r--gas/testsuite/gas/h8300/pr3134.s7
-rw-r--r--include/opcode/ChangeLog8
-rw-r--r--include/opcode/h8300.h3
7 files changed, 41 insertions, 2 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 882b684..233414c 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2008-02-27 Nick Clifton <nickc@redhat.com>
+
+ PR 3134
+ * gas/h8300/pr3134.s: New test.
+ * gas/h8300/pr3134.d: Expected disassembly
+ * gas/h8300/h8300.exp: Run the new test.
+
+ * gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
+ accept h8300-rtemscoff not just h8300-rtems.
+
2008-02-26 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/jump.d: Updated for COFF.
diff --git a/gas/testsuite/gas/h8300/h8300-coff.exp b/gas/testsuite/gas/h8300/h8300-coff.exp
index d6b9c9c..a7cf080 100644
--- a/gas/testsuite/gas/h8300/h8300-coff.exp
+++ b/gas/testsuite/gas/h8300/h8300-coff.exp
@@ -264,7 +264,7 @@ proc do_h8300s_branch {} {
if { [istarget h8300*-*-coff]
|| [istarget h8300*-*-hms*]
- || [istarget h8300*-*-rtems*] } then {
+ || [istarget h8300*-*-rtemscoff*] } then {
# Test the basic h8300 instruction parser
do_h8300_cbranch
diff --git a/gas/testsuite/gas/h8300/h8300.exp b/gas/testsuite/gas/h8300/h8300.exp
index 104a882..1441806 100644
--- a/gas/testsuite/gas/h8300/h8300.exp
+++ b/gas/testsuite/gas/h8300/h8300.exp
@@ -2244,4 +2244,6 @@ if [istarget h8300*-*-*] then {
set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*]]
gas_test "cmpsi2.s" "" "" "cmpsi2.s"
+
+ run_dump_test "pr3134"
}
diff --git a/gas/testsuite/gas/h8300/pr3134.d b/gas/testsuite/gas/h8300/pr3134.d
new file mode 100644
index 0000000..305474e
--- /dev/null
+++ b/gas/testsuite/gas/h8300/pr3134.d
@@ -0,0 +1,11 @@
+# objdump: -wd
+# name: Check that both encodings of mov.l (disp32) are accepted (PR 3134)
+
+.*: *file format elf32-h8300.*
+
+Disassembly of section \.text:
+
+0+00 <\.text>:
+ .*:[ ]+01 00 78 80 6b a0 00 00 00 00[ ]+mov.l[ ]+er0,@\(0x0:32,er0\)
+ .*:[ ]+01 00 78 80 6b a0 00 00 00 00[ ]+mov.l[ ]+er0,@\(0x0:32,er0\)
+ .*:[ ]+01 00 78 00 6b a0 00 00 00 00[ ]+mov.l[ ]+er0,@\(0x0:32,er0\)
diff --git a/gas/testsuite/gas/h8300/pr3134.s b/gas/testsuite/gas/h8300/pr3134.s
new file mode 100644
index 0000000..7c4ebf7
--- /dev/null
+++ b/gas/testsuite/gas/h8300/pr3134.s
@@ -0,0 +1,7 @@
+ .h8300s
+
+ mov er0, @(0:32,er0)
+
+ .byte 1, 0, 0x78, 0x80, 0x6b, 0xa0, 0, 0, 0, 0
+ .byte 1, 0, 0x78, 0x00, 0x6b, 0xa0, 0, 0, 0, 0
+
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 1de316e..1782853 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,11 @@
+2008-02-27 Markus Gyger <markus+sw@gyger.org>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 3134
+ * h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
+ with a 32-bit displacement but without the top bit of the 4th byte
+ set.
+
2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
* cr16.h (cr16_num_optab): Declared.
diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h
index 10fdf52..32e43c7 100644
--- a/include/opcode/h8300.h
+++ b/include/opcode/h8300.h
@@ -1,6 +1,6 @@
/* Opcode table for the H8/300
Copyright 1991, 1992, 1993, 1994, 1996, 1997, 1998, 2000, 2001, 2002,
- 2003, 2004
+ 2003, 2004, 2008
Free Software Foundation, Inc.
Written by Steve Chamberlain <sac@cygnus.com>.
@@ -1519,6 +1519,7 @@ struct h8_opcode h8_opcodes[] =
{O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP16DST, E}}, {{PREFIX_0100, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 6, "mov.l", {{RS32, DISP32DST, E}}, {{0x7, 0x8, B31 | DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
{O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP32DST, E}}, {{PREFIX_0100, 0x7, 0x8, B31 | DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
+ {O (O_MOV, SL), AV_H8H, 6, "mov.l", {{RS32, DISP32DST, E}}, {{PREFIX_0100, 0x7, 0x8, DSTDISPREG, 0x0, 0x6, 0xb, 0xa, RS32, DSTDISP32LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXB16D, E}}, {{PREFIX_0101, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXW16D, E}}, {{PREFIX_0102, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{RS32, INDEXL16D, E}}, {{PREFIX_0103, 0x6, 0xf, B31 | DSTDISPREG, RS32, DSTDISP16LIST, E}}},