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-rw-r--r--binutils/ChangeLog4
-rw-r--r--binutils/testsuite/binutils-all/objdump.exp2
-rw-r--r--gas/ChangeLog17
-rw-r--r--gas/testsuite/gas/all/gas.exp4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-11.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-12.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-13.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-14.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-15.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-16.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-17.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-18.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-5.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-6.d4
-rw-r--r--gas/testsuite/gas/elf/dwarf2-7.d4
-rw-r--r--gas/testsuite/gas/elf/elf.exp2
16 files changed, 49 insertions, 24 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 9331392..5c1aa0a 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2017-08-02 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/binutils-all/objdump.exp (cpus_expected): Add am33-2.
+
2017-08-02 Alan Modra <amodra@gmail.com>
* readelf.c (is_32bit_abs_reloc): Add R_IA64_SECREL32MSB and
diff --git a/binutils/testsuite/binutils-all/objdump.exp b/binutils/testsuite/binutils-all/objdump.exp
index 472b749..83b9af6 100644
--- a/binutils/testsuite/binutils-all/objdump.exp
+++ b/binutils/testsuite/binutils-all/objdump.exp
@@ -34,7 +34,7 @@ send_user "Version [binutil_version $OBJDUMP]"
set got [binutils_run $OBJDUMP "$OBJDUMPFLAGS -i"]
set cpus_expected [list]
-lappend cpus_expected aarch64 alpha arc ARC700 ARCv2 arm cris
+lappend cpus_expected aarch64 alpha am33-2 arc ARC700 ARCv2 arm cris
lappend cpus_expected d10v d30v fr30 fr500 fr550 h8 hppa i386 i860 i960 iamcu ip2022
lappend cpus_expected m16c m32c m32r m68hc11 m68hc12 m68k m88k MCore mep c5 h1 MicroBlaze
lappend cpus_expected mips mn10200 mn10300 ms1 msp MSP430 nds32 n1h_v3 ns32k
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 81ce3f7..38ec539 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,20 @@
+2017-08-02 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/all/gas.exp: Add am33 to the skip lists of tests
+ passed over by the mn10300 target.
+ * testsuite/gas/elf/elf.exp: Likewise.
+ * testsuite/gas/elf/dwarf2-11.d: Correct skip of am33 target.
+ * testsuite/gas/elf/dwarf2-12.d: Likewise.
+ * testsuite/gas/elf/dwarf2-13.d: Likewise.
+ * testsuite/gas/elf/dwarf2-14.d: Likewise.
+ * testsuite/gas/elf/dwarf2-15.d: Likewise.
+ * testsuite/gas/elf/dwarf2-16.d: Likewise.
+ * testsuite/gas/elf/dwarf2-17.d: Likewise.
+ * testsuite/gas/elf/dwarf2-18.d: Likewise.
+ * testsuite/gas/elf/dwarf2-5.d: Likewise.
+ * testsuite/gas/elf/dwarf2-6.d: Likewise.
+ * testsuite/gas/elf/dwarf2-7.d: Likewise.
+
2017-08-01 H.J. Lu <hongjiu.lu@intel.com>
PR gas/21874
diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp
index e43947d..365cabc 100644
--- a/gas/testsuite/gas/all/gas.exp
+++ b/gas/testsuite/gas/all/gas.exp
@@ -92,6 +92,7 @@ gas_test_error "assign-bad.s" "" "== assignment for symbol already set"
# .equ works differently on some targets.
# linkrelax-ing prevents most forward references from working.
case $target_triplet in {
+ { am3*-*-* } { }
{ *c54x*-*-* } { }
{ cr16*-*-* } { }
{ crx*-*-* } { }
@@ -139,6 +140,7 @@ if { ![is_aout_format] } {
# pdp11 gets unexpected reloc types.
case $target_triplet in {
{ alpha*-*-* } { }
+ { am3*-*-* } { }
{ cr16*-*-* } { }
{ crx*-*-* } { }
{ h8300-*-* } { }
@@ -278,7 +280,7 @@ if { ![istarget *c30*-*-*]
# The vax fails because VMS can apparently actually handle this
# case in relocs, so gas doesn't handle it itself.
# msp430, mn10[23]00 and riscv emit two relocs to handle the difference of two symbols.
- setup_xfail "mn10200-*-*" "mn10300*-*-*" "msp430*-*-*" "riscv*-*-*" "vax*-*-vms*"
+ setup_xfail "am3*-*-*" "mn10200-*-*" "mn10300*-*-*" "msp430*-*-*" "riscv*-*-*" "vax*-*-vms*"
do_930509a
}
diff --git a/gas/testsuite/gas/elf/dwarf2-11.d b/gas/testsuite/gas/elf/dwarf2-11.d
index 797d50d..636d21b 100644
--- a/gas/testsuite/gas/elf/dwarf2-11.d
+++ b/gas/testsuite/gas/elf/dwarf2-11.d
@@ -1,10 +1,10 @@
#as:
#readelf: -wL
#name: DWARF2 11
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* m32c-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* m32c-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Decoded dump of debug contents of section \.debug_line:
diff --git a/gas/testsuite/gas/elf/dwarf2-12.d b/gas/testsuite/gas/elf/dwarf2-12.d
index 0e1bc9b..4caaa46 100644
--- a/gas/testsuite/gas/elf/dwarf2-12.d
+++ b/gas/testsuite/gas/elf/dwarf2-12.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 12
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
diff --git a/gas/testsuite/gas/elf/dwarf2-13.d b/gas/testsuite/gas/elf/dwarf2-13.d
index 6961a6b..cbbc199 100644
--- a/gas/testsuite/gas/elf/dwarf2-13.d
+++ b/gas/testsuite/gas/elf/dwarf2-13.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 13
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-14.d b/gas/testsuite/gas/elf/dwarf2-14.d
index 88af145..f553e83 100644
--- a/gas/testsuite/gas/elf/dwarf2-14.d
+++ b/gas/testsuite/gas/elf/dwarf2-14.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 14
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-15.d b/gas/testsuite/gas/elf/dwarf2-15.d
index c7280e5..6badad9 100644
--- a/gas/testsuite/gas/elf/dwarf2-15.d
+++ b/gas/testsuite/gas/elf/dwarf2-15.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 15
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-16.d b/gas/testsuite/gas/elf/dwarf2-16.d
index b01292e..d01bd79 100644
--- a/gas/testsuite/gas/elf/dwarf2-16.d
+++ b/gas/testsuite/gas/elf/dwarf2-16.d
@@ -1,11 +1,11 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 16
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-17.d b/gas/testsuite/gas/elf/dwarf2-17.d
index 8c5c287..c5de9e3 100644
--- a/gas/testsuite/gas/elf/dwarf2-17.d
+++ b/gas/testsuite/gas/elf/dwarf2-17.d
@@ -1,11 +1,11 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 17
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 00 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-18.d b/gas/testsuite/gas/elf/dwarf2-18.d
index 08f1af8..437bb2f 100644
--- a/gas/testsuite/gas/elf/dwarf2-18.d
+++ b/gas/testsuite/gas/elf/dwarf2-18.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 18
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 0100 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-5.d b/gas/testsuite/gas/elf/dwarf2-5.d
index 6525c2e..8b2ea2a 100644
--- a/gas/testsuite/gas/elf/dwarf2-5.d
+++ b/gas/testsuite/gas/elf/dwarf2-5.d
@@ -1,11 +1,11 @@
#as:
#readelf: -x.rodata -wlL
#name: DWARF2 5
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 rx and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 rx and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The mep target tries to relay code sections which breaks symbolic view computations.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* rx-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mep-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* rx-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01010201 010203 *.*
diff --git a/gas/testsuite/gas/elf/dwarf2-6.d b/gas/testsuite/gas/elf/dwarf2-6.d
index 93489d6..2b67102 100644
--- a/gas/testsuite/gas/elf/dwarf2-6.d
+++ b/gas/testsuite/gas/elf/dwarf2-6.d
@@ -1,8 +1,8 @@
#as:
#readelf: -wlL
#name: DWARF2 6
-# These targets either do not support or do not evaluate the subtraction of symbols at assembly time
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* xtensa-*
+# These targets either do not support or do not evaluate the subtraction of symbols at assembly time.
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* xtensa-*
Raw dump of debug contents of section .debug_line:
diff --git a/gas/testsuite/gas/elf/dwarf2-7.d b/gas/testsuite/gas/elf/dwarf2-7.d
index 8782d6b..0e7963d 100644
--- a/gas/testsuite/gas/elf/dwarf2-7.d
+++ b/gas/testsuite/gas/elf/dwarf2-7.d
@@ -1,10 +1,10 @@
#as:
#readelf: -x.rodata -wL
#name: DWARF2 7
-# The am3 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time
+# The am33 avr cr16 crx mn10 msp430 nds32 pru rl78 and xtensa targets do not evaluate the subtraction of symbols at assembly time.
# The riscv targets do not support the subtraction of symbols.
# The tile targets require 8-byte instructions, but the test only simulates 4-byte instructions.
-#not-target: am3-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
+#not-target: am3*-* avr-* cr16-* crx-* mn10*-* msp430-* nds32*-* pru-* riscv*-* rl78-* tile*-* xtensa-*
Hex dump of section '\.rodata':
0x00000000 01 *.*
diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp
index c04c74b..1284619 100644
--- a/gas/testsuite/gas/elf/elf.exp
+++ b/gas/testsuite/gas/elf/elf.exp
@@ -93,6 +93,7 @@ if { [is_elf_format] } then {
# optimization because it interfers with link-time relaxation of
# function prologues.
if {![istarget "mn10300-*-*"]
+ && ![istarget "am3*-*-*"]
&& ![istarget "xtensa*-*-*"]
&& ![istarget "msp430*-*-*"]
&& ![istarget "nds32*-*-*"]
@@ -138,6 +139,7 @@ if { [is_elf_format] } then {
}
case $target_triplet in {
{ alpha*-*-* } { }
+ { am3*-*-* } { }
{ *c54x*-*-* } { }
{ cr16*-*-* } { }
{ crx*-*-* } { }
generated by cgit v1.1 at 2024-11-04 01:55:34 +0000