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-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/i386-dis.c6
2 files changed, 10 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6093843..8131817 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2016-11-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-dis.c (REG_82): Renamed to ...
+ (REG_83): This.
+ (dis386): Updated.
+ (reg_table): Likewise.
+
2016-11-02 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 56b3407..8fb607c 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -706,7 +706,7 @@ enum
{
REG_80 = 0,
REG_81,
- REG_82,
+ REG_83,
REG_8F,
REG_C0,
REG_C1,
@@ -2663,7 +2663,7 @@ static const struct dis386 dis386[] = {
{ REG_TABLE (REG_80) },
{ REG_TABLE (REG_81) },
{ Bad_Opcode },
- { REG_TABLE (REG_82) },
+ { REG_TABLE (REG_83) },
{ "testB", { Eb, Gb }, 0 },
{ "testS", { Ev, Gv }, 0 },
{ "xchgB", { Ebh2, Gb }, 0 },
@@ -3400,7 +3400,7 @@ static const struct dis386 reg_table[][8] = {
{ "xorQ", { Evh1, Iv }, 0 },
{ "cmpQ", { Ev, Iv }, 0 },
},
- /* REG_82 */
+ /* REG_83 */
{
{ "addQ", { Evh1, sIb }, 0 },
{ "orQ", { Evh1, sIb }, 0 },