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-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-mips.c13
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/mips.h9
-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/mips-dis.c7
-rw-r--r--opcodes/mips-opc.c8
7 files changed, 33 insertions, 21 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 3450c83..6b60e2d 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,11 @@
2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+ * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
+ Require the msb to be <= 31 for "+s". Check that the size is <= 31
+ for both "+s" and "+S".
+
+2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+
* config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
(mips_ip, mips16_ip): Handle "+i".
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 9d058af..7acb5e2 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -12016,8 +12016,7 @@ mips_ip (char *str, struct mips_cl_insn *ip)
(unsigned long) imm_expr.X_add_number);
imm_expr.X_add_number = 0;
}
- /* Make the pos explicit to simplify +S. */
- lastpos = imm_expr.X_add_number + 32;
+ lastpos = imm_expr.X_add_number;
INSERT_OPERAND (0, CINSPOS, *ip, imm_expr.X_add_number);
imm_expr.X_op = O_absent;
s = expr_end;
@@ -12039,11 +12038,12 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case 's':
- /* cins and exts length-minus-one field. */
+ /* cins32 and exts32 length-minus-one field. */
gas_assert (!mips_opts.micromips);
my_getExpression (&imm_expr, s);
check_absolute_expr (ip, &imm_expr);
- if ((unsigned long) imm_expr.X_add_number > 31)
+ if ((unsigned long) imm_expr.X_add_number > 31
+ || (unsigned long) imm_expr.X_add_number + lastpos > 31)
{
as_bad (_("Improper size (%lu)"),
(unsigned long) imm_expr.X_add_number);
@@ -12055,12 +12055,11 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case 'S':
- /* cins32/exts32 and cins/exts aliasing cint32/exts32
- length-minus-one field. */
+ /* cins/exts length-minus-one field. */
gas_assert (!mips_opts.micromips);
my_getExpression (&imm_expr, s);
check_absolute_expr (ip, &imm_expr);
- if ((long) imm_expr.X_add_number < 0
+ if ((unsigned long) imm_expr.X_add_number > 31
|| (unsigned long) imm_expr.X_add_number + lastpos > 63)
{
as_bad (_("Improper size (%lu)"),
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index b2b718c..b3bee6f 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,5 +1,9 @@
2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+ * mips.h: Update documentation of "+s" and "+S".
+
+2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+
* mips.h: Document "+i".
2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index d25b136..b583a51 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -508,11 +508,10 @@ struct mips_opcode
"+P" Position field of cins/exts aliasing cins32/exts32. Matches if
32 <= pos < 64, otherwise skips to next candidate.
"+Q" Immediate field of seqi/snei. Enforces -512 <= imm < 512.
- "+s" Length-minus-one field of cins/exts. Enforces: 0 <= lenm1 < 32.
- "+S" Length-minus-one field of cins32/exts32 or cins/exts aliasing
- cint32/exts32. Enforces non-negative value and that
- pos + lenm1 < 32 or pos + lenm1 < 64 depending whether previous
- position field is "+p" or "+P".
+ "+s" Length-minus-one field of cins32/exts32. Requires msb position
+ of the field to be <= 31.
+ "+S" Length-minus-one field of cins/exts. Requires msb position
+ of the field to be <= 63.
Loongson-3A:
"+a" 8-bit signed offset in bit 6 (OP_*_OFFSET_A)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 68b263f..4521f91 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,12 @@
2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+ * mips-opc.c (mips_builtin_opcodes): Use "+s" for "cins32" and
+ "+S" for "cins".
+ * mips-dis.c (print_mips_arg): Update "+s" and "+S" comments.
+ Combine cases.
+
+2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
+
* mips-opc.c (mips_builtin_opcodes): Use "+i" rather than "a" for
"jalx".
* mips16-opc.c (mips16_opcodes): Likewise.
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 9ef7247..5777232 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1072,11 +1072,8 @@ print_insn_args (const char *d,
infprintf (is, "0x%x", GET_OP (l, CINSPOS));
break;
- case 's': /* cins and exts length-minus-one */
- infprintf (is, "0x%x", GET_OP (l, CINSLM1));
- break;
-
- case 'S': /* cins32 and exts32 length-minus-one field */
+ case 's': /* cins32 and exts32 length-minus-one */
+ case 'S': /* cins and exts length-minus-one field */
infprintf (is, "0x%x", GET_OP (l, CINSLM1));
break;
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 6d709ee..26ecea4 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -625,9 +625,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"cftc1", "d,E", 0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0, 0, MT32 },
{"cftc1", "d,T", 0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0, 0, MT32 },
{"cftc2", "d,E", 0x41000025, 0xffe007ff, TRAP|LCD|WR_d|RD_C2, 0, 0, MT32, IOCT|IOCTP|IOCT2 },
-{"cins32", "t,r,+p,+S",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT },
+{"cins32", "t,r,+p,+s",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT },
{"cins", "t,r,+P,+S",0x70000033, 0xfc00003f, WR_t|RD_s, 0, IOCT }, /* cins32 */
-{"cins", "t,r,+p,+s",0x70000032, 0xfc00003f, WR_t|RD_s, 0, IOCT },
+{"cins", "t,r,+p,+S",0x70000032, 0xfc00003f, WR_t|RD_s, 0, IOCT },
{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 },
{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 },
{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1, 0, IOCT|IOCTP|IOCT2 },
@@ -813,9 +813,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32 },
{"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, 0, MT32 },
{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33 },
-{"exts32", "t,r,+p,+S",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT },
+{"exts32", "t,r,+p,+s",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT },
{"exts", "t,r,+P,+S",0x7000003b, 0xfc00003f, WR_t|RD_s, 0, IOCT }, /* exts32 */
-{"exts", "t,r,+p,+s",0x7000003a, 0xfc00003f, WR_t|RD_s, 0, IOCT },
+{"exts", "t,r,+p,+S",0x7000003a, 0xfc00003f, WR_t|RD_s, 0, IOCT },
{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, 0, I3_33 },
{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3_33 },
{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2, 0, SF },