diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/vfp1xD.d | 16 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 2 |
4 files changed, 19 insertions, 9 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 088409d..71ad483 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2005-07-07 Nick Clifton <nickc@redhat.com> + + * gas/arm/vfp1xD.d: Adjust expected fadds disassemblies now that + the dissassembler has been fixed. + 2005-05-07 Paul Brook <paul@codesourcery.com> * gas/ppc/altivec.d: Match all powerpc target vecs. diff --git a/gas/testsuite/gas/arm/vfp1xD.d b/gas/testsuite/gas/arm/vfp1xD.d index ac4e4f9..096b46c 100644 --- a/gas/testsuite/gas/arm/vfp1xD.d +++ b/gas/testsuite/gas/arm/vfp1xD.d @@ -82,16 +82,16 @@ Disassembly of section .text: 0+120 <[^>]*> eeb11a40 fnegs s2, s0 0+124 <[^>]*> eef1fa40 fnegs s31, s0 0+128 <[^>]*> eeb16a6a fnegs s12, s21 -0+12c <[^>]*> ee300a20 fadds s0, s0, s0 -0+130 <[^>]*> ee300a01 fadds s0, s0, s0 -0+134 <[^>]*> ee300a2f fadds s0, s0, s0 +0+12c <[^>]*> ee300a20 fadds s0, s0, s1 +0+130 <[^>]*> ee300a01 fadds s0, s0, s2 +0+134 <[^>]*> ee300a2f fadds s0, s0, s31 0+138 <[^>]*> ee300a80 fadds s0, s1, s0 0+13c <[^>]*> ee310a00 fadds s0, s2, s0 0+140 <[^>]*> ee3f0a80 fadds s0, s31, s0 -0+144 <[^>]*> ee700a00 fadds s1, s0, s1 -0+148 <[^>]*> ee301a00 fadds s2, s0, s2 -0+14c <[^>]*> ee70fa00 fadds s31, s0, s31 -0+150 <[^>]*> ee3a6aa2 fadds s12, s21, s12 +0+144 <[^>]*> ee700a00 fadds s1, s0, s0 +0+148 <[^>]*> ee301a00 fadds s2, s0, s0 +0+14c <[^>]*> ee70fa00 fadds s31, s0, s0 +0+150 <[^>]*> ee3a6aa2 fadds s12, s21, s5 0+154 <[^>]*> eeb80ae0 fsitos s0, s1 0+158 <[^>]*> eeb80ac1 fsitos s0, s2 0+15c <[^>]*> eeb80aef fsitos s0, s31 @@ -194,7 +194,7 @@ Disassembly of section .text: 0+2e0 <[^>]*> 0ef0fa69 fcpyseq s31, s19 0+2e4 <[^>]*> 0eb1aa44 fnegseq s20, s8 0+2e8 <[^>]*> 0ef12ae3 fsqrtseq s5, s7 -0+2ec <[^>]*> 0e323a82 faddseq s6, s5, s6 +0+2ec <[^>]*> 0e323a82 faddseq s6, s5, s4 0+2f0 <[^>]*> 0ec11a20 fdivseq s3, s2, s1 0+2f4 <[^>]*> 0e4ffa2e fmacseq s31, s30, s29 0+2f8 <[^>]*> 0e1dea8d fmscseq s28, s27, s26 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index af7b4f9..3fa5367 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2005-07-07 Khem Raj <kraj@mvista.com> + + * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction + disassembly pattern. + 2005-07-06 Alan Modra <amodra@bigpond.net.au> * Makefile.am (stamp-m32r): Fix path to cpu files. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index d136af1..faff3a0 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -460,7 +460,7 @@ static const struct opcode32 arm_opcodes[] = {FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fff0ff0, "fabsd%c\t%1z, %0z"}, {FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "fabss%c\t%1y, %0y"}, {FPU_VFP_EXT_V1, 0x0e300b00, 0x0ff00ff0, "faddd%c\t%1z, %2z, %0z"}, - {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "fadds%c\t%1y, %2y, %1y"}, + {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "fadds%c\t%1y, %2y, %0y"}, {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fff0f70, "fcmp%7'ed%c\t%1z, %0z"}, {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "fcmp%7'es%c\t%1y, %0y"}, {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fff0f70, "fcmp%7'ezd%c\t%1z"}, |