diff options
| -rw-r--r-- | gdb/ChangeLog | 7 | ||||
| -rw-r--r-- | gdb/config/d10v/tm-d10v.h | 5 | ||||
| -rw-r--r-- | gdb/d10v-tdep.c | 5 |
3 files changed, 17 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 29de17d..e037f83 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +Wed Feb 9 01:14:54 2000 Andrew Cagney <cagney@amy.cygnus.com> + + * config/d10v/tm-d10v.h (NO_EXTRA_ALIGNMENT_NEEDED): Define. + * config/d10v/tm-d10v.h (STACK_ALIGN): Define. + (d10v_stack_align): Declare. + * d10v-tdep.c (d10v_stack_align): Define. + 1999-08-23 J.T. Conklin <jtc@redback.com> * top.c (remote_timeout): Change default to 2. Add comment diff --git a/gdb/config/d10v/tm-d10v.h b/gdb/config/d10v/tm-d10v.h index e2fe383..a0eb3dc 100644 --- a/gdb/config/d10v/tm-d10v.h +++ b/gdb/config/d10v/tm-d10v.h @@ -24,3 +24,8 @@ extern int d10v_register_sim_regno (int reg); #define REGISTER_SIM_REGNO(NR) d10v_register_sim_regno((NR)) + +extern CORE_ADDR d10v_stack_align (CORE_ADDR size); +#define STACK_ALIGN(SIZE) (d10v_stack_align (SIZE)) + +#define NO_EXTRA_ALIGNMENT_NEEDED 1 diff --git a/gdb/d10v-tdep.c b/gdb/d10v-tdep.c index 68afb8c..cfd70b0 100644 --- a/gdb/d10v-tdep.c +++ b/gdb/d10v-tdep.c @@ -104,6 +104,11 @@ d10v_frame_chain_valid (chain, frame) return ((chain) != 0 && (frame) != 0 && (frame)->pc > IMEM_START); } +CORE_ADDR +d10v_stack_align (CORE_ADDR len) +{ + return (len + 1) & ~1; +} /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc |