diff options
| -rw-r--r-- | gas/ChangeLog | 4 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 30 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/thumb2_vpool_be.d | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/vldconst_be.d | 4 |
5 files changed, 27 insertions, 22 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index afe33bf..2266429 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2015-04-28 Renlin Li <renlin.li@arm.com> + + * config/tc-arm.c (arm_init_frag): Always emit mapping symbols. + 2015-04-28 Nick Clifton <nickc@redhat.com> PR 18313 diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 78b1ae5..5ce4da5 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -21028,24 +21028,22 @@ arm_init_frag (fragS * fragP, int max_chars) /* If the current ARM vs THUMB mode has not already been recorded into this frag then do so now. */ if ((fragP->tc_frag_data.thumb_mode & MODE_RECORDED) == 0) - { fragP->tc_frag_data.thumb_mode = thumb_mode | MODE_RECORDED; - /* Record a mapping symbol for alignment frags. We will delete this - later if the alignment ends up empty. */ - switch (fragP->fr_type) - { - case rs_align: - case rs_align_test: - case rs_fill: - mapping_state_2 (MAP_DATA, max_chars); - break; - case rs_align_code: - mapping_state_2 (thumb_mode ? MAP_THUMB : MAP_ARM, max_chars); - break; - default: - break; - } + /* Record a mapping symbol for alignment frags. We will delete this + later if the alignment ends up empty. */ + switch (fragP->fr_type) + { + case rs_align: + case rs_align_test: + case rs_fill: + mapping_state_2 (MAP_DATA, max_chars); + break; + case rs_align_code: + mapping_state_2 (thumb_mode ? MAP_THUMB : MAP_ARM, max_chars); + break; + default: + break; } } diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index afa8fd0..d0167be 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-04-28 Renlin Li <renlin.li@arm.com> + + * gas/arm/thumb2_vpool_be.d: Adjust the desired output. + * gas/arm/vldconst_be.d: Ditto. + 2015-04-27 Peter Bergner <bergner@vnet.ibm.com> * gas/ppc/a2.s: Fixup test case due to dcbt/dcbtst embedded operand diff --git a/gas/testsuite/gas/arm/thumb2_vpool_be.d b/gas/testsuite/gas/arm/thumb2_vpool_be.d index 816cddc..15aafa5 100644 --- a/gas/testsuite/gas/arm/thumb2_vpool_be.d +++ b/gas/testsuite/gas/arm/thumb2_vpool_be.d @@ -125,8 +125,7 @@ Disassembly of section .text: 000001c8 <thumb2_ldr\+0x1c8> 0ff00fff .word 0x0ff00fff 000001cc <thumb2_ldr\+0x1cc> f0000000 .word 0xf0000000 000001d0 <thumb2_ldr\+0x1d0> ed9f 1b01 vldr d1, \[pc, #4\] ; 000001d8 <thumb2_ldr\+0x1d8> -000001d4 <thumb2_ldr\+0x1d4> 0000 movs r0, r0 -000001d6 <thumb2_ldr\+0x1d6> 0000 movs r0, r0 +000001d4 <thumb2_ldr\+0x1d4> 00000000 .word 0x00000000 000001d8 <thumb2_ldr\+0x1d8> 0000fff0 .word 0x0000fff0 000001dc <thumb2_ldr\+0x1dc> 00000000 .word 0x00000000 000001e0 <thumb2_ldr\+0x1e0> f101 0000 add.w r0, r1, #0 @@ -150,8 +149,7 @@ Disassembly of section .text: 00000228 <thumb2_ldr\+0x228> eddf 7a03 vldr s15, \[pc, #12\] ; 00000238 <thumb2_ldr\+0x238> 0000022c <thumb2_ldr\+0x22c> eddf 0b14 vldr d16, \[pc, #80\] ; 00000280 <thumb2_ldr\+0x280> 00000230 <thumb2_ldr\+0x230> eddf 1b15 vldr d17, \[pc, #84\] ; 00000288 <thumb2_ldr\+0x288> -00000234 <thumb2_ldr\+0x234> 0000 movs r0, r0 -00000236 <thumb2_ldr\+0x236> 0000 movs r0, r0 +00000234 <thumb2_ldr\+0x234> 00000000 .word 0x00000000 00000238 <thumb2_ldr\+0x238> 0000fff0 .word 0x0000fff0 0000023c <thumb2_ldr\+0x23c> 00000000 .word 0x00000000 00000240 <thumb2_ldr\+0x240> ff000000 .word 0xff000000 diff --git a/gas/testsuite/gas/arm/vldconst_be.d b/gas/testsuite/gas/arm/vldconst_be.d index cf3dbf9..f99371b 100644 --- a/gas/testsuite/gas/arm/vldconst_be.d +++ b/gas/testsuite/gas/arm/vldconst_be.d @@ -236,7 +236,7 @@ Disassembly of section .text: 00000388 <foo\+0x388> 0000fff0 .word 0x0000fff0 0000038c <foo\+0x38c> 00000000 .word 0x00000000 00000390 <foo\+0x390> ed9f1b00 vldr d1, \[pc\] ; 00000398 <foo\+0x398> -00000394 <foo\+0x394> 00000000 andeq r0, r0, r0 +00000394 <foo\+0x394> 00000000 .word 0x00000000 00000398 <foo\+0x398> 0000fff0 .word 0x0000fff0 0000039c <foo\+0x39c> 00000000 .word 0x00000000 000003a0 <foo\+0x3a0> e2810000 add r0, r1, #0 @@ -260,7 +260,7 @@ Disassembly of section .text: 000003e8 <foo\+0x3e8> eddf7a02 vldr s15, \[pc, #8\] ; 000003f8 <foo\+0x3f8> 000003ec <foo\+0x3ec> eddf0b13 vldr d16, \[pc, #76\] ; 00000440 <foo\+0x440> 000003f0 <foo\+0x3f0> eddf1b14 vldr d17, \[pc, #80\] ; 00000448 <foo\+0x448> -000003f4 <foo\+0x3f4> 00000000 andeq r0, r0, r0 +000003f4 <foo\+0x3f4> 00000000 .word 0x00000000 000003f8 <foo\+0x3f8> 0000fff0 .word 0x0000fff0 000003fc <foo\+0x3fc> 00000000 .word 0x00000000 00000400 <foo\+0x400> ff000000 .word 0xff000000 |