diff options
| -rw-r--r-- | include/opcode/ChangeLog | 84 | ||||
| -rw-r--r-- | include/opcode/arc.h | 6 | ||||
| -rw-r--r-- | include/opcode/d10v.h | 2 | ||||
| -rw-r--r-- | include/opcode/d30v.h | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 30 | ||||
| -rw-r--r-- | opcodes/cris-dis.c | 4 | ||||
| -rw-r--r-- | opcodes/d10v-dis.c | 6 | ||||
| -rw-r--r-- | opcodes/h8300-dis.c | 8 | ||||
| -rw-r--r-- | opcodes/h8500-dis.c | 4 | ||||
| -rw-r--r-- | opcodes/ns32k-dis.c | 13 | ||||
| -rw-r--r-- | opcodes/pj-dis.c | 3 | ||||
| -rw-r--r-- | opcodes/sh-dis.c | 9 | ||||
| -rw-r--r-- | opcodes/tic54x-dis.c | 61 | ||||
| -rw-r--r-- | opcodes/v850-dis.c | 5 | ||||
| -rw-r--r-- | opcodes/v850-opc.c | 62 | ||||
| -rw-r--r-- | opcodes/vax-dis.c | 10 | ||||
| -rw-r--r-- | opcodes/w65-dis.c | 5 | ||||
| -rw-r--r-- | opcodes/z8k-dis.c | 6 |
18 files changed, 219 insertions, 101 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 981de9e..d38f8fb 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,11 @@ +2001-08-25 Andreas Jaeger <aj@suse.de> + + * d30v.h: Fix declaration of reg_name_cnt. + + * d10v.h: Fix declaration of d10v_reg_name_cnt. + + * arc.h: Add prototypes from opcodes/arc-opc.c. + 2001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * mips.h (INSN_10000): Define. @@ -32,7 +40,7 @@ 2001-05-23 John Healy <jhealy@redhat.com> * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48. - + 2001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> * mips.h (INSN_ISA_MASK): Define. @@ -169,7 +177,7 @@ * i386.h (i386_optab): Replace "Imm" with "EncImm". (i386_regtab): Add flags field. - + 2000-12-12 Nick Clifton <nickc@redhat.com> * mips.h: Fix formatting. @@ -194,7 +202,7 @@ (ISA_UNKNOWN): New constant to indicate unknown ISA. (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5, ISA_MIPS32): New constants, defined to be the mask of INSN_* - constants available at that ISA level. + constants available at that ISA level. (CPU_UNKNOWN): New constant to indicate unknown CPU. (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter, define it with a unique value. @@ -202,7 +210,7 @@ constant meanings. * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New - definitions. + definitions. * mips.h (CPU_SB1): New constant. @@ -216,21 +224,21 @@ * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. 2000-09-13 Anders Norlander <anorland@acc.umu.se> - + * mips.h: Use defines instead of hard-coded processor numbers. (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010, - CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650, + CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650, CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K, CPU_4KC, CPU_4KM, CPU_4KP): Define.. (OPCODE_IS_MEMBER): Use new defines. - (OP_MASK_SEL, OP_SH_SEL): Define. + (OP_MASK_SEL, OP_SH_SEL): Define. (OP_MASK_CODE20, OP_SH_CODE20): Define. - Add 'P' to used characters. - Use 'H' for coprocessor select field. + Add 'P' to used characters. + Use 'H' for coprocessor select field. Use 'm' for 20 bit breakpoint code. - Document new arg characters and add to used characters. - (INSN_MIPS32): New define for MIPS32 extensions. - (OPCODE_IS_MEMBER): Recognize MIPS32 instructions. + Document new arg characters and add to used characters. + (INSN_MIPS32): New define for MIPS32 extensions. + (OPCODE_IS_MEMBER): Recognize MIPS32 instructions. 2000-09-05 Alan Modra <alan@linuxcare.com.au> @@ -410,7 +418,7 @@ Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com> * cgen.h (CGEN_INSN_MACH_HAS_P): New macro. (CGEN_CPU_TABLE): flags: new field. Add prototypes for new functions. - + 2000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Add some more UNIXWARE_COMPAT comments. @@ -528,7 +536,7 @@ Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com) Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Use 'fX' for first register operand - in xmpyu. + in xmpyu. * hppa.h (pa_opcodes): Fix mask for probe and probei. @@ -614,7 +622,7 @@ Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com> * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT. - * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd, + * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd, and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'. 1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au> @@ -642,7 +650,7 @@ Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com> Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com) * hppa.h (pa_opcodes): Move integer arithmetic instructions after - integer logical instructions. + integer logical instructions. 1999-05-28 Linus Nordberg <linus.nordberg@canit.se> @@ -659,7 +667,7 @@ Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com) - * hppa.h (pa_opcodes): Add second entry for "comb", "comib", + * hppa.h (pa_opcodes): Add second entry for "comb", "comib", "addb", and "addib" to be used by the disassembler. 1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au> @@ -770,7 +778,7 @@ Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com> (CGEN_INSN_ATTR): New type. Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com> - + * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define. (x_FP, d_FP, dls_FP, sldx_FP): Define. Change *Suf definitions to include x and d suffixes. @@ -811,16 +819,16 @@ Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com> Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com> The following is part of a change made by Edith Epstein - <eepstein@sophia.cygnus.com> as part of a project to merge in - changes by HP; HP did not create ChangeLog entries. + <eepstein@sophia.cygnus.com> as part of a project to merge in + changes by HP; HP did not create ChangeLog entries. * hppa.h (completer_chars): list of chars to not put a space - after. + after. Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com> * i386.h (i386_optab): Permit w suffix on processor control and - status word instructions. + status word instructions. 1998-11-30 Doug Evans <devans@casey.cygnus.com> @@ -881,7 +889,7 @@ Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com> Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com) * hppa.h: Add "fid". - + Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au> From Robert Andrew Dale <rob@nb.net> @@ -935,7 +943,7 @@ Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com) * mn10300.h: Add "machine" field for instructions. (MN103, AM30): Define machine types. - + Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au> * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor. @@ -1540,9 +1548,9 @@ Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com) Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu> * alpha.h: Don't include "bfd.h"; private relocation types are now - negative to minimize problems with shared libraries. Organize - instruction subsets by AMASK extensions and PALcode - implementation. + negative to minimize problems with shared libraries. Organize + instruction subsets by AMASK extensions and PALcode + implementation. (struct alpha_operand): Move flags slot for better packing. Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com) @@ -1595,9 +1603,9 @@ Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com) Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com> * v850.h (v850_operands): Add insert and extract fields, pointers - to functions used to handle unusual operand encoding. + to functions used to handle unusual operand encoding. (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC, - V850_OPERAND_SIGNED): Defined. + V850_OPERAND_SIGNED): Defined. Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com> @@ -1611,11 +1619,11 @@ Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com> Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk> * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM, - OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC, - OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT, - OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE, - OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT): - Defined. + OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC, + OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT, + OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE, + OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT): + Defined. Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com) @@ -1625,7 +1633,7 @@ Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com) Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h: Add some additional defines to support the - assembler in determining which operations can be done in parallel. + assembler in determining which operations can be done in parallel. Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com) @@ -1641,7 +1649,7 @@ Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com> Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com> * d10v.h: Changes for divs, parallel-only instructions, and - signed numbers. + signed numbers. Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com> @@ -1663,7 +1671,7 @@ Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com) Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com> - * m68k.h (mcf5200): New macro. + * m68k.h (mcf5200): New macro. Document names of coldfire control registers. Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com) @@ -1813,7 +1821,7 @@ Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com) Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk> * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific - instructions. + instructions. Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com> diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 81e5bd8..b137840 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -313,3 +313,9 @@ const struct arc_operand_value *arc_opcode_lookup_suffix PARAMS ((const struct arc_operand *type, int value)); int arc_opcode_supported PARAMS ((const struct arc_opcode *)); int arc_opval_supported PARAMS ((const struct arc_operand_value *)); +int arc_limm_fixup_adjust PARAMS ((arc_insn)); +int arc_insn_is_j PARAMS ((arc_insn)); +int arc_insn_not_jl PARAMS ((arc_insn)); +int arc_operand_type PARAMS ((int)); +struct arc_operand_value *get_ext_suffix PARAMS ((char *)); +int arc_get_noshortcut_flag PARAMS ((void)); diff --git a/include/opcode/d10v.h b/include/opcode/d10v.h index a1fe770..2298b5e 100644 --- a/include/opcode/d10v.h +++ b/include/opcode/d10v.h @@ -190,7 +190,7 @@ struct pd_reg }; extern const struct pd_reg d10v_predefined_registers[]; -int d10v_reg_name_cnt(); +int d10v_reg_name_cnt PARAMS ((void)); /* an expressionS only has one register type, so we fake it */ /* by setting high bits to indicate type */ diff --git a/include/opcode/d30v.h b/include/opcode/d30v.h index 6cbc257..c18874b 100644 --- a/include/opcode/d30v.h +++ b/include/opcode/d30v.h @@ -32,7 +32,7 @@ struct pd_reg }; extern const struct pd_reg pre_defined_registers[]; -int reg_name_cnt(); +int reg_name_cnt PARAMS ((void)); /* the number of control registers */ #define MAX_CONTROL_REG 64 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ec5bdcc..9949ecf 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,33 @@ +2001-08-25 Andreas Jaeger <aj@suse.de> + + * tic54x-dis.c: Add unused attributes where needed. + + * z8k-dis.c (output_instr): Add unused attribute. + + * h8300-dis.c: Add missing prototypes. + (bfd_h8_disassemble): Make static. + + * cris-dis.c: Add missing prototype. + * h8500-dis.c: Likewise. + * m68hc11-dis.c: Likewise. + * pj-dis.c: Likewise. + * tic54x-dis.c: Likewise. + * v850-dis.c: Likewise. + * vax-dis.c: Likewise. + * w65-dis.c: Likewise. + * z8k-dis.c: Likewise. + + * d10v-dis.c: Add missing prototype. + (dis_long): Remove unused variable. + (dis_2_short): Likewise. + + * sh-dis.c: Add missing prototypes. + * v850-opc.c: Likewise. + Add unused attributes where needed. + + * ns32k-dis.c: Add missing prototypes. + (bit_extract_simple): Remove unused variable. + 2001-08-23 Martin Schwidefsky <schwidefsky@de.ibm.com> * opcodes/s390-opc.c: Add "low or high" and "not low or high" diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c index 68c8899..dcd9911 100644 --- a/opcodes/cris-dis.c +++ b/opcodes/cris-dis.c @@ -7,7 +7,7 @@ This file is part of the GNU binutils and GDB, the GNU debugger. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free -Software Foundation; either version 2 of the License, or (at your option) +Software Foundation; either version 2, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT @@ -97,6 +97,8 @@ static int print_insn_cris_with_register_prefix PARAMS ((bfd_vma, disassemble_info *)); static int print_insn_cris_without_register_prefix PARAMS ((bfd_vma, disassemble_info *)); +static const struct cris_opcode *get_opcode_entry + PARAMS ((unsigned int, unsigned int)); /* Return the descriptor of a special register. FIXME: Depend on a CPU-version specific argument when all machinery diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c index 31ce526..29996ad 100644 --- a/opcodes/d10v-dis.c +++ b/opcodes/d10v-dis.c @@ -29,6 +29,9 @@ static void dis_2_short PARAMS ((unsigned long insn, bfd_vma memaddr, struct disassemble_info *info, int order)); static void dis_long PARAMS ((unsigned long insn, bfd_vma memaddr, struct disassemble_info *info)); +static void print_operand + PARAMS ((struct d10v_operand *, long unsigned int, struct d10v_opcode *, + bfd_vma, struct disassemble_info *)); int print_insn_d10v (memaddr, info) @@ -192,7 +195,6 @@ dis_long (insn, memaddr, info) struct disassemble_info *info; { int i; - char buf[32]; struct d10v_opcode *op = (struct d10v_opcode *) d10v_opcodes; struct d10v_operand *oper; int need_paren = 0; @@ -235,10 +237,8 @@ dis_2_short (insn, memaddr, info, order) int order; { int i, j; - char astr[2][32]; unsigned int ins[2]; struct d10v_opcode *op; - char buf[32]; int match, num_match = 0; struct d10v_operand *oper; int need_paren = 0; diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c index ab95db4..c521c77 100644 --- a/opcodes/h8300-dis.c +++ b/opcodes/h8300-dis.c @@ -1,5 +1,5 @@ /* Disassemble h8300 instructions. - Copyright 1993, 1994, 1996, 1998, 2000 Free Software Foundation, Inc. + Copyright 1993, 1994, 1996, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -23,6 +23,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "dis-asm.h" #include "opintl.h" +static void bfd_h8_disassemble_init PARAMS ((void)); +static unsigned int bfd_h8_disassemble + PARAMS ((bfd_vma, disassemble_info *, int)); + /* Run through the opcodes and sort them into order to make them easy to disassemble. */ static void @@ -58,7 +62,7 @@ bfd_h8_disassemble_init () } } -unsigned int +static unsigned int bfd_h8_disassemble (addr, info, mode) bfd_vma addr; disassemble_info *info; diff --git a/opcodes/h8500-dis.c b/opcodes/h8500-dis.c index 437207c..6237182 100644 --- a/opcodes/h8500-dis.c +++ b/opcodes/h8500-dis.c @@ -1,5 +1,5 @@ /* Disassemble h8500 instructions. - Copyright 1993, 1998, 2000 Free Software Foundation, Inc. + Copyright 1993, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -30,6 +30,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include <setjmp.h> +static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); + struct private { /* Points to first byte not fetched. */ diff --git a/opcodes/ns32k-dis.c b/opcodes/ns32k-dis.c index 610e373..53367ab 100644 --- a/opcodes/ns32k-dis.c +++ b/opcodes/ns32k-dis.c @@ -1,5 +1,5 @@ /* Print National Semiconductor 32000 instructions. - Copyright 1986, 1988, 1991, 1992, 1994, 1998 + Copyright 1986, 1988, 1991, 1992, 1994, 1998, 2001 Free Software Foundation, Inc. This file is part of opcodes library. @@ -39,6 +39,16 @@ static int print_insn_arg PARAMS ((int, int, int *, char *, bfd_vma, char *, int)); static int get_displacement PARAMS ((char *, int *)); static int invalid_float PARAMS ((char *, int)); +static long int read_memory_integer PARAMS ((unsigned char *, int)); +static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); +struct ns32k_option; +static void optlist PARAMS ((int, const struct ns32k_option *, char *)); +static void list_search PARAMS ((int, const struct ns32k_option *, char *)); +static int bit_extract PARAMS ((bfd_byte *, int, int)); +static int bit_extract_simple PARAMS ((bfd_byte *, int, int)); +static void bit_copy PARAMS ((char *, int, int, char *)); +static int sign_extend PARAMS ((int, int)); +static void flip_bytes PARAMS ((char *, int)); static long read_memory_integer(addr, nr) unsigned char *addr; @@ -308,7 +318,6 @@ bit_extract_simple (buffer, offset, count) int count; { int result; - int mask; int bit; buffer += offset >> 3; diff --git a/opcodes/pj-dis.c b/opcodes/pj-dis.c index d46c5f9..b8b81a9 100644 --- a/opcodes/pj-dis.c +++ b/opcodes/pj-dis.c @@ -23,6 +23,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ extern const pj_opc_info_t pj_opc_info[512]; +static int get_int PARAMS ((bfd_vma, int *, struct disassemble_info *)); + + static int get_int (memaddr, iptr, info) bfd_vma memaddr; diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c index 80ccfdc..e5fa9d2 100644 --- a/opcodes/sh-dis.c +++ b/opcodes/sh-dis.c @@ -1,5 +1,5 @@ /* Disassemble SH instructions. - Copyright 1993, 1994, 1995, 1997, 1998, 2000 + Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify @@ -26,6 +26,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define LITTLE_BIT 2 +static void print_movxy + PARAMS ((sh_opcode_info *, int, int, fprintf_ftype, void *)); +static void print_insn_ddt PARAMS ((int, struct disassemble_info *)); +static void print_dsp_reg PARAMS ((int, fprintf_ftype, void *)); +static void print_insn_ppi PARAMS ((int, struct disassemble_info *)); +static int print_insn_shx PARAMS ((bfd_vma, struct disassemble_info *)); + static void print_movxy (op, rn, rm, fprintf_fn, stream) sh_opcode_info *op; diff --git a/opcodes/tic54x-dis.c b/opcodes/tic54x-dis.c index 5c099d9..1db79e8 100644 --- a/opcodes/tic54x-dis.c +++ b/opcodes/tic54x-dis.c @@ -1,5 +1,5 @@ /* Disassembly routines for TMS320C54X architecture - Copyright 1999, 2000 Free Software Foundation, Inc. + Copyright 1999, 2000, 2001 Free Software Foundation, Inc. Contributed by Timothy Wall (twall@cygnus.com) This program is free software; you can redistribute it and/or modify @@ -31,20 +31,21 @@ typedef struct _instruction { partemplate *ptm; } instruction; +static int has_lkaddr PARAMS ((unsigned short, template *)); static int get_insn_size PARAMS ((unsigned short, instruction *)); -static int get_instruction PARAMS ((disassemble_info *, bfd_vma, +static int get_instruction PARAMS ((disassemble_info *, bfd_vma, unsigned short, instruction *)); -static int print_instruction PARAMS ((disassemble_info *, bfd_vma, - unsigned short, char *, +static int print_instruction PARAMS ((disassemble_info *, bfd_vma, + unsigned short, char *, enum optype [], int, int)); static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma, unsigned short, partemplate *, - int)); -static int sprint_dual_address (disassemble_info *,char [], + int)); +static int sprint_dual_address (disassemble_info *,char [], unsigned short); -static int sprint_indirect_address (disassemble_info *,char [], +static int sprint_indirect_address (disassemble_info *,char [], unsigned short); -static int sprint_direct_address (disassemble_info *,char [], +static int sprint_direct_address (disassemble_info *,char [], unsigned short); static int sprint_mmr (disassemble_info *,char [],int); static int sprint_condition (disassemble_info *,char *,unsigned short); @@ -55,7 +56,7 @@ print_insn_tic54x (memaddr, info) bfd_vma memaddr; disassemble_info *info; { - bfd_byte opbuf[2]; + bfd_byte opbuf[2]; unsigned short opcode; int status, size; instruction insn; @@ -84,8 +85,8 @@ print_insn_tic54x (memaddr, info) } else { - if (!print_instruction (info, memaddr, opcode, - (char *) insn.tm->name, + if (!print_instruction (info, memaddr, opcode, + (char *) insn.tm->name, insn.tm->operand_types, size, (insn.tm->flags & FL_EXT))) return -1; @@ -108,7 +109,7 @@ has_lkaddr (opcode, tm) /* always returns 1 (whether an insn template was found) since we provide an "unknown instruction" template */ -static int +static int get_instruction (info, addr, opcode, insn) disassemble_info *info; bfd_vma addr; @@ -162,7 +163,7 @@ get_instruction (info, addr, opcode, insn) return 1; } -static int +static int get_insn_size (opcode, insn) unsigned short opcode; instruction *insn; @@ -248,11 +249,11 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) if (mod == 15) info->fprintf_func (info->stream, "*("); else - info->fprintf_func (info->stream, "*%sar%d(", + info->fprintf_func (info->stream, "*%sar%d(", (mod == 13 || mod == 14 ? "+" : ""), arf); (*(info->print_address_func)) ((bfd_vma) addr, info); - info->fprintf_func (info->stream, ")%s", + info->fprintf_func (info->stream, ")%s", mod == 14 ? "%" : ""); } else @@ -407,7 +408,7 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) break; } case OP_k5: - sprintf (operand[i], "#%d", + sprintf (operand[i], "#%d", (int) (((signed char) opcode & 0x1F) << 3) >> 3); info->fprintf_func (info->stream, "%s%s", comma, operand[i]); break; @@ -431,15 +432,15 @@ print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) case OP_SBIT: { const char *status0[] = { - "0", "1", "2", "3", "4", "5", "6", "7", "8", + "0", "1", "2", "3", "4", "5", "6", "7", "8", "ovb", "ova", "c", "tc", "13", "14", "15" }; const char *status1[] = { - "0", "1", "2", "3", "4", + "0", "1", "2", "3", "4", "cmpt", "frct", "c16", "sxm", "ovm", "10", "intm", "hm", "xf", "cpl", "braf" }; - sprintf (operand[i], "%s", + sprintf (operand[i], "%s", n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]); info->fprintf_func (info->stream, "%s%s", comma, operand[i]); break; @@ -487,16 +488,16 @@ print_parallel_instruction (info, memaddr, opcode, ptm, size) partemplate *ptm; int size; { - print_instruction (info, memaddr, opcode, + print_instruction (info, memaddr, opcode, ptm->name, ptm->operand_types, size, 0); info->fprintf_func (info->stream, " || "); - return print_instruction (info, memaddr, opcode, + return print_instruction (info, memaddr, opcode, ptm->parname, ptm->paroperand_types, size, 0); } static int sprint_dual_address (info, buf, code) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char buf[]; unsigned short code; { @@ -511,7 +512,7 @@ sprint_dual_address (info, buf, code) static int sprint_indirect_address (info, buf, opcode) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char buf[]; unsigned short opcode; { @@ -534,7 +535,7 @@ sprint_indirect_address (info, buf, opcode) static int sprint_direct_address (info, buf, opcode) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char buf[]; unsigned short opcode; { @@ -544,7 +545,7 @@ sprint_direct_address (info, buf, opcode) static int sprint_mmr (info, buf, mmr) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char buf[]; int mmr; { @@ -564,7 +565,7 @@ sprint_mmr (info, buf, mmr) static int sprint_cc2 (info, buf, opcode) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char *buf; unsigned short opcode; { @@ -577,7 +578,7 @@ sprint_cc2 (info, buf, opcode) static int sprint_condition (info, buf, opcode) - disassemble_info *info; + disassemble_info *info ATTRIBUTE_UNUSED; char *buf; unsigned short opcode; { @@ -597,15 +598,15 @@ sprint_condition (info, buf, opcode) else if (opcode & 0x3F) { if (opcode & 0x30) - buf += sprintf (buf, "%s%s", + buf += sprintf (buf, "%s%s", ((opcode & 0x30) == 0x30) ? "tc" : "ntc", (opcode & 0x0F) ? ", " : ""); if (opcode & 0x0C) - buf += sprintf (buf, "%s%s", + buf += sprintf (buf, "%s%s", ((opcode & 0x0C) == 0x0C) ? "c" : "nc", (opcode & 0x03) ? ", " : ""); if (opcode & 0x03) - buf += sprintf (buf, "%s", + buf += sprintf (buf, "%s", ((opcode & 0x03) == 0x03) ? "bio" : "nbio"); } else diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c index 0f68867..e72b1e8 100644 --- a/opcodes/v850-dis.c +++ b/opcodes/v850-dis.c @@ -1,5 +1,5 @@ /* Disassemble V850 instructions. - Copyright 1996, 1997, 1998, 2000 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -41,6 +41,9 @@ static const char *const v850_cc_names[] = { "v", "c/l", "z", "nh", "s/n", "t", "lt", "le", "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt" }; +static int disassemble + PARAMS ((bfd_vma, struct disassemble_info *, unsigned long)); + static int disassemble (memaddr, info, insn) bfd_vma memaddr; diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index 20a4d6d..b77a280 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -1,5 +1,5 @@ /* Assemble V850 instructions. - Copyright 1996, 1997, 1998, 2000 Free Software Foundation, Inc. + Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -34,6 +34,42 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* two-word opcodes */ #define two(x,y) ((unsigned int) (x) | ((unsigned int) (y) << 16)) +static long unsigned int insert_d9 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d9 + PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d22 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d22 + PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d16_15 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d16_15 + PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d8_7 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d8_7 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d8_6 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d8_6 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d5_4 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d5_4 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_d16_16 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_d16_16 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_i9 + PARAMS ((long unsigned int, long int, const char **)); +static long unsigned int extract_i9 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_u9 + PARAMS ((long unsigned int, long unsigned int, const char **)); +static long unsigned int extract_u9 PARAMS ((long unsigned int, int *)); +static long unsigned int insert_spe + PARAMS ((long unsigned int, long unsigned int, const char **)); +static long unsigned int extract_spe PARAMS ((long unsigned int, int *)); +static long unsigned int insert_i5div + PARAMS ((long unsigned int, long unsigned int, const char **)); +static long unsigned int extract_i5div PARAMS ((long unsigned int, int *)); /* The functions used to insert and extract complicated operands. */ @@ -71,7 +107,7 @@ insert_d9 (insn, value, errmsg) static unsigned long extract_d9 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = ((insn & 0xf800) >> 7) | ((insn & 0x0070) >> 3); @@ -103,7 +139,7 @@ insert_d22 (insn, value, errmsg) static unsigned long extract_d22 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { signed long ret = ((insn & 0xfffe0000) >> 16) | ((insn & 0x3f) << 16); @@ -132,7 +168,7 @@ insert_d16_15 (insn, value, errmsg) static unsigned long extract_d16_15 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { signed long ret = (insn & 0xfffe0000); @@ -163,7 +199,7 @@ insert_d8_7 (insn, value, errmsg) static unsigned long extract_d8_7 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = (insn & 0x7f); @@ -194,7 +230,7 @@ insert_d8_6 (insn, value, errmsg) static unsigned long extract_d8_6 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = (insn & 0x7e); @@ -225,7 +261,7 @@ insert_d5_4 (insn, value, errmsg) static unsigned long extract_d5_4 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = (insn & 0x0f); @@ -247,7 +283,7 @@ insert_d16_16 (insn, value, errmsg) static unsigned long extract_d16_16 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { signed long ret = insn & 0xfffe0000; @@ -273,7 +309,7 @@ insert_i9 (insn, value, errmsg) static unsigned long extract_i9 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { signed long ret = insn & 0x003c0000; @@ -300,7 +336,7 @@ insert_u9 (insn, value, errmsg) static unsigned long extract_u9 (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = insn & 0x003c0000; @@ -325,8 +361,8 @@ insert_spe (insn, value, errmsg) static unsigned long extract_spe (insn, invalid) - unsigned long insn; - int * invalid; + unsigned long insn ATTRIBUTE_UNUSED; + int * invalid ATTRIBUTE_UNUSED; { return 3; } @@ -355,7 +391,7 @@ insert_i5div (insn, value, errmsg) static unsigned long extract_i5div (insn, invalid) unsigned long insn; - int * invalid; + int * invalid ATTRIBUTE_UNUSED; { unsigned long ret = insn & 0x3c0000; diff --git a/opcodes/vax-dis.c b/opcodes/vax-dis.c index e33f87e..9c9be01 100644 --- a/opcodes/vax-dis.c +++ b/opcodes/vax-dis.c @@ -21,12 +21,12 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "dis-asm.h" /* Local function prototypes */ -static int -print_insn_arg PARAMS ((const char *, unsigned char *, bfd_vma, - disassemble_info *)); +static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); +static int print_insn_arg + PARAMS ((const char *, unsigned char *, bfd_vma, disassemble_info *)); +static int print_insn_mode + PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *)); -static int -print_insn_mode PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *)); static char *reg_names[] = { diff --git a/opcodes/w65-dis.c b/opcodes/w65-dis.c index 8f08d63..8e9c724 100644 --- a/opcodes/w65-dis.c +++ b/opcodes/w65-dis.c @@ -1,5 +1,5 @@ /* Disassemble WDC 65816 instructions. - Copyright 1995, 1998, 2000 Free Software Foundation, Inc. + Copyright 1995, 1998, 2000, 2001 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -26,6 +26,9 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ static fprintf_ftype fpr; static void *stream; static struct disassemble_info *local_info; + +static void print_operand PARAMS ((int, char *, unsigned int *)); + #if 0 static char *lname[] = { "r0","r1","r2","r3","r4","r5","r6","r7","s0" }; diff --git a/opcodes/z8k-dis.c b/opcodes/z8k-dis.c index 754540f..dcba775 100644 --- a/opcodes/z8k-dis.c +++ b/opcodes/z8k-dis.c @@ -50,6 +50,9 @@ typedef struct { unsigned long interrupts; } instr_data_s; +static int fetch_data PARAMS ((struct disassemble_info *, int)); + + /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) to ADDR (exclusive) are valid. Returns 1 for success, longjmps on error. */ @@ -134,6 +137,7 @@ static char *ctrl_names[8] = { }; static int seg_length; +static int print_insn_z8k PARAMS ((bfd_vma, disassemble_info *, int)); int z8k_lookup_instr PARAMS ((unsigned char *, disassemble_info *)); static void output_instr PARAMS ((instr_data_s *, unsigned long, disassemble_info *)); @@ -274,7 +278,7 @@ z8k_lookup_instr (nibbles, info) static void output_instr (instr_data, addr, info) instr_data_s *instr_data; - unsigned long addr; + unsigned long addr ATTRIBUTE_UNUSED; disassemble_info *info; { int loop, loop_limit; |