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-rw-r--r--gdb/ChangeLog5
-rw-r--r--gdb/arm-linux-nat.c12
-rw-r--r--gdb/gdbserver/ChangeLog5
-rw-r--r--gdb/gdbserver/linux-arm-low.c6
4 files changed, 22 insertions, 6 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 4e83c25..7ca0070 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2012-07-30 Ulrich Weigand <ulrich.weigand@linaro.org>
+
+ * arm-linux-nat.c (arm_linux_hw_breakpoint_initialize): Do not
+ attempt to 4-byte-align HW breakpoint addresses for Thumb.
+
2012-07-30 Andrew Burgess <aburgess@broadcom.com>
* varobj.c (varobj_invalidate_iter): All varobj must be marked as
diff --git a/gdb/arm-linux-nat.c b/gdb/arm-linux-nat.c
index 2485a84..bf81c03 100644
--- a/gdb/arm-linux-nat.c
+++ b/gdb/arm-linux-nat.c
@@ -896,11 +896,17 @@ arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
/* We have to create a mask for the control register which says which bits
of the word pointed to by address to break on. */
if (arm_pc_is_thumb (gdbarch, address))
- mask = 0x3 << (address & 2);
+ {
+ mask = 0x3;
+ address &= ~1;
+ }
else
- mask = 0xf;
+ {
+ mask = 0xf;
+ address &= ~3;
+ }
- p->address = (unsigned int) (address & ~3);
+ p->address = (unsigned int) address;
p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
}
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 9875796..08a8d3a 100644
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,8 @@
+2012-07-30 Ulrich Weigand <ulrich.weigand@linaro.org>
+
+ * linux-arm-low.c (arm_linux_hw_point_initialize): Do not attempt
+ to 4-byte-align HW breakpoint addresses for Thumb.
+
2012-07-27 Yao Qi <yao@codesourcery.com>
PR remote/14161.
diff --git a/gdb/gdbserver/linux-arm-low.c b/gdb/gdbserver/linux-arm-low.c
index c4d2000..1037083 100644
--- a/gdb/gdbserver/linux-arm-low.c
+++ b/gdb/gdbserver/linux-arm-low.c
@@ -474,17 +474,17 @@ arm_linux_hw_point_initialize (char type, CORE_ADDR addr, int len,
{
case 2: /* 16-bit Thumb mode breakpoint */
case 3: /* 32-bit Thumb mode breakpoint */
- mask = 0x3 << (addr & 2);
+ mask = 0x3;
+ addr &= ~1;
break;
case 4: /* 32-bit ARM mode breakpoint */
mask = 0xf;
+ addr &= ~3;
break;
default:
/* Unsupported. */
return -1;
}
-
- addr &= ~3;
}
else
{