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-rw-r--r--gdb/ChangeLog6
-rw-r--r--gdb/arm-tdep.c29
-rw-r--r--gdb/testsuite/ChangeLog6
-rw-r--r--gdb/testsuite/gdb.arch/arm-disp-step.S37
-rw-r--r--gdb/testsuite/gdb.arch/arm-disp-step.exp37
5 files changed, 104 insertions, 11 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 10d816f..a02e058 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,9 @@
+2011-02-15 Yao Qi <yao@codesourcery.com>
+
+ PR tdep/12352
+ * arm-tdep.c (copy_ldr_str_ldrb_strb): Replace PC with SP in
+ order to store PC value on stack instead of text section.
+
2011-02-15 Thiago Jung Bauermann <bauerman@br.ibm.com>
* rs6000-tdep.c (IS_EFP_PSEUDOREG): Use correct constant for
diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
index 9dfbf49..6a279d1 100644
--- a/gdb/arm-tdep.c
+++ b/gdb/arm-tdep.c
@@ -5930,16 +5930,24 @@ copy_ldr_str_ldrb_strb (struct gdbarch *gdbarch, uint32_t insn,
/* To write PC we can do:
- scratch+0: str pc, temp (*temp = scratch + 8 + offset)
- scratch+4: ldr r4, temp
- scratch+8: sub r4, r4, pc (r4 = scratch + 8 + offset - scratch - 8 - 8)
- scratch+12: add r4, r4, #8 (r4 = offset)
- scratch+16: add r0, r0, r4
- scratch+20: str r0, [r2, #imm] (or str r0, [r2, r3])
- scratch+24: <temp>
+ Before this sequence of instructions:
+ r0 is the PC value got from displaced_read_reg, so r0 = from + 8;
+ r2 is the Rn value got from dispalced_read_reg.
+
+ Insn1: push {pc} Write address of STR instruction + offset on stack
+ Insn2: pop {r4} Read it back from stack, r4 = addr(Insn1) + offset
+ Insn3: sub r4, r4, pc r4 = addr(Insn1) + offset - pc
+ = addr(Insn1) + offset - addr(Insn3) - 8
+ = offset - 16
+ Insn4: add r4, r4, #8 r4 = offset - 8
+ Insn5: add r0, r0, r4 r0 = from + 8 + offset - 8
+ = from + offset
+ Insn6: str r0, [r2, #imm] (or str r0, [r2, r3])
Otherwise we don't know what value to write for PC, since the offset is
- architecture-dependent (sometimes PC+8, sometimes PC+12). */
+ architecture-dependent (sometimes PC+8, sometimes PC+12). More details
+ of this can be found in Section "Saving from r15" in
+ http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204g/Cihbjifh.html */
if (load || rt != 15)
{
@@ -5960,9 +5968,8 @@ copy_ldr_str_ldrb_strb (struct gdbarch *gdbarch, uint32_t insn,
{
/* We need to use r4 as scratch. Make sure it's restored afterwards. */
dsc->u.ldst.restore_r4 = 1;
-
- dsc->modinsn[0] = 0xe58ff014; /* str pc, [pc, #20]. */
- dsc->modinsn[1] = 0xe59f4010; /* ldr r4, [pc, #16]. */
+ dsc->modinsn[0] = 0xe92d8000; /* push {pc} */
+ dsc->modinsn[1] = 0xe8bd0010; /* pop {r4} */
dsc->modinsn[2] = 0xe044400f; /* sub r4, r4, pc. */
dsc->modinsn[3] = 0xe2844008; /* add r4, r4, #8. */
dsc->modinsn[4] = 0xe0800004; /* add r0, r0, r4. */
diff --git a/gdb/testsuite/ChangeLog b/gdb/testsuite/ChangeLog
index 2ce11ab..7b26a01 100644
--- a/gdb/testsuite/ChangeLog
+++ b/gdb/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-02-15 Yao Qi <yao@codesourcery.com>
+
+ PR tdep/12352
+ * gdb.arch/arm-disp-step.S : New test for str instruction.
+ * gdb.arch/arm-disp-step.exp : Likewise.
+
2011-02-15 Thiago Jung Bauermann <bauerman@br.ibm.com>
* gdb.arch/vsx-regs.exp: Add "vector_register1_vr" and
diff --git a/gdb/testsuite/gdb.arch/arm-disp-step.S b/gdb/testsuite/gdb.arch/arm-disp-step.S
index e1756e7..fb76974 100644
--- a/gdb/testsuite/gdb.arch/arm-disp-step.S
+++ b/gdb/testsuite/gdb.arch/arm-disp-step.S
@@ -48,6 +48,10 @@ test_ret_end:
bl test_ldm_stm_pc
#endif
+ /* Test str in ARM mode and Thumb-2 */
+#if !defined(__thumb__)
+ bl test_str_pc
+#endif
/* Return */
mov sp, r7
sub sp, sp, #4
@@ -118,3 +122,36 @@ test_ldm_stm_pc_ret:
.word test_ldm_stm_pc_ret
.size test_ldm_stm_pc, .-test_ldm_stm_pc
#endif
+
+#if !defined(__thumb__)
+#if defined (__thumb2__)
+ .code 16
+ .thumb_func
+#endif
+ .global test_str_pc
+ .type test_str_pc, %function
+test_str_pc:
+ str pc, [sp, #-4]
+ ldr r0, [sp, #-4]
+ sub r0, r0, pc
+ /* compute offset again without displaced stepping. */
+ str pc, [sp, #-4]
+ ldr r1, [sp, #-4]
+ sub r1, r1, pc
+
+ /* r0 should be equal to r1. */
+ cmp r0, r1
+ bne pc_offset_wrong
+
+ .global pc_offset_right
+pc_offset_right:
+ b test_str_pc_end
+
+ .global pc_offset_wrong
+pc_offset_wrong:
+ nop
+
+ .global test_str_pc_end
+test_str_pc_end:
+ bx lr
+#endif
diff --git a/gdb/testsuite/gdb.arch/arm-disp-step.exp b/gdb/testsuite/gdb.arch/arm-disp-step.exp
index 841bfce..3bea521 100644
--- a/gdb/testsuite/gdb.arch/arm-disp-step.exp
+++ b/gdb/testsuite/gdb.arch/arm-disp-step.exp
@@ -126,6 +126,42 @@ proc test_ldr_from_pc {} {
".*bx lr.*"
}
+###########################################
+
+proc test_str_pc {} {
+ global srcfile
+ gdb_test_multiple "break *test_str_pc" "break test_str_pc" {
+ -re "Breakpoint.*at.* file .*$srcfile, line.*" {
+ pass "break test_str_pc"
+ }
+ -re "No symbol.*" {
+ pass "break test_str_pc"
+ return
+ }
+ }
+ gdb_test "break *test_str_pc_end" \
+ "Breakpoint.*at.* file .*$srcfile, line.*" \
+ "break test_str_pc_end"
+
+ # Set breakpoint on both lables pc_offset_right and pc_offset_wrong
+ gdb_test "break *pc_offset_right" \
+ "Breakpoint.*at.* file .*$srcfile, line.*" \
+ "break pc_offset_right"
+ gdb_test "break *pc_offset_wrong" \
+ "Breakpoint.*at.* file .*$srcfile, line.*" \
+ "break pc_offset_wrong"
+
+ gdb_continue_to_breakpoint "continue to test_str_pc" \
+ ".*str.*pc\,.*\[sp, #-4\].*"
+ # If breakpoint on lable pc_offset_wrong is hit, that means the offset
+ # computed in displaced stepping is different from offset computed
+ # without displaced stepping. Report a failure.
+ gdb_continue_to_breakpoint "continue to pc_offset_right" \
+ ".*b.*test_str_pc_end.*"
+ gdb_continue_to_breakpoint "continue to test_str_pc_end" \
+ ".*bx lr.*"
+}
+
# Get things started.
clean_restart ${testfile}
@@ -165,6 +201,7 @@ test_ldr_from_pc
test_ldm_stm_pc
+test_str_pc
##########################################
# Done, run program to exit.