diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-lwp.d | 384 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-lwp.s | 384 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 9 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 15 |
5 files changed, 597 insertions, 201 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 4d398a4..931e92c 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2009-11-06 Sebastian Pop <sebastian.pop@amd.com> + + * gas/i386/x86-64-lwp.s: Updated to also contain patterns + with r[8-15] registers. + * gas/i386/x86-64-lwp.d: Same. + 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> Quentin Neill <quentin.neill@amd.com> diff --git a/gas/testsuite/gas/i386/x86-64-lwp.d b/gas/testsuite/gas/i386/x86-64-lwp.d index 3f70446..33c3748 100644 --- a/gas/testsuite/gas/i386/x86-64-lwp.d +++ b/gas/testsuite/gas/i386/x86-64-lwp.d @@ -14,6 +14,14 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f e9 78 12 c5[ ]+llwpcb %bp [ ]*[a-f0-9]+: 8f e9 78 12 c6[ ]+llwpcb %si [ ]*[a-f0-9]+: 8f e9 78 12 c7[ ]+llwpcb %di +[ ]*[a-f0-9]+: 8f c9 78 12 c0[ ]+llwpcb %r8w +[ ]*[a-f0-9]+: 8f c9 78 12 c1[ ]+llwpcb %r9w +[ ]*[a-f0-9]+: 8f c9 78 12 c2[ ]+llwpcb %r10w +[ ]*[a-f0-9]+: 8f c9 78 12 c3[ ]+llwpcb %r11w +[ ]*[a-f0-9]+: 8f c9 78 12 c4[ ]+llwpcb %r12w +[ ]*[a-f0-9]+: 8f c9 78 12 c5[ ]+llwpcb %r13w +[ ]*[a-f0-9]+: 8f c9 78 12 c6[ ]+llwpcb %r14w +[ ]*[a-f0-9]+: 8f c9 78 12 c7[ ]+llwpcb %r15w [ ]*[a-f0-9]+: 8f e9 7c 12 c0[ ]+llwpcb %eax [ ]*[a-f0-9]+: 8f e9 7c 12 c1[ ]+llwpcb %ecx [ ]*[a-f0-9]+: 8f e9 7c 12 c2[ ]+llwpcb %edx @@ -22,6 +30,14 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f e9 7c 12 c5[ ]+llwpcb %ebp [ ]*[a-f0-9]+: 8f e9 7c 12 c6[ ]+llwpcb %esi [ ]*[a-f0-9]+: 8f e9 7c 12 c7[ ]+llwpcb %edi +[ ]*[a-f0-9]+: 8f c9 7c 12 c0[ ]+llwpcb %r8d +[ ]*[a-f0-9]+: 8f c9 7c 12 c1[ ]+llwpcb %r9d +[ ]*[a-f0-9]+: 8f c9 7c 12 c2[ ]+llwpcb %r10d +[ ]*[a-f0-9]+: 8f c9 7c 12 c3[ ]+llwpcb %r11d +[ ]*[a-f0-9]+: 8f c9 7c 12 c4[ ]+llwpcb %r12d +[ ]*[a-f0-9]+: 8f c9 7c 12 c5[ ]+llwpcb %r13d +[ ]*[a-f0-9]+: 8f c9 7c 12 c6[ ]+llwpcb %r14d +[ ]*[a-f0-9]+: 8f c9 7c 12 c7[ ]+llwpcb %r15d [ ]*[a-f0-9]+: 8f e9 f8 12 c0[ ]+llwpcb %rax [ ]*[a-f0-9]+: 8f e9 f8 12 c1[ ]+llwpcb %rcx [ ]*[a-f0-9]+: 8f e9 f8 12 c2[ ]+llwpcb %rdx @@ -30,6 +46,22 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f e9 f8 12 c5[ ]+llwpcb %rbp [ ]*[a-f0-9]+: 8f e9 f8 12 c6[ ]+llwpcb %rsi [ ]*[a-f0-9]+: 8f e9 f8 12 c7[ ]+llwpcb %rdi +[ ]*[a-f0-9]+: 8f c9 f8 12 c0[ ]+llwpcb %r8 +[ ]*[a-f0-9]+: 8f c9 f8 12 c1[ ]+llwpcb %r9 +[ ]*[a-f0-9]+: 8f c9 f8 12 c2[ ]+llwpcb %r10 +[ ]*[a-f0-9]+: 8f c9 f8 12 c3[ ]+llwpcb %r11 +[ ]*[a-f0-9]+: 8f c9 f8 12 c4[ ]+llwpcb %r12 +[ ]*[a-f0-9]+: 8f c9 f8 12 c5[ ]+llwpcb %r13 +[ ]*[a-f0-9]+: 8f c9 f8 12 c6[ ]+llwpcb %r14 +[ ]*[a-f0-9]+: 8f c9 f8 12 c7[ ]+llwpcb %r15 +[ ]*[a-f0-9]+: 8f c9 f8 12 cf[ ]+slwpcb %r15 +[ ]*[a-f0-9]+: 8f c9 f8 12 ce[ ]+slwpcb %r14 +[ ]*[a-f0-9]+: 8f c9 f8 12 cd[ ]+slwpcb %r13 +[ ]*[a-f0-9]+: 8f c9 f8 12 cc[ ]+slwpcb %r12 +[ ]*[a-f0-9]+: 8f c9 f8 12 cb[ ]+slwpcb %r11 +[ ]*[a-f0-9]+: 8f c9 f8 12 ca[ ]+slwpcb %r10 +[ ]*[a-f0-9]+: 8f c9 f8 12 c9[ ]+slwpcb %r9 +[ ]*[a-f0-9]+: 8f c9 f8 12 c8[ ]+slwpcb %r8 [ ]*[a-f0-9]+: 8f e9 f8 12 cf[ ]+slwpcb %rdi [ ]*[a-f0-9]+: 8f e9 f8 12 ce[ ]+slwpcb %rsi [ ]*[a-f0-9]+: 8f e9 f8 12 cd[ ]+slwpcb %rbp @@ -38,6 +70,14 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f e9 f8 12 ca[ ]+slwpcb %rdx [ ]*[a-f0-9]+: 8f e9 f8 12 c9[ ]+slwpcb %rcx [ ]*[a-f0-9]+: 8f e9 f8 12 c8[ ]+slwpcb %rax +[ ]*[a-f0-9]+: 8f c9 7c 12 cf[ ]+slwpcb %r15d +[ ]*[a-f0-9]+: 8f c9 7c 12 ce[ ]+slwpcb %r14d +[ ]*[a-f0-9]+: 8f c9 7c 12 cd[ ]+slwpcb %r13d +[ ]*[a-f0-9]+: 8f c9 7c 12 cc[ ]+slwpcb %r12d +[ ]*[a-f0-9]+: 8f c9 7c 12 cb[ ]+slwpcb %r11d +[ ]*[a-f0-9]+: 8f c9 7c 12 ca[ ]+slwpcb %r10d +[ ]*[a-f0-9]+: 8f c9 7c 12 c9[ ]+slwpcb %r9d +[ ]*[a-f0-9]+: 8f c9 7c 12 c8[ ]+slwpcb %r8d [ ]*[a-f0-9]+: 8f e9 7c 12 cf[ ]+slwpcb %edi [ ]*[a-f0-9]+: 8f e9 7c 12 ce[ ]+slwpcb %esi [ ]*[a-f0-9]+: 8f e9 7c 12 cd[ ]+slwpcb %ebp @@ -46,6 +86,14 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f e9 7c 12 ca[ ]+slwpcb %edx [ ]*[a-f0-9]+: 8f e9 7c 12 c9[ ]+slwpcb %ecx [ ]*[a-f0-9]+: 8f e9 7c 12 c8[ ]+slwpcb %eax +[ ]*[a-f0-9]+: 8f c9 78 12 cf[ ]+slwpcb %r15w +[ ]*[a-f0-9]+: 8f c9 78 12 ce[ ]+slwpcb %r14w +[ ]*[a-f0-9]+: 8f c9 78 12 cd[ ]+slwpcb %r13w +[ ]*[a-f0-9]+: 8f c9 78 12 cc[ ]+slwpcb %r12w +[ ]*[a-f0-9]+: 8f c9 78 12 cb[ ]+slwpcb %r11w +[ ]*[a-f0-9]+: 8f c9 78 12 ca[ ]+slwpcb %r10w +[ ]*[a-f0-9]+: 8f c9 78 12 c9[ ]+slwpcb %r9w +[ ]*[a-f0-9]+: 8f c9 78 12 c8[ ]+slwpcb %r8w [ ]*[a-f0-9]+: 8f e9 78 12 cf[ ]+slwpcb %di [ ]*[a-f0-9]+: 8f e9 78 12 ce[ ]+slwpcb %si [ ]*[a-f0-9]+: 8f e9 78 12 cd[ ]+slwpcb %bp @@ -62,22 +110,46 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f ea 50 12 c5 34 12[ ]+lwpins \$0x1234,%ebp,%bp [ ]*[a-f0-9]+: 8f ea 48 12 c6 34 12[ ]+lwpins \$0x1234,%esi,%si [ ]*[a-f0-9]+: 8f ea 40 12 c7 34 12[ ]+lwpins \$0x1234,%edi,%di -[ ]*[a-f0-9]+: 8f ea 7c 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%edi,%eax -[ ]*[a-f0-9]+: 8f ea 74 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%esi,%ecx -[ ]*[a-f0-9]+: 8f ea 6c 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%ebp,%edx -[ ]*[a-f0-9]+: 8f ea 64 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%esp,%ebx -[ ]*[a-f0-9]+: 8f ea 5c 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%ebx,%esp -[ ]*[a-f0-9]+: 8f ea 54 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%edx,%ebp -[ ]*[a-f0-9]+: 8f ea 4c 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%ecx,%esi -[ ]*[a-f0-9]+: 8f ea 44 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%eax,%edi -[ ]*[a-f0-9]+: 8f ea f8 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%eax,%rax -[ ]*[a-f0-9]+: 8f ea f0 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%ecx,%rcx -[ ]*[a-f0-9]+: 8f ea e8 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%edx,%rdx -[ ]*[a-f0-9]+: 8f ea e0 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%ebx,%rbx -[ ]*[a-f0-9]+: 8f ea d8 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%esp,%rsp -[ ]*[a-f0-9]+: 8f ea d0 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%ebp,%rbp -[ ]*[a-f0-9]+: 8f ea c8 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%esi,%rsi -[ ]*[a-f0-9]+: 8f ea c0 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%edi,%rdi +[ ]*[a-f0-9]+: 8f ca 38 12 c0 34 12[ ]+lwpins \$0x1234,%r8d,%r8w +[ ]*[a-f0-9]+: 8f ca 30 12 c1 34 12[ ]+lwpins \$0x1234,%r9d,%r9w +[ ]*[a-f0-9]+: 8f ca 28 12 c2 34 12[ ]+lwpins \$0x1234,%r10d,%r10w +[ ]*[a-f0-9]+: 8f ca 20 12 c3 34 12[ ]+lwpins \$0x1234,%r11d,%r11w +[ ]*[a-f0-9]+: 8f ca 18 12 c4 34 12[ ]+lwpins \$0x1234,%r12d,%r12w +[ ]*[a-f0-9]+: 8f ca 10 12 c5 34 12[ ]+lwpins \$0x1234,%r13d,%r13w +[ ]*[a-f0-9]+: 8f ca 08 12 c6 34 12[ ]+lwpins \$0x1234,%r14d,%r14w +[ ]*[a-f0-9]+: 8f ca 00 12 c7 34 12[ ]+lwpins \$0x1234,%r15d,%r15w +[ ]*[a-f0-9]+: 8f ca 7c 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%r15d,%eax +[ ]*[a-f0-9]+: 8f ca 74 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%r14d,%ecx +[ ]*[a-f0-9]+: 8f ca 6c 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%r13d,%edx +[ ]*[a-f0-9]+: 8f ca 64 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%r12d,%ebx +[ ]*[a-f0-9]+: 8f ca 5c 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%r11d,%esp +[ ]*[a-f0-9]+: 8f ca 54 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%r10d,%ebp +[ ]*[a-f0-9]+: 8f ca 4c 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%r9d,%esi +[ ]*[a-f0-9]+: 8f ca 44 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%r8d,%edi +[ ]*[a-f0-9]+: 8f ea 3c 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%edi,%r8d +[ ]*[a-f0-9]+: 8f ea 34 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%esi,%r9d +[ ]*[a-f0-9]+: 8f ea 2c 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%ebp,%r10d +[ ]*[a-f0-9]+: 8f ea 24 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%esp,%r11d +[ ]*[a-f0-9]+: 8f ea 1c 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%ebx,%r12d +[ ]*[a-f0-9]+: 8f ea 14 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%edx,%r13d +[ ]*[a-f0-9]+: 8f ea 0c 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%ecx,%r14d +[ ]*[a-f0-9]+: 8f ea 04 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%eax,%r15d +[ ]*[a-f0-9]+: 8f ca f8 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%r15d,%rax +[ ]*[a-f0-9]+: 8f ca f0 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%r14d,%rcx +[ ]*[a-f0-9]+: 8f ca e8 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%r13d,%rdx +[ ]*[a-f0-9]+: 8f ca e0 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%r12d,%rbx +[ ]*[a-f0-9]+: 8f ca d8 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%r11d,%rsp +[ ]*[a-f0-9]+: 8f ca d0 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%r10d,%rbp +[ ]*[a-f0-9]+: 8f ca c8 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%r9d,%rsi +[ ]*[a-f0-9]+: 8f ca c0 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%r8d,%rdi +[ ]*[a-f0-9]+: 8f ea b8 12 c0 78 56 34 12[ ]+lwpins \$0x12345678,%eax,%r8 +[ ]*[a-f0-9]+: 8f ea b0 12 c1 78 56 34 12[ ]+lwpins \$0x12345678,%ecx,%r9 +[ ]*[a-f0-9]+: 8f ea a8 12 c2 78 56 34 12[ ]+lwpins \$0x12345678,%edx,%r10 +[ ]*[a-f0-9]+: 8f ea a0 12 c3 78 56 34 12[ ]+lwpins \$0x12345678,%ebx,%r11 +[ ]*[a-f0-9]+: 8f ea 98 12 c4 78 56 34 12[ ]+lwpins \$0x12345678,%esp,%r12 +[ ]*[a-f0-9]+: 8f ea 90 12 c5 78 56 34 12[ ]+lwpins \$0x12345678,%ebp,%r13 +[ ]*[a-f0-9]+: 8f ea 88 12 c6 78 56 34 12[ ]+lwpins \$0x12345678,%esi,%r14 +[ ]*[a-f0-9]+: 8f ea 80 12 c7 78 56 34 12[ ]+lwpins \$0x12345678,%edi,%r15 [ ]*[a-f0-9]+: 8f ea 78 12 c8 34 12[ ]+lwpval \$0x1234,%eax,%ax [ ]*[a-f0-9]+: 8f ea 70 12 c9 34 12[ ]+lwpval \$0x1234,%ecx,%cx [ ]*[a-f0-9]+: 8f ea 68 12 ca 34 12[ ]+lwpval \$0x1234,%edx,%dx @@ -86,22 +158,46 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 8f ea 50 12 cd 34 12[ ]+lwpval \$0x1234,%ebp,%bp [ ]*[a-f0-9]+: 8f ea 48 12 ce 34 12[ ]+lwpval \$0x1234,%esi,%si [ ]*[a-f0-9]+: 8f ea 40 12 cf 34 12[ ]+lwpval \$0x1234,%edi,%di -[ ]*[a-f0-9]+: 8f ea 7c 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%edi,%eax -[ ]*[a-f0-9]+: 8f ea 74 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%esi,%ecx -[ ]*[a-f0-9]+: 8f ea 6c 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%ebp,%edx -[ ]*[a-f0-9]+: 8f ea 64 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%esp,%ebx -[ ]*[a-f0-9]+: 8f ea 5c 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%ebx,%esp -[ ]*[a-f0-9]+: 8f ea 54 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%edx,%ebp -[ ]*[a-f0-9]+: 8f ea 4c 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%ecx,%esi -[ ]*[a-f0-9]+: 8f ea 44 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%eax,%edi -[ ]*[a-f0-9]+: 8f ea f8 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%eax,%rax -[ ]*[a-f0-9]+: 8f ea f0 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%ecx,%rcx -[ ]*[a-f0-9]+: 8f ea e8 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%edx,%rdx -[ ]*[a-f0-9]+: 8f ea e0 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%ebx,%rbx -[ ]*[a-f0-9]+: 8f ea d8 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%esp,%rsp -[ ]*[a-f0-9]+: 8f ea d0 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%ebp,%rbp -[ ]*[a-f0-9]+: 8f ea c8 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%esi,%rsi -[ ]*[a-f0-9]+: 8f ea c0 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%edi,%rdi +[ ]*[a-f0-9]+: 8f ca 38 12 c8 34 12[ ]+lwpval \$0x1234,%r8d,%r8w +[ ]*[a-f0-9]+: 8f ca 30 12 c9 34 12[ ]+lwpval \$0x1234,%r9d,%r9w +[ ]*[a-f0-9]+: 8f ca 28 12 ca 34 12[ ]+lwpval \$0x1234,%r10d,%r10w +[ ]*[a-f0-9]+: 8f ca 20 12 cb 34 12[ ]+lwpval \$0x1234,%r11d,%r11w +[ ]*[a-f0-9]+: 8f ca 18 12 cc 34 12[ ]+lwpval \$0x1234,%r12d,%r12w +[ ]*[a-f0-9]+: 8f ca 10 12 cd 34 12[ ]+lwpval \$0x1234,%r13d,%r13w +[ ]*[a-f0-9]+: 8f ca 08 12 ce 34 12[ ]+lwpval \$0x1234,%r14d,%r14w +[ ]*[a-f0-9]+: 8f ca 00 12 cf 34 12[ ]+lwpval \$0x1234,%r15d,%r15w +[ ]*[a-f0-9]+: 8f ca 7c 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%r15d,%eax +[ ]*[a-f0-9]+: 8f ca 74 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%r14d,%ecx +[ ]*[a-f0-9]+: 8f ca 6c 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%r13d,%edx +[ ]*[a-f0-9]+: 8f ca 64 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%r12d,%ebx +[ ]*[a-f0-9]+: 8f ca 5c 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%r11d,%esp +[ ]*[a-f0-9]+: 8f ca 54 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%r10d,%ebp +[ ]*[a-f0-9]+: 8f ca 4c 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%r9d,%esi +[ ]*[a-f0-9]+: 8f ca 44 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%r8d,%edi +[ ]*[a-f0-9]+: 8f ea 3c 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%edi,%r8d +[ ]*[a-f0-9]+: 8f ea 34 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%esi,%r9d +[ ]*[a-f0-9]+: 8f ea 2c 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%ebp,%r10d +[ ]*[a-f0-9]+: 8f ea 24 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%esp,%r11d +[ ]*[a-f0-9]+: 8f ea 1c 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%ebx,%r12d +[ ]*[a-f0-9]+: 8f ea 14 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%edx,%r13d +[ ]*[a-f0-9]+: 8f ea 0c 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%ecx,%r14d +[ ]*[a-f0-9]+: 8f ea 04 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%eax,%r15d +[ ]*[a-f0-9]+: 8f ca f8 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%r15d,%rax +[ ]*[a-f0-9]+: 8f ca f0 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%r14d,%rcx +[ ]*[a-f0-9]+: 8f ca e8 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%r13d,%rdx +[ ]*[a-f0-9]+: 8f ca e0 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%r12d,%rbx +[ ]*[a-f0-9]+: 8f ca d8 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%r11d,%rsp +[ ]*[a-f0-9]+: 8f ca d0 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%r10d,%rbp +[ ]*[a-f0-9]+: 8f ca c8 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%r9d,%rsi +[ ]*[a-f0-9]+: 8f ca c0 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%r8d,%rdi +[ ]*[a-f0-9]+: 8f ea b8 12 c8 78 56 34 12[ ]+lwpval \$0x12345678,%eax,%r8 +[ ]*[a-f0-9]+: 8f ea b0 12 c9 78 56 34 12[ ]+lwpval \$0x12345678,%ecx,%r9 +[ ]*[a-f0-9]+: 8f ea a8 12 ca 78 56 34 12[ ]+lwpval \$0x12345678,%edx,%r10 +[ ]*[a-f0-9]+: 8f ea a0 12 cb 78 56 34 12[ ]+lwpval \$0x12345678,%ebx,%r11 +[ ]*[a-f0-9]+: 8f ea 98 12 cc 78 56 34 12[ ]+lwpval \$0x12345678,%esp,%r12 +[ ]*[a-f0-9]+: 8f ea 90 12 cd 78 56 34 12[ ]+lwpval \$0x12345678,%ebp,%r13 +[ ]*[a-f0-9]+: 8f ea 88 12 ce 78 56 34 12[ ]+lwpval \$0x12345678,%esi,%r14 +[ ]*[a-f0-9]+: 8f ea 80 12 cf 78 56 34 12[ ]+lwpval \$0x12345678,%edi,%r15 [ ]*[a-f0-9]+: 67 8f ea 78 12 00 34 12[ ]+addr32 lwpins \$0x1234,\(%eax\),%ax [ ]*[a-f0-9]+: 67 8f ea 70 12 01 34 12[ ]+addr32 lwpins \$0x1234,\(%ecx\),%cx [ ]*[a-f0-9]+: 67 8f ea 68 12 02 34 12[ ]+addr32 lwpins \$0x1234,\(%edx\),%dx @@ -110,22 +206,46 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 8f ea 50 12 45 00 34 12[ ]+addr32 lwpins \$0x1234,0x0\(%ebp\),%bp [ ]*[a-f0-9]+: 67 8f ea 48 12 06 34 12[ ]+addr32 lwpins \$0x1234,\(%esi\),%si [ ]*[a-f0-9]+: 67 8f ea 40 12 07 34 12[ ]+addr32 lwpins \$0x1234,\(%edi\),%di -[ ]*[a-f0-9]+: 67 8f ea 7c 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%eax -[ ]*[a-f0-9]+: 67 8f ea 74 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%ecx -[ ]*[a-f0-9]+: 67 8f ea 6c 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%edx -[ ]*[a-f0-9]+: 67 8f ea 64 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%ebx -[ ]*[a-f0-9]+: 67 8f ea 5c 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%esp -[ ]*[a-f0-9]+: 67 8f ea 54 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%ebp -[ ]*[a-f0-9]+: 67 8f ea 4c 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%esi -[ ]*[a-f0-9]+: 67 8f ea 44 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%edi -[ ]*[a-f0-9]+: 67 8f ea f8 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%rax -[ ]*[a-f0-9]+: 67 8f ea f0 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%rcx -[ ]*[a-f0-9]+: 67 8f ea e8 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%rdx -[ ]*[a-f0-9]+: 67 8f ea e0 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%rbx -[ ]*[a-f0-9]+: 67 8f ea d8 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%rsp -[ ]*[a-f0-9]+: 67 8f ea d0 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%rbp -[ ]*[a-f0-9]+: 67 8f ea c8 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%rsi -[ ]*[a-f0-9]+: 67 8f ea c0 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%rdi +[ ]*[a-f0-9]+: 67 8f ca 38 12 00 34 12[ ]+addr32 lwpins \$0x1234,\(%r8d\),%r8w +[ ]*[a-f0-9]+: 67 8f ca 30 12 01 34 12[ ]+addr32 lwpins \$0x1234,\(%r9d\),%r9w +[ ]*[a-f0-9]+: 67 8f ca 28 12 02 34 12[ ]+addr32 lwpins \$0x1234,\(%r10d\),%r10w +[ ]*[a-f0-9]+: 67 8f ca 20 12 03 34 12[ ]+addr32 lwpins \$0x1234,\(%r11d\),%r11w +[ ]*[a-f0-9]+: 67 8f ca 18 12 04 24 34 12[ ]+addr32 lwpins \$0x1234,\(%r12d\),%r12w +[ ]*[a-f0-9]+: 67 8f ca 10 12 45 00 34 12[ ]+addr32 lwpins \$0x1234,0x0\(%r13d\),%r13w +[ ]*[a-f0-9]+: 67 8f ca 08 12 06 34 12[ ]+addr32 lwpins \$0x1234,\(%r14d\),%r14w +[ ]*[a-f0-9]+: 67 8f ca 00 12 07 34 12[ ]+addr32 lwpins \$0x1234,\(%r15d\),%r15w +[ ]*[a-f0-9]+: 67 8f ca 7c 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r15d\),%eax +[ ]*[a-f0-9]+: 67 8f ca 74 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r14d\),%ecx +[ ]*[a-f0-9]+: 67 8f ca 6c 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%r13d\),%edx +[ ]*[a-f0-9]+: 67 8f ca 64 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r12d\),%ebx +[ ]*[a-f0-9]+: 67 8f ca 5c 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r11d\),%esp +[ ]*[a-f0-9]+: 67 8f ca 54 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r10d\),%ebp +[ ]*[a-f0-9]+: 67 8f ca 4c 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r9d\),%esi +[ ]*[a-f0-9]+: 67 8f ca 44 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r8d\),%edi +[ ]*[a-f0-9]+: 67 8f ea 3c 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%r8d +[ ]*[a-f0-9]+: 67 8f ea 34 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%r9d +[ ]*[a-f0-9]+: 67 8f ea 2c 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%r10d +[ ]*[a-f0-9]+: 67 8f ea 24 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%r11d +[ ]*[a-f0-9]+: 67 8f ea 1c 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%r12d +[ ]*[a-f0-9]+: 67 8f ea 14 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%r13d +[ ]*[a-f0-9]+: 67 8f ea 0c 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%r14d +[ ]*[a-f0-9]+: 67 8f ea 04 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%r15d +[ ]*[a-f0-9]+: 67 8f ca f8 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r15d\),%rax +[ ]*[a-f0-9]+: 67 8f ca f0 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r14d\),%rcx +[ ]*[a-f0-9]+: 67 8f ca e8 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%r13d\),%rdx +[ ]*[a-f0-9]+: 67 8f ca e0 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r12d\),%rbx +[ ]*[a-f0-9]+: 67 8f ca d8 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r11d\),%rsp +[ ]*[a-f0-9]+: 67 8f ca d0 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r10d\),%rbp +[ ]*[a-f0-9]+: 67 8f ca c8 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r9d\),%rsi +[ ]*[a-f0-9]+: 67 8f ca c0 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%r8d\),%rdi +[ ]*[a-f0-9]+: 67 8f ea b8 12 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%eax\),%r8 +[ ]*[a-f0-9]+: 67 8f ea b0 12 01 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ecx\),%r9 +[ ]*[a-f0-9]+: 67 8f ea a8 12 02 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edx\),%r10 +[ ]*[a-f0-9]+: 67 8f ea a0 12 03 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%ebx\),%r11 +[ ]*[a-f0-9]+: 67 8f ea 98 12 04 24 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esp\),%r12 +[ ]*[a-f0-9]+: 67 8f ea 90 12 45 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0x0\(%ebp\),%r13 +[ ]*[a-f0-9]+: 67 8f ea 88 12 06 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%esi\),%r14 +[ ]*[a-f0-9]+: 67 8f ea 80 12 07 78 56 34 12[ ]+addr32 lwpins \$0x12345678,\(%edi\),%r15 [ ]*[a-f0-9]+: 67 8f ea 78 12 08 34 12[ ]+addr32 lwpval \$0x1234,\(%eax\),%ax [ ]*[a-f0-9]+: 67 8f ea 70 12 09 34 12[ ]+addr32 lwpval \$0x1234,\(%ecx\),%cx [ ]*[a-f0-9]+: 67 8f ea 68 12 0a 34 12[ ]+addr32 lwpval \$0x1234,\(%edx\),%dx @@ -134,22 +254,46 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 8f ea 50 12 4d 00 34 12[ ]+addr32 lwpval \$0x1234,0x0\(%ebp\),%bp [ ]*[a-f0-9]+: 67 8f ea 48 12 0e 34 12[ ]+addr32 lwpval \$0x1234,\(%esi\),%si [ ]*[a-f0-9]+: 67 8f ea 40 12 0f 34 12[ ]+addr32 lwpval \$0x1234,\(%edi\),%di -[ ]*[a-f0-9]+: 67 8f ea 7c 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%eax -[ ]*[a-f0-9]+: 67 8f ea 74 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%ecx -[ ]*[a-f0-9]+: 67 8f ea 6c 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%edx -[ ]*[a-f0-9]+: 67 8f ea 64 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%ebx -[ ]*[a-f0-9]+: 67 8f ea 5c 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%esp -[ ]*[a-f0-9]+: 67 8f ea 54 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%ebp -[ ]*[a-f0-9]+: 67 8f ea 4c 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%esi -[ ]*[a-f0-9]+: 67 8f ea 44 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%edi -[ ]*[a-f0-9]+: 67 8f ea f8 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%rax -[ ]*[a-f0-9]+: 67 8f ea f0 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%rcx -[ ]*[a-f0-9]+: 67 8f ea e8 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%rdx -[ ]*[a-f0-9]+: 67 8f ea e0 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%rbx -[ ]*[a-f0-9]+: 67 8f ea d8 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%rsp -[ ]*[a-f0-9]+: 67 8f ea d0 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%rbp -[ ]*[a-f0-9]+: 67 8f ea c8 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%rsi -[ ]*[a-f0-9]+: 67 8f ea c0 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%rdi +[ ]*[a-f0-9]+: 67 8f ca 38 12 08 34 12[ ]+addr32 lwpval \$0x1234,\(%r8d\),%r8w +[ ]*[a-f0-9]+: 67 8f ca 30 12 09 34 12[ ]+addr32 lwpval \$0x1234,\(%r9d\),%r9w +[ ]*[a-f0-9]+: 67 8f ca 28 12 0a 34 12[ ]+addr32 lwpval \$0x1234,\(%r10d\),%r10w +[ ]*[a-f0-9]+: 67 8f ca 20 12 0b 34 12[ ]+addr32 lwpval \$0x1234,\(%r11d\),%r11w +[ ]*[a-f0-9]+: 67 8f ca 18 12 0c 24 34 12[ ]+addr32 lwpval \$0x1234,\(%r12d\),%r12w +[ ]*[a-f0-9]+: 67 8f ca 10 12 4d 00 34 12[ ]+addr32 lwpval \$0x1234,0x0\(%r13d\),%r13w +[ ]*[a-f0-9]+: 67 8f ca 08 12 0e 34 12[ ]+addr32 lwpval \$0x1234,\(%r14d\),%r14w +[ ]*[a-f0-9]+: 67 8f ca 00 12 0f 34 12[ ]+addr32 lwpval \$0x1234,\(%r15d\),%r15w +[ ]*[a-f0-9]+: 67 8f ca 7c 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r15d\),%eax +[ ]*[a-f0-9]+: 67 8f ca 74 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r14d\),%ecx +[ ]*[a-f0-9]+: 67 8f ca 6c 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%r13d\),%edx +[ ]*[a-f0-9]+: 67 8f ca 64 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r12d\),%ebx +[ ]*[a-f0-9]+: 67 8f ca 5c 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r11d\),%esp +[ ]*[a-f0-9]+: 67 8f ca 54 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r10d\),%ebp +[ ]*[a-f0-9]+: 67 8f ca 4c 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r9d\),%esi +[ ]*[a-f0-9]+: 67 8f ca 44 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r8d\),%edi +[ ]*[a-f0-9]+: 67 8f ea 3c 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%r8d +[ ]*[a-f0-9]+: 67 8f ea 34 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%r9d +[ ]*[a-f0-9]+: 67 8f ea 2c 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%r10d +[ ]*[a-f0-9]+: 67 8f ea 24 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%r11d +[ ]*[a-f0-9]+: 67 8f ea 1c 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%r12d +[ ]*[a-f0-9]+: 67 8f ea 14 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%r13d +[ ]*[a-f0-9]+: 67 8f ea 0c 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%r14d +[ ]*[a-f0-9]+: 67 8f ea 04 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%r15d +[ ]*[a-f0-9]+: 67 8f ca f8 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r15d\),%rax +[ ]*[a-f0-9]+: 67 8f ca f0 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r14d\),%rcx +[ ]*[a-f0-9]+: 67 8f ca e8 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%r13d\),%rdx +[ ]*[a-f0-9]+: 67 8f ca e0 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r12d\),%rbx +[ ]*[a-f0-9]+: 67 8f ca d8 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r11d\),%rsp +[ ]*[a-f0-9]+: 67 8f ca d0 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r10d\),%rbp +[ ]*[a-f0-9]+: 67 8f ca c8 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r9d\),%rsi +[ ]*[a-f0-9]+: 67 8f ca c0 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%r8d\),%rdi +[ ]*[a-f0-9]+: 67 8f ea b8 12 08 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%eax\),%r8 +[ ]*[a-f0-9]+: 67 8f ea b0 12 09 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ecx\),%r9 +[ ]*[a-f0-9]+: 67 8f ea a8 12 0a 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edx\),%r10 +[ ]*[a-f0-9]+: 67 8f ea a0 12 0b 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%ebx\),%r11 +[ ]*[a-f0-9]+: 67 8f ea 98 12 0c 24 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esp\),%r12 +[ ]*[a-f0-9]+: 67 8f ea 90 12 4d 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0x0\(%ebp\),%r13 +[ ]*[a-f0-9]+: 67 8f ea 88 12 0e 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%esi\),%r14 +[ ]*[a-f0-9]+: 67 8f ea 80 12 0f 78 56 34 12[ ]+addr32 lwpval \$0x12345678,\(%edi\),%r15 [ ]*[a-f0-9]+: 67 8f ea 78 12 80 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%eax\),%ax [ ]*[a-f0-9]+: 67 8f ea 70 12 81 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%ecx\),%cx [ ]*[a-f0-9]+: 67 8f ea 68 12 82 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%edx\),%dx @@ -158,22 +302,46 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 8f ea 50 12 85 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%ebp\),%bp [ ]*[a-f0-9]+: 67 8f ea 48 12 86 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%esi\),%si [ ]*[a-f0-9]+: 67 8f ea 40 12 87 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%edi\),%di -[ ]*[a-f0-9]+: 67 8f ea 7c 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%eax -[ ]*[a-f0-9]+: 67 8f ea 74 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%ecx -[ ]*[a-f0-9]+: 67 8f ea 6c 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%edx -[ ]*[a-f0-9]+: 67 8f ea 64 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%ebx -[ ]*[a-f0-9]+: 67 8f ea 5c 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%esp -[ ]*[a-f0-9]+: 67 8f ea 54 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%ebp -[ ]*[a-f0-9]+: 67 8f ea 4c 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%esi -[ ]*[a-f0-9]+: 67 8f ea 44 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%edi -[ ]*[a-f0-9]+: 67 8f ea f8 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%rax -[ ]*[a-f0-9]+: 67 8f ea f0 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%rcx -[ ]*[a-f0-9]+: 67 8f ea e8 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%rdx -[ ]*[a-f0-9]+: 67 8f ea e0 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%rbx -[ ]*[a-f0-9]+: 67 8f ea d8 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%rsp -[ ]*[a-f0-9]+: 67 8f ea d0 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%rbp -[ ]*[a-f0-9]+: 67 8f ea c8 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%rsi -[ ]*[a-f0-9]+: 67 8f ea c0 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%rdi +[ ]*[a-f0-9]+: 67 8f ca 38 12 80 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r8d\),%r8w +[ ]*[a-f0-9]+: 67 8f ca 30 12 81 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r9d\),%r9w +[ ]*[a-f0-9]+: 67 8f ca 28 12 82 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r10d\),%r10w +[ ]*[a-f0-9]+: 67 8f ca 20 12 83 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r11d\),%r11w +[ ]*[a-f0-9]+: 67 8f ca 18 12 84 24 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r12d\),%r12w +[ ]*[a-f0-9]+: 67 8f ca 10 12 85 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r13d\),%r13w +[ ]*[a-f0-9]+: 67 8f ca 08 12 86 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r14d\),%r14w +[ ]*[a-f0-9]+: 67 8f ca 00 12 87 fe ca 00 00 34 12[ ]+addr32 lwpins \$0x1234,0xcafe\(%r15d\),%r15w +[ ]*[a-f0-9]+: 67 8f ca 7c 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r15d\),%eax +[ ]*[a-f0-9]+: 67 8f ca 74 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r14d\),%ecx +[ ]*[a-f0-9]+: 67 8f ca 6c 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r13d\),%edx +[ ]*[a-f0-9]+: 67 8f ca 64 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r12d\),%ebx +[ ]*[a-f0-9]+: 67 8f ca 5c 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r11d\),%esp +[ ]*[a-f0-9]+: 67 8f ca 54 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r10d\),%ebp +[ ]*[a-f0-9]+: 67 8f ca 4c 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r9d\),%esi +[ ]*[a-f0-9]+: 67 8f ca 44 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r8d\),%edi +[ ]*[a-f0-9]+: 67 8f ea 3c 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%r8d +[ ]*[a-f0-9]+: 67 8f ea 34 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%r9d +[ ]*[a-f0-9]+: 67 8f ea 2c 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%r10d +[ ]*[a-f0-9]+: 67 8f ea 24 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%r11d +[ ]*[a-f0-9]+: 67 8f ea 1c 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%r12d +[ ]*[a-f0-9]+: 67 8f ea 14 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%r13d +[ ]*[a-f0-9]+: 67 8f ea 0c 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%r14d +[ ]*[a-f0-9]+: 67 8f ea 04 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%r15d +[ ]*[a-f0-9]+: 67 8f ca f8 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r15d\),%rax +[ ]*[a-f0-9]+: 67 8f ca f0 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r14d\),%rcx +[ ]*[a-f0-9]+: 67 8f ca e8 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r13d\),%rdx +[ ]*[a-f0-9]+: 67 8f ca e0 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r12d\),%rbx +[ ]*[a-f0-9]+: 67 8f ca d8 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r11d\),%rsp +[ ]*[a-f0-9]+: 67 8f ca d0 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r10d\),%rbp +[ ]*[a-f0-9]+: 67 8f ca c8 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r9d\),%rsi +[ ]*[a-f0-9]+: 67 8f ca c0 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%r8d\),%rdi +[ ]*[a-f0-9]+: 67 8f ea b8 12 80 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%eax\),%r8 +[ ]*[a-f0-9]+: 67 8f ea b0 12 81 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ecx\),%r9 +[ ]*[a-f0-9]+: 67 8f ea a8 12 82 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edx\),%r10 +[ ]*[a-f0-9]+: 67 8f ea a0 12 83 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebx\),%r11 +[ ]*[a-f0-9]+: 67 8f ea 98 12 84 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esp\),%r12 +[ ]*[a-f0-9]+: 67 8f ea 90 12 85 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%ebp\),%r13 +[ ]*[a-f0-9]+: 67 8f ea 88 12 86 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%esi\),%r14 +[ ]*[a-f0-9]+: 67 8f ea 80 12 87 fe ca 00 00 78 56 34 12[ ]+addr32 lwpins \$0x12345678,0xcafe\(%edi\),%r15 [ ]*[a-f0-9]+: 67 8f ea 78 12 88 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%eax\),%ax [ ]*[a-f0-9]+: 67 8f ea 70 12 89 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%ecx\),%cx [ ]*[a-f0-9]+: 67 8f ea 68 12 8a fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%edx\),%dx @@ -182,20 +350,44 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 67 8f ea 50 12 8d fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%ebp\),%bp [ ]*[a-f0-9]+: 67 8f ea 48 12 8e fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%esi\),%si [ ]*[a-f0-9]+: 67 8f ea 40 12 8f fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%edi\),%di -[ ]*[a-f0-9]+: 67 8f ea 7c 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%eax -[ ]*[a-f0-9]+: 67 8f ea 74 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%ecx -[ ]*[a-f0-9]+: 67 8f ea 6c 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%edx -[ ]*[a-f0-9]+: 67 8f ea 64 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%ebx -[ ]*[a-f0-9]+: 67 8f ea 5c 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%esp -[ ]*[a-f0-9]+: 67 8f ea 54 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%ebp -[ ]*[a-f0-9]+: 67 8f ea 4c 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%esi -[ ]*[a-f0-9]+: 67 8f ea 44 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%edi -[ ]*[a-f0-9]+: 67 8f ea f8 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%rax -[ ]*[a-f0-9]+: 67 8f ea f0 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%rcx -[ ]*[a-f0-9]+: 67 8f ea e8 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%rdx -[ ]*[a-f0-9]+: 67 8f ea e0 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%rbx -[ ]*[a-f0-9]+: 67 8f ea d8 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%rsp -[ ]*[a-f0-9]+: 67 8f ea d0 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%rbp -[ ]*[a-f0-9]+: 67 8f ea c8 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%rsi -[ ]*[a-f0-9]+: 67 8f ea c0 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%rdi +[ ]*[a-f0-9]+: 67 8f ca 38 12 88 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r8d\),%r8w +[ ]*[a-f0-9]+: 67 8f ca 30 12 89 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r9d\),%r9w +[ ]*[a-f0-9]+: 67 8f ca 28 12 8a fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r10d\),%r10w +[ ]*[a-f0-9]+: 67 8f ca 20 12 8b fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r11d\),%r11w +[ ]*[a-f0-9]+: 67 8f ca 18 12 8c 24 fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r12d\),%r12w +[ ]*[a-f0-9]+: 67 8f ca 10 12 8d fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r13d\),%r13w +[ ]*[a-f0-9]+: 67 8f ca 08 12 8e fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r14d\),%r14w +[ ]*[a-f0-9]+: 67 8f ca 00 12 8f fe ca 00 00 34 12[ ]+addr32 lwpval \$0x1234,0xcafe\(%r15d\),%r15w +[ ]*[a-f0-9]+: 67 8f ca 7c 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r15d\),%eax +[ ]*[a-f0-9]+: 67 8f ca 74 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r14d\),%ecx +[ ]*[a-f0-9]+: 67 8f ca 6c 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r13d\),%edx +[ ]*[a-f0-9]+: 67 8f ca 64 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r12d\),%ebx +[ ]*[a-f0-9]+: 67 8f ca 5c 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r11d\),%esp +[ ]*[a-f0-9]+: 67 8f ca 54 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r10d\),%ebp +[ ]*[a-f0-9]+: 67 8f ca 4c 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r9d\),%esi +[ ]*[a-f0-9]+: 67 8f ca 44 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r8d\),%edi +[ ]*[a-f0-9]+: 67 8f ea 3c 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%r8d +[ ]*[a-f0-9]+: 67 8f ea 34 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%r9d +[ ]*[a-f0-9]+: 67 8f ea 2c 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%r10d +[ ]*[a-f0-9]+: 67 8f ea 24 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%r11d +[ ]*[a-f0-9]+: 67 8f ea 1c 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%r12d +[ ]*[a-f0-9]+: 67 8f ea 14 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%r13d +[ ]*[a-f0-9]+: 67 8f ea 0c 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%r14d +[ ]*[a-f0-9]+: 67 8f ea 04 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%r15d +[ ]*[a-f0-9]+: 67 8f ca f8 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r15d\),%rax +[ ]*[a-f0-9]+: 67 8f ca f0 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r14d\),%rcx +[ ]*[a-f0-9]+: 67 8f ca e8 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r13d\),%rdx +[ ]*[a-f0-9]+: 67 8f ca e0 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r12d\),%rbx +[ ]*[a-f0-9]+: 67 8f ca d8 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r11d\),%rsp +[ ]*[a-f0-9]+: 67 8f ca d0 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r10d\),%rbp +[ ]*[a-f0-9]+: 67 8f ca c8 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r9d\),%rsi +[ ]*[a-f0-9]+: 67 8f ca c0 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%r8d\),%rdi +[ ]*[a-f0-9]+: 67 8f ea b8 12 88 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%eax\),%r8 +[ ]*[a-f0-9]+: 67 8f ea b0 12 89 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ecx\),%r9 +[ ]*[a-f0-9]+: 67 8f ea a8 12 8a fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edx\),%r10 +[ ]*[a-f0-9]+: 67 8f ea a0 12 8b fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebx\),%r11 +[ ]*[a-f0-9]+: 67 8f ea 98 12 8c 24 fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esp\),%r12 +[ ]*[a-f0-9]+: 67 8f ea 90 12 8d fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%ebp\),%r13 +[ ]*[a-f0-9]+: 67 8f ea 88 12 8e fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%esi\),%r14 +[ ]*[a-f0-9]+: 67 8f ea 80 12 8f fe ca 00 00 78 56 34 12[ ]+addr32 lwpval \$0x12345678,0xcafe\(%edi\),%r15 #pass diff --git a/gas/testsuite/gas/i386/x86-64-lwp.s b/gas/testsuite/gas/i386/x86-64-lwp.s index df6963b..9089e42 100644 --- a/gas/testsuite/gas/i386/x86-64-lwp.s +++ b/gas/testsuite/gas/i386/x86-64-lwp.s @@ -12,6 +12,14 @@ _start: llwpcb %bp llwpcb %si llwpcb %di + llwpcb %r8w + llwpcb %r9w + llwpcb %r10w + llwpcb %r11w + llwpcb %r12w + llwpcb %r13w + llwpcb %r14w + llwpcb %r15w llwpcb %eax llwpcb %ecx llwpcb %edx @@ -20,6 +28,14 @@ _start: llwpcb %ebp llwpcb %esi llwpcb %edi + llwpcb %r8d + llwpcb %r9d + llwpcb %r10d + llwpcb %r11d + llwpcb %r12d + llwpcb %r13d + llwpcb %r14d + llwpcb %r15d llwpcb %rax llwpcb %rcx llwpcb %rdx @@ -28,7 +44,23 @@ _start: llwpcb %rbp llwpcb %rsi llwpcb %rdi + llwpcb %r8 + llwpcb %r9 + llwpcb %r10 + llwpcb %r11 + llwpcb %r12 + llwpcb %r13 + llwpcb %r14 + llwpcb %r15 + slwpcb %r15 + slwpcb %r14 + slwpcb %r13 + slwpcb %r12 + slwpcb %r11 + slwpcb %r10 + slwpcb %r9 + slwpcb %r8 slwpcb %rdi slwpcb %rsi slwpcb %rbp @@ -37,6 +69,14 @@ _start: slwpcb %rdx slwpcb %rcx slwpcb %rax + slwpcb %r15d + slwpcb %r14d + slwpcb %r13d + slwpcb %r12d + slwpcb %r11d + slwpcb %r10d + slwpcb %r9d + slwpcb %r8d slwpcb %edi slwpcb %esi slwpcb %ebp @@ -45,6 +85,14 @@ _start: slwpcb %edx slwpcb %ecx slwpcb %eax + slwpcb %r15w + slwpcb %r14w + slwpcb %r13w + slwpcb %r12w + slwpcb %r11w + slwpcb %r10w + slwpcb %r9w + slwpcb %r8w slwpcb %di slwpcb %si slwpcb %bp @@ -62,22 +110,46 @@ _start: lwpins $0x1234, %ebp, %bp lwpins $0x1234, %esi, %si lwpins $0x1234, %edi, %di - lwpins $0x12345678, %edi, %eax - lwpins $0x12345678, %esi, %ecx - lwpins $0x12345678, %ebp, %edx - lwpins $0x12345678, %esp, %ebx - lwpins $0x12345678, %ebx, %esp - lwpins $0x12345678, %edx, %ebp - lwpins $0x12345678, %ecx, %esi - lwpins $0x12345678, %eax, %edi - lwpins $0x12345678, %eax, %rax - lwpins $0x12345678, %ecx, %rcx - lwpins $0x12345678, %edx, %rdx - lwpins $0x12345678, %ebx, %rbx - lwpins $0x12345678, %esp, %rsp - lwpins $0x12345678, %ebp, %rbp - lwpins $0x12345678, %esi, %rsi - lwpins $0x12345678, %edi, %rdi + lwpins $0x1234, %r8d, %r8w + lwpins $0x1234, %r9d, %r9w + lwpins $0x1234, %r10d, %r10w + lwpins $0x1234, %r11d, %r11w + lwpins $0x1234, %r12d, %r12w + lwpins $0x1234, %r13d, %r13w + lwpins $0x1234, %r14d, %r14w + lwpins $0x1234, %r15d, %r15w + lwpins $0x12345678, %r15d, %eax + lwpins $0x12345678, %r14d, %ecx + lwpins $0x12345678, %r13d, %edx + lwpins $0x12345678, %r12d, %ebx + lwpins $0x12345678, %r11d, %esp + lwpins $0x12345678, %r10d, %ebp + lwpins $0x12345678, %r9d, %esi + lwpins $0x12345678, %r8d, %edi + lwpins $0x12345678, %edi, %r8d + lwpins $0x12345678, %esi, %r9d + lwpins $0x12345678, %ebp, %r10d + lwpins $0x12345678, %esp, %r11d + lwpins $0x12345678, %ebx, %r12d + lwpins $0x12345678, %edx, %r13d + lwpins $0x12345678, %ecx, %r14d + lwpins $0x12345678, %eax, %r15d + lwpins $0x12345678, %r15d, %rax + lwpins $0x12345678, %r14d, %rcx + lwpins $0x12345678, %r13d, %rdx + lwpins $0x12345678, %r12d, %rbx + lwpins $0x12345678, %r11d, %rsp + lwpins $0x12345678, %r10d, %rbp + lwpins $0x12345678, %r9d, %rsi + lwpins $0x12345678, %r8d, %rdi + lwpins $0x12345678, %eax, %r8 + lwpins $0x12345678, %ecx, %r9 + lwpins $0x12345678, %edx, %r10 + lwpins $0x12345678, %ebx, %r11 + lwpins $0x12345678, %esp, %r12 + lwpins $0x12345678, %ebp, %r13 + lwpins $0x12345678, %esi, %r14 + lwpins $0x12345678, %edi, %r15 lwpval $0x1234, %eax, %ax lwpval $0x1234, %ecx, %cx @@ -87,22 +159,46 @@ _start: lwpval $0x1234, %ebp, %bp lwpval $0x1234, %esi, %si lwpval $0x1234, %edi, %di - lwpval $0x12345678, %edi, %eax - lwpval $0x12345678, %esi, %ecx - lwpval $0x12345678, %ebp, %edx - lwpval $0x12345678, %esp, %ebx - lwpval $0x12345678, %ebx, %esp - lwpval $0x12345678, %edx, %ebp - lwpval $0x12345678, %ecx, %esi - lwpval $0x12345678, %eax, %edi - lwpval $0x12345678, %eax, %rax - lwpval $0x12345678, %ecx, %rcx - lwpval $0x12345678, %edx, %rdx - lwpval $0x12345678, %ebx, %rbx - lwpval $0x12345678, %esp, %rsp - lwpval $0x12345678, %ebp, %rbp - lwpval $0x12345678, %esi, %rsi - lwpval $0x12345678, %edi, %rdi + lwpval $0x1234, %r8d, %r8w + lwpval $0x1234, %r9d, %r9w + lwpval $0x1234, %r10d, %r10w + lwpval $0x1234, %r11d, %r11w + lwpval $0x1234, %r12d, %r12w + lwpval $0x1234, %r13d, %r13w + lwpval $0x1234, %r14d, %r14w + lwpval $0x1234, %r15d, %r15w + lwpval $0x12345678, %r15d, %eax + lwpval $0x12345678, %r14d, %ecx + lwpval $0x12345678, %r13d, %edx + lwpval $0x12345678, %r12d, %ebx + lwpval $0x12345678, %r11d, %esp + lwpval $0x12345678, %r10d, %ebp + lwpval $0x12345678, %r9d, %esi + lwpval $0x12345678, %r8d, %edi + lwpval $0x12345678, %edi, %r8d + lwpval $0x12345678, %esi, %r9d + lwpval $0x12345678, %ebp, %r10d + lwpval $0x12345678, %esp, %r11d + lwpval $0x12345678, %ebx, %r12d + lwpval $0x12345678, %edx, %r13d + lwpval $0x12345678, %ecx, %r14d + lwpval $0x12345678, %eax, %r15d + lwpval $0x12345678, %r15d, %rax + lwpval $0x12345678, %r14d, %rcx + lwpval $0x12345678, %r13d, %rdx + lwpval $0x12345678, %r12d, %rbx + lwpval $0x12345678, %r11d, %rsp + lwpval $0x12345678, %r10d, %rbp + lwpval $0x12345678, %r9d, %rsi + lwpval $0x12345678, %r8d, %rdi + lwpval $0x12345678, %eax, %r8 + lwpval $0x12345678, %ecx, %r9 + lwpval $0x12345678, %edx, %r10 + lwpval $0x12345678, %ebx, %r11 + lwpval $0x12345678, %esp, %r12 + lwpval $0x12345678, %ebp, %r13 + lwpval $0x12345678, %esi, %r14 + lwpval $0x12345678, %edi, %r15 lwpins $0x1234, (%eax), %ax lwpins $0x1234, (%ecx), %cx @@ -112,22 +208,46 @@ _start: lwpins $0x1234, (%ebp), %bp lwpins $0x1234, (%esi), %si lwpins $0x1234, (%edi), %di - lwpins $0x12345678, (%edi), %eax - lwpins $0x12345678, (%esi), %ecx - lwpins $0x12345678, (%ebp), %edx - lwpins $0x12345678, (%esp), %ebx - lwpins $0x12345678, (%ebx), %esp - lwpins $0x12345678, (%edx), %ebp - lwpins $0x12345678, (%ecx), %esi - lwpins $0x12345678, (%eax), %edi - lwpins $0x12345678, (%eax), %rax - lwpins $0x12345678, (%ecx), %rcx - lwpins $0x12345678, (%edx), %rdx - lwpins $0x12345678, (%ebx), %rbx - lwpins $0x12345678, (%esp), %rsp - lwpins $0x12345678, (%ebp), %rbp - lwpins $0x12345678, (%esi), %rsi - lwpins $0x12345678, (%edi), %rdi + lwpins $0x1234, (%r8d), %r8w + lwpins $0x1234, (%r9d), %r9w + lwpins $0x1234, (%r10d), %r10w + lwpins $0x1234, (%r11d), %r11w + lwpins $0x1234, (%r12d), %r12w + lwpins $0x1234, (%r13d), %r13w + lwpins $0x1234, (%r14d), %r14w + lwpins $0x1234, (%r15d), %r15w + lwpins $0x12345678, (%r15d), %eax + lwpins $0x12345678, (%r14d), %ecx + lwpins $0x12345678, (%r13d), %edx + lwpins $0x12345678, (%r12d), %ebx + lwpins $0x12345678, (%r11d), %esp + lwpins $0x12345678, (%r10d), %ebp + lwpins $0x12345678, (%r9d), %esi + lwpins $0x12345678, (%r8d), %edi + lwpins $0x12345678, (%edi), %r8d + lwpins $0x12345678, (%esi), %r9d + lwpins $0x12345678, (%ebp), %r10d + lwpins $0x12345678, (%esp), %r11d + lwpins $0x12345678, (%ebx), %r12d + lwpins $0x12345678, (%edx), %r13d + lwpins $0x12345678, (%ecx), %r14d + lwpins $0x12345678, (%eax), %r15d + lwpins $0x12345678, (%r15d), %rax + lwpins $0x12345678, (%r14d), %rcx + lwpins $0x12345678, (%r13d), %rdx + lwpins $0x12345678, (%r12d), %rbx + lwpins $0x12345678, (%r11d), %rsp + lwpins $0x12345678, (%r10d), %rbp + lwpins $0x12345678, (%r9d), %rsi + lwpins $0x12345678, (%r8d), %rdi + lwpins $0x12345678, (%eax), %r8 + lwpins $0x12345678, (%ecx), %r9 + lwpins $0x12345678, (%edx), %r10 + lwpins $0x12345678, (%ebx), %r11 + lwpins $0x12345678, (%esp), %r12 + lwpins $0x12345678, (%ebp), %r13 + lwpins $0x12345678, (%esi), %r14 + lwpins $0x12345678, (%edi), %r15 lwpval $0x1234, (%eax), %ax lwpval $0x1234, (%ecx), %cx @@ -137,22 +257,46 @@ _start: lwpval $0x1234, (%ebp), %bp lwpval $0x1234, (%esi), %si lwpval $0x1234, (%edi), %di - lwpval $0x12345678, (%edi), %eax - lwpval $0x12345678, (%esi), %ecx - lwpval $0x12345678, (%ebp), %edx - lwpval $0x12345678, (%esp), %ebx - lwpval $0x12345678, (%ebx), %esp - lwpval $0x12345678, (%edx), %ebp - lwpval $0x12345678, (%ecx), %esi - lwpval $0x12345678, (%eax), %edi - lwpval $0x12345678, (%eax), %rax - lwpval $0x12345678, (%ecx), %rcx - lwpval $0x12345678, (%edx), %rdx - lwpval $0x12345678, (%ebx), %rbx - lwpval $0x12345678, (%esp), %rsp - lwpval $0x12345678, (%ebp), %rbp - lwpval $0x12345678, (%esi), %rsi - lwpval $0x12345678, (%edi), %rdi + lwpval $0x1234, (%r8d), %r8w + lwpval $0x1234, (%r9d), %r9w + lwpval $0x1234, (%r10d), %r10w + lwpval $0x1234, (%r11d), %r11w + lwpval $0x1234, (%r12d), %r12w + lwpval $0x1234, (%r13d), %r13w + lwpval $0x1234, (%r14d), %r14w + lwpval $0x1234, (%r15d), %r15w + lwpval $0x12345678, (%r15d), %eax + lwpval $0x12345678, (%r14d), %ecx + lwpval $0x12345678, (%r13d), %edx + lwpval $0x12345678, (%r12d), %ebx + lwpval $0x12345678, (%r11d), %esp + lwpval $0x12345678, (%r10d), %ebp + lwpval $0x12345678, (%r9d), %esi + lwpval $0x12345678, (%r8d), %edi + lwpval $0x12345678, (%edi), %r8d + lwpval $0x12345678, (%esi), %r9d + lwpval $0x12345678, (%ebp), %r10d + lwpval $0x12345678, (%esp), %r11d + lwpval $0x12345678, (%ebx), %r12d + lwpval $0x12345678, (%edx), %r13d + lwpval $0x12345678, (%ecx), %r14d + lwpval $0x12345678, (%eax), %r15d + lwpval $0x12345678, (%r15d), %rax + lwpval $0x12345678, (%r14d), %rcx + lwpval $0x12345678, (%r13d), %rdx + lwpval $0x12345678, (%r12d), %rbx + lwpval $0x12345678, (%r11d), %rsp + lwpval $0x12345678, (%r10d), %rbp + lwpval $0x12345678, (%r9d), %rsi + lwpval $0x12345678, (%r8d), %rdi + lwpval $0x12345678, (%eax), %r8 + lwpval $0x12345678, (%ecx), %r9 + lwpval $0x12345678, (%edx), %r10 + lwpval $0x12345678, (%ebx), %r11 + lwpval $0x12345678, (%esp), %r12 + lwpval $0x12345678, (%ebp), %r13 + lwpval $0x12345678, (%esi), %r14 + lwpval $0x12345678, (%edi), %r15 lwpins $0x1234, 0xcafe(%eax), %ax lwpins $0x1234, 0xcafe(%ecx), %cx @@ -162,22 +306,46 @@ _start: lwpins $0x1234, 0xcafe(%ebp), %bp lwpins $0x1234, 0xcafe(%esi), %si lwpins $0x1234, 0xcafe(%edi), %di - lwpins $0x12345678, 0xcafe(%edi), %eax - lwpins $0x12345678, 0xcafe(%esi), %ecx - lwpins $0x12345678, 0xcafe(%ebp), %edx - lwpins $0x12345678, 0xcafe(%esp), %ebx - lwpins $0x12345678, 0xcafe(%ebx), %esp - lwpins $0x12345678, 0xcafe(%edx), %ebp - lwpins $0x12345678, 0xcafe(%ecx), %esi - lwpins $0x12345678, 0xcafe(%eax), %edi - lwpins $0x12345678, 0xcafe(%eax), %rax - lwpins $0x12345678, 0xcafe(%ecx), %rcx - lwpins $0x12345678, 0xcafe(%edx), %rdx - lwpins $0x12345678, 0xcafe(%ebx), %rbx - lwpins $0x12345678, 0xcafe(%esp), %rsp - lwpins $0x12345678, 0xcafe(%ebp), %rbp - lwpins $0x12345678, 0xcafe(%esi), %rsi - lwpins $0x12345678, 0xcafe(%edi), %rdi + lwpins $0x1234, 0xcafe(%r8d), %r8w + lwpins $0x1234, 0xcafe(%r9d), %r9w + lwpins $0x1234, 0xcafe(%r10d), %r10w + lwpins $0x1234, 0xcafe(%r11d), %r11w + lwpins $0x1234, 0xcafe(%r12d), %r12w + lwpins $0x1234, 0xcafe(%r13d), %r13w + lwpins $0x1234, 0xcafe(%r14d), %r14w + lwpins $0x1234, 0xcafe(%r15d), %r15w + lwpins $0x12345678, 0xcafe(%r15d), %eax + lwpins $0x12345678, 0xcafe(%r14d), %ecx + lwpins $0x12345678, 0xcafe(%r13d), %edx + lwpins $0x12345678, 0xcafe(%r12d), %ebx + lwpins $0x12345678, 0xcafe(%r11d), %esp + lwpins $0x12345678, 0xcafe(%r10d), %ebp + lwpins $0x12345678, 0xcafe(%r9d), %esi + lwpins $0x12345678, 0xcafe(%r8d), %edi + lwpins $0x12345678, 0xcafe(%edi), %r8d + lwpins $0x12345678, 0xcafe(%esi), %r9d + lwpins $0x12345678, 0xcafe(%ebp), %r10d + lwpins $0x12345678, 0xcafe(%esp), %r11d + lwpins $0x12345678, 0xcafe(%ebx), %r12d + lwpins $0x12345678, 0xcafe(%edx), %r13d + lwpins $0x12345678, 0xcafe(%ecx), %r14d + lwpins $0x12345678, 0xcafe(%eax), %r15d + lwpins $0x12345678, 0xcafe(%r15d), %rax + lwpins $0x12345678, 0xcafe(%r14d), %rcx + lwpins $0x12345678, 0xcafe(%r13d), %rdx + lwpins $0x12345678, 0xcafe(%r12d), %rbx + lwpins $0x12345678, 0xcafe(%r11d), %rsp + lwpins $0x12345678, 0xcafe(%r10d), %rbp + lwpins $0x12345678, 0xcafe(%r9d), %rsi + lwpins $0x12345678, 0xcafe(%r8d), %rdi + lwpins $0x12345678, 0xcafe(%eax), %r8 + lwpins $0x12345678, 0xcafe(%ecx), %r9 + lwpins $0x12345678, 0xcafe(%edx), %r10 + lwpins $0x12345678, 0xcafe(%ebx), %r11 + lwpins $0x12345678, 0xcafe(%esp), %r12 + lwpins $0x12345678, 0xcafe(%ebp), %r13 + lwpins $0x12345678, 0xcafe(%esi), %r14 + lwpins $0x12345678, 0xcafe(%edi), %r15 lwpval $0x1234, 0xcafe(%eax), %ax lwpval $0x1234, 0xcafe(%ecx), %cx @@ -187,19 +355,43 @@ _start: lwpval $0x1234, 0xcafe(%ebp), %bp lwpval $0x1234, 0xcafe(%esi), %si lwpval $0x1234, 0xcafe(%edi), %di - lwpval $0x12345678, 0xcafe(%edi), %eax - lwpval $0x12345678, 0xcafe(%esi), %ecx - lwpval $0x12345678, 0xcafe(%ebp), %edx - lwpval $0x12345678, 0xcafe(%esp), %ebx - lwpval $0x12345678, 0xcafe(%ebx), %esp - lwpval $0x12345678, 0xcafe(%edx), %ebp - lwpval $0x12345678, 0xcafe(%ecx), %esi - lwpval $0x12345678, 0xcafe(%eax), %edi - lwpval $0x12345678, 0xcafe(%eax), %rax - lwpval $0x12345678, 0xcafe(%ecx), %rcx - lwpval $0x12345678, 0xcafe(%edx), %rdx - lwpval $0x12345678, 0xcafe(%ebx), %rbx - lwpval $0x12345678, 0xcafe(%esp), %rsp - lwpval $0x12345678, 0xcafe(%ebp), %rbp - lwpval $0x12345678, 0xcafe(%esi), %rsi - lwpval $0x12345678, 0xcafe(%edi), %rdi + lwpval $0x1234, 0xcafe(%r8d), %r8w + lwpval $0x1234, 0xcafe(%r9d), %r9w + lwpval $0x1234, 0xcafe(%r10d), %r10w + lwpval $0x1234, 0xcafe(%r11d), %r11w + lwpval $0x1234, 0xcafe(%r12d), %r12w + lwpval $0x1234, 0xcafe(%r13d), %r13w + lwpval $0x1234, 0xcafe(%r14d), %r14w + lwpval $0x1234, 0xcafe(%r15d), %r15w + lwpval $0x12345678, 0xcafe(%r15d), %eax + lwpval $0x12345678, 0xcafe(%r14d), %ecx + lwpval $0x12345678, 0xcafe(%r13d), %edx + lwpval $0x12345678, 0xcafe(%r12d), %ebx + lwpval $0x12345678, 0xcafe(%r11d), %esp + lwpval $0x12345678, 0xcafe(%r10d), %ebp + lwpval $0x12345678, 0xcafe(%r9d), %esi + lwpval $0x12345678, 0xcafe(%r8d), %edi + lwpval $0x12345678, 0xcafe(%edi), %r8d + lwpval $0x12345678, 0xcafe(%esi), %r9d + lwpval $0x12345678, 0xcafe(%ebp), %r10d + lwpval $0x12345678, 0xcafe(%esp), %r11d + lwpval $0x12345678, 0xcafe(%ebx), %r12d + lwpval $0x12345678, 0xcafe(%edx), %r13d + lwpval $0x12345678, 0xcafe(%ecx), %r14d + lwpval $0x12345678, 0xcafe(%eax), %r15d + lwpval $0x12345678, 0xcafe(%r15d), %rax + lwpval $0x12345678, 0xcafe(%r14d), %rcx + lwpval $0x12345678, 0xcafe(%r13d), %rdx + lwpval $0x12345678, 0xcafe(%r12d), %rbx + lwpval $0x12345678, 0xcafe(%r11d), %rsp + lwpval $0x12345678, 0xcafe(%r10d), %rbp + lwpval $0x12345678, 0xcafe(%r9d), %rsi + lwpval $0x12345678, 0xcafe(%r8d), %rdi + lwpval $0x12345678, 0xcafe(%eax), %r8 + lwpval $0x12345678, 0xcafe(%ecx), %r9 + lwpval $0x12345678, 0xcafe(%edx), %r10 + lwpval $0x12345678, 0xcafe(%ebx), %r11 + lwpval $0x12345678, 0xcafe(%esp), %r12 + lwpval $0x12345678, 0xcafe(%ebp), %r13 + lwpval $0x12345678, 0xcafe(%esi), %r14 + lwpval $0x12345678, 0xcafe(%edi), %r15 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7053cb3..f8be7a3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +2009-11-06 Sebastian Pop <sebastian.pop@amd.com> + + * i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to + reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to + B.mm in the RXB.mmmmm byte, and so when B is set, we still should use + the xop_table. + (get_valid_dis386): Removed unused condition (from cut/n/paste) for + XOP instructions. + 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> Quentin Neill <quentin.neill@amd.com> diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 8c2ea7f..b411c83 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -2132,7 +2132,7 @@ static const struct dis386 reg_table[][8] = { /* REG_8F */ { { "popU", { stackEv } }, - { "(bad)", { XX } }, + { XOP_8F_TABLE (XOP_09) }, { "(bad)", { XX } }, { "(bad)", { XX } }, { "(bad)", { XX } }, @@ -9983,14 +9983,11 @@ get_valid_dis386 (const struct dis386 *dp, disassemble_info *info) codep++; index = *codep++; dp = &xop_table[vex_table_index][index]; - /* There is no MODRM byte for VEX [82|77]. */ - if (index != 0x77 && index != 0x82) - { - FETCH_DATA (info, codep + 1); - modrm.mod = (*codep >> 6) & 3; - modrm.reg = (*codep >> 3) & 7; - modrm.rm = *codep & 7; - } + + FETCH_DATA (info, codep + 1); + modrm.mod = (*codep >> 6) & 3; + modrm.reg = (*codep >> 3) & 7; + modrm.rm = *codep & 7; break; case USE_VEX_C4_TABLE: |