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-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/cr16-dis.c6
2 files changed, 10 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 479eed9..cb072c7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
+
+ * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
+ adjusted the mask for 32-bit branch instruction.
+
2008-11-27 Alan Modra <amodra@bigpond.net.au>
* ppc-opc.c (extract_sprg): Correct operand range check.
diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index de3eb75..2627141 100644
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -322,7 +322,7 @@ match_opcode (void)
{
unsigned long mask;
/* The instruction 'constant' opcode doewsn't exceed 32 bits. */
- unsigned long doubleWord = words[1] + (words[0] << 16);
+ unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff;
/* Start searching from end of instruction table. */
instruction = &cr16_instruction[NUMOPCODES - 2];
@@ -331,6 +331,10 @@ match_opcode (void)
while (instruction >= cr16_instruction)
{
mask = build_mask ();
+ /* Adjust mask for bcond with 32-bit size instruction */
+ if ((IS_INSN_MNEMONIC("b") && instruction->size == 2))
+ mask = 0xff0f0000;
+
if ((doubleWord & mask) == BIN (instruction->match,
instruction->match_bits))
return 1;