diff options
-rw-r--r-- | include/opcode/ChangeLog | 7 | ||||
-rw-r--r-- | include/opcode/h8300.h | 43 | ||||
-rw-r--r-- | opcodes/ChangeLog | 12 | ||||
-rw-r--r-- | opcodes/h8300-dis.c | 40 |
4 files changed, 71 insertions, 31 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 06ded1d..51027dc 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,5 +1,12 @@ 2002-11-18 Klee Dienes <kdienes@apple.com> + * h8300.h (h8_opcode): Remove 'length' field. + (h8_opcodes): Mark as 'const' (both the declaration and + definition). Modify initializer and initializer macros to no + longer initialize the length field. + +2002-11-18 Klee Dienes <kdienes@apple.com> + * arc.h (arc_ext_opcodes): Declare as extern. (arc_ext_operands): Declare as extern. * i860.h (i860_opcodes): Declare as const. diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h index 18d17c5..b26c676 100644 --- a/include/opcode/h8300.h +++ b/include/opcode/h8300.h @@ -151,7 +151,6 @@ struct h8_opcode char *name; struct arg args; struct code data; - int length; int noperands; int idx; int size; @@ -160,11 +159,11 @@ struct h8_opcode #ifdef DEFINE_TABLE #define BITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\ -{ code, 1, 2, name, {{imm,RD8,E}}, {{op00, op01, imm, RD8, E, 0, 0, 0, 0}}, 0, 0, 0, 0},\ -{ code, 1, 6, name, {{imm,RDIND,E}},{{op10, op11, B30|RDIND, 0, op00,op01, imm, 0, E}}, 0, 0, 0, 0},\ -{ code, 1, 6, name, {{imm,ABS8DST,E}},{{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0}\ -,{ code, 0, 6, name, {{imm,ABS16DST,E}},{{0x6,0xa,0x1,op30,ABS16DST,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0},\ -{ code, 0, 6, name, {{imm,ABS32DST,E}},{{0x6,0xa,0x3,op30,ABS32DST,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0, 0} +{ code, 1, 2, name, {{imm,RD8,E}}, {{op00, op01, imm, RD8, E, 0, 0, 0, 0}}, 0, 0, 0},\ +{ code, 1, 6, name, {{imm,RDIND,E}},{{op10, op11, B30|RDIND, 0, op00,op01, imm, 0, E}}, 0, 0, 0},\ +{ code, 1, 6, name, {{imm,ABS8DST,E}},{{op20, op21, ABS8DST, IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0}\ +,{ code, 0, 6, name, {{imm,ABS16DST,E}},{{0x6,0xa,0x1,op30,ABS16DST,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0},\ +{ code, 0, 6, name, {{imm,ABS32DST,E}},{{0x6,0xa,0x3,op30,ABS32DST,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE, op00,op01, imm, 0,E}}, 0, 0, 0} #define EBITOP(code, imm, name, op00, op01,op10,op11, op20,op21,op30)\ @@ -172,33 +171,33 @@ struct h8_opcode BITOP(code,RS8, name, op00, op01, op10,op11, op20,op21,op30) #define WTWOP(code,name, op1, op2) \ -{ code, 1, 2, name, {{RS16, RD16, E}}, {{ op1, op2, RS16, RD16, E, 0, 0, 0, 0}}, 0, 0, 0, 0} +{ code, 1, 2, name, {{RS16, RD16, E}}, {{ op1, op2, RS16, RD16, E, 0, 0, 0, 0}}, 0, 0, 0} #define BRANCH(code, name, op) \ -{ code, 1, 4,name,{{DISP8,E,0}}, {{ 0x4, op, DISP8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \ -{ code, 0, 6,name,{{DISP16,E,0}}, {{ 0x5, 0x8, op, 0x0, DISP16, IGNORE, IGNORE, IGNORE, E,0}}, 0, 0, 0, 0} +{ code, 1, 4,name,{{DISP8,E,0}}, {{ 0x4, op, DISP8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0}, \ +{ code, 0, 6,name,{{DISP16,E,0}}, {{ 0x5, 0x8, op, 0x0, DISP16, IGNORE, IGNORE, IGNORE, E,0}}, 0, 0, 0} #define SOP(code, x,name) \ {code, 1, x, name #define NEW_SOP(code, in,x,name) \ {code, in, x, name -#define EOP ,0,0,0,0 } +#define EOP ,0,0,0 } #define TWOOP(code, name, op1, op2,op3) \ -{ code,1, 2,name, {{IMM8, RD8, E}}, {{ op1, RD8, IMM8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0, 0},\ -{ code, 1, 2,name, {{RS8, RD8, E}}, {{ op2, op3, RS8, RD8, E, 0, 0, 0, 0}}, 0, 0, 0, 0} +{ code,1, 2,name, {{IMM8, RD8, E}}, {{ op1, RD8, IMM8, IGNORE, E, 0, 0, 0, 0}}, 0, 0, 0},\ +{ code, 1, 2,name, {{RS8, RD8, E}}, {{ op2, op3, RS8, RD8, E, 0, 0, 0, 0}}, 0, 0, 0} #define UNOP(code,name, op1, op2) \ -{ code, 1, 2, name, {{OR8, E, 0}}, {{ op1, op2, 0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0, 0} +{ code, 1, 2, name, {{OR8, E, 0}}, {{ op1, op2, 0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0} #define UNOP3(code, name, op1, op2, op3) \ -{ O(code,SB), 1, 2, name, {{OR8, E, 0}}, {{op1, op2, op3+0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \ -{ O(code,SW), 0, 2, name, {{OR16, E, 0}}, {{op1, op2, op3+1, OR16, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \ -{ O(code,SL), 0, 2, name, {{OR32, E, 0}}, {{op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}}, 0, 0, 0, 0} \ -,{ O(code,SB), 1, 2, name, {{IMM, OR8 | SRC_IN_DST, E}}, {{op1, op2, op3+4, OR8 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \ -{ O(code,SW), 0, 2, name, {{IMM, OR16 | SRC_IN_DST, E}}, {{op1, op2, op3+5, OR16 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0, 0}, \ -{ O(code,SL), 0, 2, name, {{IMM, OR32 | SRC_IN_DST, E}}, {{op1, op2, op3+7, OR32 | SRC_IN_DST|B30 , E, 0, 0, 0, 0}}, 0, 0, 0, 0} +{ O(code,SB), 1, 2, name, {{OR8, E, 0}}, {{op1, op2, op3+0, OR8, E, 0, 0, 0, 0}}, 0, 0, 0}, \ +{ O(code,SW), 0, 2, name, {{OR16, E, 0}}, {{op1, op2, op3+1, OR16, E, 0, 0, 0, 0}}, 0, 0, 0}, \ +{ O(code,SL), 0, 2, name, {{OR32, E, 0}}, {{op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}}, 0, 0, 0} \ +,{ O(code,SB), 1, 2, name, {{IMM, OR8 | SRC_IN_DST, E}}, {{op1, op2, op3+4, OR8 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0}, \ +{ O(code,SW), 0, 2, name, {{IMM, OR16 | SRC_IN_DST, E}}, {{op1, op2, op3+5, OR16 | SRC_IN_DST, E, 0, 0, 0, 0}}, 0, 0, 0}, \ +{ O(code,SL), 0, 2, name, {{IMM, OR32 | SRC_IN_DST, E}}, {{op1, op2, op3+7, OR32 | SRC_IN_DST|B30 , E, 0, 0, 0, 0}}, 0, 0, 0} #define IMM32LIST IMM32,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE,IGNORE @@ -314,7 +313,7 @@ struct h8_opcode /* FIXME: Lots of insns have "E, 0, 0, 0, 0" in the nibble code sequences. Methinks the zeroes aren't necessary. Once confirmed, nuke 'em. */ -struct h8_opcode h8_opcodes[] = +const struct h8_opcode h8_opcodes[] = { TWOOP(O(O_ADD,SB),"add.b", 0x8, 0x0,0x8), @@ -594,8 +593,8 @@ struct h8_opcode h8_opcodes[] = NEW_SOP(O(O_STMAC,SL),1,2,"stmac"),{{MACREG,RD32,E}},{{0x0,0x2,MACREG,RD32,E}} EOP, NEW_SOP(O(O_LDM,SL),0,6,"ldm.l"),{{RSINC, RS32, E}},{{ 0x0,0x1,IGNORE,0x0,0x6,0xD,0x7,IGNORE,E}}EOP, NEW_SOP(O(O_STM,SL),0,6,"stm.l"),{{RS32, RDDEC, E}},{{0x0,0x1,IGNORE,0x0,0x6,0xD,0xF,IGNORE,E}}EOP, - {0, 0, 0, NULL, {{0,0,0}}, {{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}}, 0, 0, 0, 0} + {0, 0, 0, NULL, {{0,0,0}}, {{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}}, 0, 0, 0} }; #else -extern struct h8_opcode h8_opcodes[]; +extern const struct h8_opcode h8_opcodes[]; #endif diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3d5649c..ce23088 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,17 @@ 2002-11-18 Klee Dienes <kdienes@apple.com> + * h8300-dis.c: Include libiberty.h (for xmalloc). + (struct h8_instruction): New type, used to wrap h8_opcodes with a + length field (computed at run-time). + (h8_instructions): New variable. + (bfd_h8_disassemble_init): Allocate the storage for + h8_instructions. Fill h8_instructions with pointers to the + appropriate opcode and the correct value for the length field. + (bfd_h8_disassemble): Iterate through h8_instructions instead of + h8_opcodes. + +2002-11-18 Klee Dienes <kdienes@apple.com> + * arc-opc.c (arc_ext_opcodes): Define. (arc_ext_operands): Define. * i386-dis.c (Suffix3DNow): Declare as const. diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c index d14fda9..debab9b 100644 --- a/opcodes/h8300-dis.c +++ b/opcodes/h8300-dis.c @@ -23,6 +23,15 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "opcode/h8300.h" #include "dis-asm.h" #include "opintl.h" +#include "libiberty.h" + +struct h8_instruction +{ + int length; + const struct h8_opcode *opcode; +}; + +struct h8_instruction *h8_instructions; static void bfd_h8_disassemble_init PARAMS ((void)); static unsigned int bfd_h8_disassemble @@ -34,9 +43,16 @@ static void bfd_h8_disassemble_init () { unsigned int i; - struct h8_opcode *p; + unsigned int nopcodes; + const struct h8_opcode *p; + struct h8_instruction *pi; - for (p = h8_opcodes; p->name; p++) + nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode); + + h8_instructions = (struct h8_instruction *) + xmalloc (nopcodes * sizeof (struct h8_instruction)); + + for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++) { int n1 = 0; int n2 = 0; @@ -59,8 +75,13 @@ bfd_h8_disassemble_init () if (i & 1) abort (); - p->length = i / 2; + pi->length = i / 2; + pi->opcode = p; } + + /* Add entry for the NULL vector terminator. */ + pi->length = 0; + pi->opcode = p; } static unsigned int @@ -92,7 +113,7 @@ bfd_h8_disassemble (addr, info, mode) int bit = 0; int plen = 0; static boolean init = 0; - struct h8_opcode *q; + const struct h8_instruction *qi; char const **pregnames = mode != 0 ? lregnames : wregnames; int status; int l; @@ -117,8 +138,9 @@ bfd_h8_disassemble (addr, info, mode) status = info->read_memory_func (addr + l, data + l, 2, info); /* Find the exact opcode/arg combo. */ - for (q = h8_opcodes; q->name; q++) + for (qi = h8_instructions; qi->opcode->name; qi++) { + const struct h8_opcode *q = qi->opcode; op_type *nib = q->data.nib; unsigned int len = 0; @@ -247,7 +269,7 @@ bfd_h8_disassemble (addr, info, mode) { int i; - for (i = 0; i < q->length; i++) + for (i = 0; i < qi->length; i++) fprintf (stream, "%02x ", data[i]); for (; i < 6; i++) @@ -264,7 +286,7 @@ bfd_h8_disassemble (addr, info, mode) high = data[3] & 0x7; fprintf (stream, "@sp+,er%d-er%d", high - count, high); - return q->length; + return qi->length; } if (strcmp (q->name, "stm.l") == 0) @@ -275,7 +297,7 @@ bfd_h8_disassemble (addr, info, mode) low = data[3] & 0x7; fprintf (stream, "er%d-er%d,@-sp", low, low + count); - return q->length; + return qi->length; } /* Fill in the args. */ @@ -389,7 +411,7 @@ bfd_h8_disassemble (addr, info, mode) } } - return q->length; + return qi->length; } else /* xgettext:c-format */ |