diff options
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/copro.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/copro.s | 3 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 23 |
5 files changed, 36 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 0ca8031..9efeae4 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2016-02-24 Renlin Li <renlin.li@arm.com> + + * testsuite/gas/arm/copro.s: Use coprocessor other than 10, 11. + * testsuite/gas/arm/copro.d: Update. + 2016-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/tc-arm.c (arm_cpus): Add entry for cortex-a32. diff --git a/gas/testsuite/gas/arm/copro.d b/gas/testsuite/gas/arm/copro.d index d007c81..eb7b454 100644 --- a/gas/testsuite/gas/arm/copro.d +++ b/gas/testsuite/gas/arm/copro.d @@ -30,7 +30,7 @@ Disassembly of section .text: 0+050 <[^>]*> ecd43704 ldcl 7, cr3, \[r4\], \{4\} 0+054 <[^>]*> ecc52805 stcl 8, cr2, \[r5\], \{5\} 0+058 <[^>]*> fcd61906 ldc2l 9, cr1, \[r6\], \{6\} -0+05c <[^>]*> fcc70a07 stc2l 10, cr0, \[r7\], \{7\} +0+05c <[^>]*> fcc70c07 stc2l 12, cr0, \[r7\], \{7\} 0+060 <[^>]*> ecd88cff ldcl 12, cr8, \[r8\], \{255\}.* 0+064 <[^>]*> ecc99cfe stcl 12, cr9, \[r9\], \{254\}.* 0+068 <[^>]*> ec507d04 mrrc 13, 0, r7, r0, cr4 diff --git a/gas/testsuite/gas/arm/copro.s b/gas/testsuite/gas/arm/copro.s index 0ed0e05..f03f5ae 100644 --- a/gas/testsuite/gas/arm/copro.s +++ b/gas/testsuite/gas/arm/copro.s @@ -32,7 +32,8 @@ bar: ldcl 7, c3, [r4], {4} stcl p8, c2, [r5], {5} ldc2l 9, c1, [r6], {6} - stc2l p10, c0, [r7], {7} + @ using '10, 11' below results in an invalid stc2l instruction. + stc2l p12, c0, [r7], {7} @ using '11' below results in an (invalid) Neon vldmia instruction. ldcl 12, c8, [r8], {255} stcl p12, c9, [r9], {254} diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e9f1578..60d2d7d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-02-24 Renlin Li <renlin.li@arm.com> + + * arm-dis.c (print_insn_coprocessor): Check co-processor number for + cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2. + 2016-02-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (print_insn): Parenthesize expression to prevent diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 481270e..4960140 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -3198,6 +3198,7 @@ print_insn_coprocessor (bfd_vma pc, unsigned long mask; unsigned long value = 0; int cond; + int cp_num; struct arm_private_data *private_data = info->private_data; arm_feature_set allowed_arches = ARM_ARCH_NONE; @@ -3236,6 +3237,8 @@ print_insn_coprocessor (bfd_vma pc, mask = insn->mask; value = insn->value; + cp_num = (given >> 8) & 0xf; + if (thumb) { /* The high 4 bits are 0xe for Arm conditional instructions, and @@ -3271,6 +3274,26 @@ print_insn_coprocessor (bfd_vma pc, if (! ARM_CPU_HAS_FEATURE (insn->arch, allowed_arches)) continue; + if (insn->value == 0xfe000010 /* mcr2 */ + || insn->value == 0xfe100010 /* mrc2 */ + || insn->value == 0xfc100000 /* ldc2 */ + || insn->value == 0xfc000000) /* stc2 */ + { + if (cp_num == 10 || cp_num == 11) + is_unpredictable = TRUE; + } + else if (insn->value == 0x0e000000 /* cdp */ + || insn->value == 0xfe000000 /* cdp2 */ + || insn->value == 0x0e000010 /* mcr */ + || insn->value == 0x0e100010 /* mrc */ + || insn->value == 0x0c100000 /* ldc */ + || insn->value == 0x0c000000) /* stc */ + { + /* Floating-point instructions. */ + if (cp_num == 10 || cp_num == 11) + continue; + } + for (c = insn->assembler; *c; c++) { if (*c == '%') |