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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-mips.c11
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/mips/mips.exp1
-rw-r--r--gas/testsuite/gas/mips/mips16-hilo-match.d40
-rw-r--r--gas/testsuite/gas/mips/mips16-hilo-match.s148
6 files changed, 208 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2d1a9d1..887e0bb 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-09 Catherine Moore <clm@codesourcery.com>
+
+ * config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
+ with non-MIPS16 relocs.
+
2008-05-09 Chao-ying Fu <fu@mips.com>
* config/tc-mips.c (md_begin): Use strncmp to compare TARGET_OS, in
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 4a84e4d..1cac610 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -11749,6 +11749,7 @@ void
mips_frob_file (void)
{
struct mips_hi_fixup *l;
+ bfd_reloc_code_real_type looking_for_rtype = BFD_RELOC_UNUSED;
for (l = mips_hi_fixup_list; l != NULL; l = l->next)
{
@@ -11778,13 +11779,19 @@ mips_frob_file (void)
hi_pos = NULL;
lo_pos = NULL;
matched_lo_p = FALSE;
+
+ if (l->fixp->fx_r_type == BFD_RELOC_MIPS16_HI16
+ || l->fixp->fx_r_type == BFD_RELOC_MIPS16_HI16_S)
+ looking_for_rtype = BFD_RELOC_MIPS16_LO16;
+ else
+ looking_for_rtype = BFD_RELOC_LO16;
+
for (pos = &seginfo->fix_root; *pos != NULL; pos = &(*pos)->fx_next)
{
if (*pos == l->fixp)
hi_pos = pos;
- if (((*pos)->fx_r_type == BFD_RELOC_LO16
- || (*pos)->fx_r_type == BFD_RELOC_MIPS16_LO16)
+ if ((*pos)->fx_r_type == looking_for_rtype
&& (*pos)->fx_addsy == l->fixp->fx_addsy
&& (*pos)->fx_offset >= l->fixp->fx_offset
&& (lo_pos == NULL
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 17a4b31..0d8e43c 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-09 Catherine Moore <clm@codesourcery.com>
+
+ * gas/mips/mips16-hilo-match.s: New test.
+ * gas/mips/mip16-hilo-match.d: New test output.
+
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index d540a1a..29cff0c 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -528,6 +528,7 @@ if { [istarget mips*-*-vxworks*] } {
if $has_newabi {
run_dump_test "mips16-hilo-n32"
}
+ run_dump_test "mips16-hilo-match"
}
run_list_test "mips-no-jalx" "-32"
run_dump_test "delay"
diff --git a/gas/testsuite/gas/mips/mips16-hilo-match.d b/gas/testsuite/gas/mips/mips16-hilo-match.d
new file mode 100644
index 0000000..effd9bb
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16-hilo-match.d
@@ -0,0 +1,40 @@
+#objdump: -r
+#name: MIPS16 mips16-hilo-match
+
+.*: +file format .*mips.*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET TYPE VALUE
+00000010 R_MIPS_HI16 var4
+00000018 R_MIPS_LO16 var4
+00000008 R_MIPS_HI16 __var1
+00000020 R_MIPS_LO16 __var1
+0000001c R_MIPS_HI16 .sbss
+0000002c R_MIPS_LO16 .sbss
+00000030 R_MIPS_26 func4
+00000028 R_MIPS_HI16 __var3
+00000034 R_MIPS_LO16 __var3
+00000038 R_MIPS_LO16 hilo_match
+0000003c R_MIPS_HI16 .bss
+00000044 R_MIPS_LO16 .bss
+00000040 R_MIPS_HI16 .bss
+00000048 R_MIPS_LO16 .bss
+0000004c R_MIPS_26 func3
+00000024 R_MIPS_HI16 hilo_match
+00000050 R_MIPS_LO16 hilo_match
+0000005e R_MIPS16_HI16 .data
+00000068 R_MIPS16_LO16 .data
+0000006c R_MIPS16_26 func1
+00000072 R_MIPS16_26 func2
+00000078 R_MIPS16_HI16 hilo_match
+00000080 R_MIPS16_LO16 hilo_match
+00000086 R_MIPS16_LO16 hilo_match
+0000008a R_MIPS16_26 func1
+
+
+RELOCATION RECORDS FOR \[\.pdr\]:
+OFFSET TYPE VALUE
+00000000 R_MIPS_32 _pinit
+00000020 R_MIPS_32 pdelt
+
+
diff --git a/gas/testsuite/gas/mips/mips16-hilo-match.s b/gas/testsuite/gas/mips/mips16-hilo-match.s
new file mode 100644
index 0000000..7510d5d
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16-hilo-match.s
@@ -0,0 +1,148 @@
+ .align 2
+ .globl _pinit
+.LFB84:
+ .set nomips16
+ .ent _pinit
+_pinit:
+
+ lw $3,8($23)
+ li $5,1
+ lui $2,%hi(__var1)
+ ori $3,$3,0x1
+ lui $4,%hi(var4)
+ sw $3,8($23)
+ addiu $4,$4,%lo(var4)
+ lui $3,%hi(var5)
+ sw $5,%lo(__var1)($2)
+ lui $19,%hi(hilo_match)
+.LVL100:
+ lui $2,%hi(__var3)
+ sw $5,%lo(var5)($3)
+ .set noreorder
+ .set nomacro
+ jal func4
+ sw $5,%lo(__var3)($2)
+ .set macro
+ .set reorder
+
+ lw $17,%lo(hilo_match)($19)
+.LVL101:
+ lui $2,%hi(var6)
+ lui $3,%hi(var6+704)
+ addiu $16,$2,%lo(var6)
+.LVL102:
+ addiu $18,$3,%lo(var6+704)
+ .set noreorder
+ .set nomacro
+ jal func3
+ sw $2,%lo(hilo_match)($19)
+
+ .end _pinit
+.LFE84:
+ .size _pinit, .-_pinit
+ .align 2
+ .globl pdelt
+.LFB120:
+ .set mips16
+ .ent pdelt
+pdelt:
+ .set macro
+ .set reorder
+
+ li $2,16
+.L321:
+.LVL212:
+ j $31
+.LVL213:
+.L322:
+ lhu $2,36($17)
+ move $4,$16
+ li $16,%hi(var2)
+ sll $16,$16,8
+ addiu $2,1
+ sll $16,$16,8
+ addiu $16,%lo(var2)
+ .set noreorder
+ .set nomacro
+ jal func1
+ sh $2,36($17)
+ .set macro
+ .set reorder
+
+ .set noreorder
+ .set nomacro
+ jal func2
+ move $4,$16
+ .set macro
+ .set reorder
+
+ li $3,%hi(hilo_match)
+ sll $3,$3,8
+ sll $3,$3,8
+ lw $2,%lo(hilo_match)($3)
+ sw $2,0($17)
+ sw $17,%lo(hilo_match)($3)
+ .set noreorder
+ .set nomacro
+ jal func1
+ move $4,$16
+ .set macro
+ .set reorder
+
+.LVL214:
+ .set noreorder
+ .set nomacro
+ j $31
+ li $2,0
+ .set macro
+ .set reorder
+
+ .end pdelt
+ .align 2
+ .weak __var3
+ .section .sbss,"aw",@nobits
+ .align 2
+ .type __var3, @object
+ .size __var3, 4
+__var3:
+ .space 4
+ .weak __var1
+ .align 2
+ .type __var1, @object
+ .size __var1, 4
+__var1:
+ .space 4
+ .data
+ .align 2
+ .weak __hilo_match
+ .align 2
+ .type __hilo_match, @object
+ .size __hilo_match, 4
+__hilo_match:
+ .space 4
+ .data
+ .align 2
+ .align 2
+ .type var2, @object
+ .size var2, 32
+var2:
+ .word 0
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0
+ .byte 0
+ .byte 0
+ .word 0
+ .word 0
+ .half 0
+ .space 6
+ .align 2
+ .rdata
+ .align 2
+ .space 8
+ .local var5
+ .comm var5,4,4
+ .align 2
+ .local var6
+ .comm var6,704,4
generated by cgit v1.1 at 2024-12-13 21:57:57 +0000