diff options
| -rw-r--r-- | sim/testsuite/ChangeLog | 613 | ||||
| -rw-r--r-- | sim/testsuite/sim/arm/ChangeLog | 117 | ||||
| -rw-r--r-- | sim/testsuite/sim/cris/ChangeLog | 141 | ||||
| -rw-r--r-- | sim/testsuite/sim/fr30/ChangeLog | 112 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/ChangeLog | 76 | ||||
| -rw-r--r-- | sim/testsuite/sim/m32r/ChangeLog | 122 | ||||
| -rw-r--r-- | sim/testsuite/sim/v850/ChangeLog | 19 |
7 files changed, 587 insertions, 613 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index e8ebab4..a6c2ed1 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -6,14 +6,6 @@ * configure: Regenerate after bfin testsuite update. -2011-07-01 Nick Clifton <nickc@redhat.com> - - PR sim/12737 - * sim/arm/iwmmxt/wcmpgt.cgs: Remove expectation of failure. - * sim/arm/iwmmxt/wmac.cgs: Remove expectation of failure. - * sim/arm/iwmmxt/wsra.cgs: Remove expectation of failure. - * sim/arm/xscale/blx.cgs: Remove expectation of failure. - 2011-05-16 Mike Frysinger <vapier@gentoo.org> * lib/sim-defs.exp: Support cc tag in test files. @@ -22,32 +14,9 @@ Convert linker options into compiler options (c_ld_options) with -Wl. Compile .c and .S files into .x programs. -2011-05-11 Joseph Myers <joseph@codesourcery.com> - Hans-Peter Nilsson <hp@axis.com> - - PR sim/12737 - * sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs, - sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail. - 2011-05-04 Joseph Myers <joseph@codesourcery.com> * configure: Regenerate. - * sim/arm/allinsn.exp (xscale*-*-*): Don't handle target. - * sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle - targets. - * sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of - xscale*-*-*. - * sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target. - * sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of - xscale*-*-*. - -2010-10-07 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/c/seek3.c, sim/cris/c/seek4.c: New tests. - -2010-08-24 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/nonvcv32.ms: Neutralize changed &&-in-macro gas syntax. 2010-04-26 Mike Frysinger <vapier@gentoo.org> @@ -62,202 +31,8 @@ 2009-01-18 Hans-Peter Nilsson <hp@axis.com> - * sim/cris/asm/opterr5.ms, sim/cris/asm/opterr4.ms, - sim/cris/asm/opterr3.ms, sim/cris/asm/bare3.ms: New tests. * lib/sim-defs.exp (run_sim_test): New option progopts. -2009-01-06 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/c/mmap5.c, sim/cris/c/mmap6.c, sim/cris/c/mmap7.c, - sim/cris/c/mmap8.c, sim/cris/c/hellodyn3.c: New tests. - -2009-01-03 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/c/settls1.c: New test. - * sim/cris/c/exitg1.c, sim/cris/c/exitg2.c: New tests. - * sim/cris/c/uname1.c: New test. - * sim/cris/c/mmap1.c (MMAP_FLAGS): Default-define to - MAP_PRIVATE and use this macro in the mmap call. - * sim/cris/c/mmap4.c: New test. - * sim/cris/c/access1.c: New test. - * sim/cris/asm/pid1.ms: New test. - -2008-12-30 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/badarch1.ms: Tweak error message match. - - * sim/cris/asm/badarch1.ms, sim/cris/c/badldso1.c, - sim/cris/c/badldso2.c, sim/cris/c/badldso3.c, - sim/cris/c/helloaout.c, sim/cris/c/hellodyn.c, - sim/cris/c/hellodyn2.c, sim/cris/c/writev1.c, - sim/cris/c/writev2.c: New tests. - * sim/cris/c/c.exp: If compiler links libc.so when attempting to - link dynamically, create symlink named "lib" to the directory - where it is found. Handle new test-case option "dynamic". - - * sim/cris/asm/opterr1.ms, sim/cris/asm/opterr2.ms: Adjust for - differences in getopt_long error message quoting. - -2008-02-12 M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com> - - * sim/cr16/: New directory. Tests for CR16 simulator. - sim/cr16/allinsn.exp and sim/cr16/misc.exp: New files: Test scripts. - sim/cr16/testutils.inc: New file: Test macros. - sim/cr16/addb.cgs, sim/cr16/addd.cgs, sim/cr16/addi.cgs, - sim/cr16/addw.cgs, sim/cr16/andb.cgs, sim/cr16/andd.cgs, - sim/cr16/andw.cgs, sim/cr16/ashub.cgs, sim/cr16/ashub_i.cgs, - sim/cr16/ashud.cgs, sim/cr16/ashud_i.cgs, sim/cr16/ashuw.cgs, - sim/cr16/ashuw_i.cgs, sim/cr16/lshb.cgs, sim/cr16/lshb_i.cgs, - sim/cr16/lshd.cgs, sim/cr16/lshd_i.cgs, sim/cr16/lshw.cgs, - sim/cr16/lshw_i.cgs, sim/cr16/bal1_24.cgs, sim/cr16/bal2_24.cgs, - sim/cr16/bcc.cgs, sim/cr16/bcs.cgs, sim/cr16/beq.cgs, sim/cr16/bne.cgs - sim/cr16/bge.cgs, sim/cr16/bgt.cgs, sim/cr16/bhi.cgs, sim/cr16/bhs.cgs, - sim/cr16/br.cgs, sim/cr16/beq0b.cgs, sim/cr16/beq0w.cgs, - sim/cr16/bne0b.cgs, sim/cr16/bne0w.cgs, sim/cr16/cmpb.cgs, - sim/cr16/cmpb_i.cgs, sim/cr16/cmpd.cgs, sim/cr16/cmpd_i.cgs, - sim/cr16/cmpw.cgs, sim/cr16/cmpw_i.cgs, sim/cr16/cmpi.cgs, - sim/cr16/excp.cgs, sim/cr16/hello.ms, sim/cr16/jal.cgs, - sim/cr16/jeq.cgs, sim/cr16/jcc.cgs, sim/cr16/jcs.cgs, sim/cr16/jfc.cgs, - sim/cr16/jfs.cgs sim/cr16/jge.cgs, sim/cr16/jgt.cgs, sim/cr16/jhi.cgs, - sim/cr16/jhs.cgs sim/cr16/jlo.cgs, sim/cr16/jls.cgs, sim/cr16/jlt.cgs, - sim/cr16/jne.cgs, sim/cr16/jump.cgs, sim/cr16/loadb.cgs, - sim/cr16/loadd.cgs, sim/cr16/loadw.cgs, sim/cr16/loadm.cgs, - sim/cr16/loadmp.cgs, sim/cr16/lprd-sprd.cgs, sim/cr16/lpr-spr.cgs, - sim/cr16/macqw.cgs, sim/cr16/macsw.cgs, sim/cr16/macuw.cgs, - sim/cr16/movb.cgs, sim/cr16/movd.cgs, sim/cr16/movw.cgs, - sim/cr16/movxb.cgs, sim/cr16/movxw.cgs, sim/cr16/movzb.cgs, - sim/cr16/movzw.cgs, sim/cr16/mulb.cgs, sim/cr16/mulsb.cgs, - sim/cr16/mulsw.cgs, sim/cr16/muluw.cgs, sim/cr16/mulw.cgs, - sim/cr16/orb.cgs, sim/cr16/ord.cgs, sim/cr16/orw.cgs, - sim/cr16/pop1.cgs, sim/cr16/pop2.cgs, sim/cr16/pop3.cgs, - sim/cr16/popret1.cgs, sim/cr16/popret2.cgs, sim/cr16/popret3.cgs, - sim/cr16/push1.cgs, sim/cr16/push2.cgs, sim/cr16/push3.cgs, - sim/cr16/nop.cgs, sim/cr16/ret.cgs, sim/cr16/scc.cgs, sim/cr16/scs.cgs, - sim/cr16/seq.cgs, sim/cr16/sfc.cgs, sim/cr16/sfs.cgs, sim/cr16/sge.cgs, - sim/cr16/sgt.cgs, sim/cr16/shi.cgs, sim/cr16/shs.cgs, sim/cr16/slo.cgs, - sim/cr16/sls.cgs, sim/cr16/slt.cgs, sim/cr16/sne.cgs, - sim/cr16/storb.cgs, sim/cr16/stord.cgs, sim/cr16/storw.cgs, - sim/cr16/subb.cgs, sim/cr16/subd.cgs, sim/cr16/subi.cgs, - sim/cr16/subw.cgs, sim/cr16/xorb.cgs, sim/cr16/xord.cgs, - sim/cr16/xorw.cgs: New files: CR16 simulator tests. - -2008-02-05 DJ Delorie <dj@redhat.com> - - * sim/v850/: New directory. - * sim/v850/allinsns.exp: New. - * sim/v850/bsh.cgs: New. - * sim/v850/div.cgs: New. - * sim/v850/divh.cgs: New. - * sim/v850/divh_3.cgs: New. - * sim/v850/divhu.cgs: New. - * sim/v850/divu.cgs: New. - * sim/v850/sar.cgs: New. - * sim/v850/satadd.cgs: New. - * sim/v850/satsub.cgs: New. - * sim/v850/satsubi.cgs: New. - * sim/v850/satsubr.cgs: New. - * sim/v850/shl.cgs: New. - * sim/v850/shr.cgs: New. - * sim/v850/testutils.cgs: New. - * sim/v850/testutils.inc: New. - -2007-11-08 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Tweak - stack-pointer match pattern for 4K host environment. - -2007-10-22 Edgar E. Iglesias <edgar@axis.com> - Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/testutils.inc (test_move_cc): Add missing call to - test_cc. - * sim/cris/asm/asr.ms: Correct expected condition code flags. - * sim/cris/asm/boundr.ms: Ditto. - * sim/cris/asm/dstep.ms: Ditto. - * sim/cris/asm/lsr.ms: Ditto. - * sim/cris/asm/movecr.ms: Ditto. - * sim/cris/asm/mover.ms: Ditto. - * sim/cris/asm/neg.ms: Ditto. Use test_cc, not test_move_cc. - * sim/cris/asm/op3.ms: Check the condition code flags after the insn - under test. - * sim/cris/asm/movecrt10.ms: Update expected number of simulated - cycles. - * sim/cris/asm/movecrt32.ms: Ditto. - * sim/cris/asm/jsr.ms: Don't use local label 8. - * sim/cris/asm/nonvcv32.ms: New test. - -2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> - - * sim/cris/c/freopen2.c: Added testcase. - -2006-10-02 Hans-Peter Nilsson <hp@axis.com> - Edgar E. Iglesias <edgar@axis.com> - - * sim/cris/c/clone5.c, sim/cris/c/mprotect1.c, - sim/cris/c/rtsigprocmask1.c, sim/cris/c/rtsigsuspend1.c, - sim/cris/c/sig7.c, sim/cris/c/sigreturn1.c, - sim/cris/c/sigreturn2.c, sim/cris/c/syscall1.c, - sim/cris/c/syscall2.c, sim/cris/c/sysctl2.c, sim/cris/c/fcntl1.c, - sim/cris/c/readlink2.c: Add code to print ENOSYS if syscall being - tested returns ENOSYS. Add early exit where needed. Change any - existing code to print "xyzzy", not "pass". - * sim/cris/asm/option3.ms, sim/cris/asm/option4.ms, - sim/cris/c/clone6.c, sim/cris/c/fcntl2.c, - sim/cris/c/mprotect2.c, sim/cris/c/readlink11.c, - sim/cris/c/rtsigprocmask2.c, sim/cris/c/rtsigsuspend2.c, - sim/cris/c/sig13.c, sim/cris/c/sigreturn3.c, - sim/cris/c/sigreturn4.c, sim/cris/c/syscall3.c, - sim/cris/c/syscall4.c, sim/cris/c/syscall5.c, - sim/cris/c/syscall6.c, sim/cris/c/syscall7.c, - sim/cris/c/syscall8.c, sim/cris/c/sysctl3.c: New tests. - -2006-09-30 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/c/pipe2.c: Adjust expected output. - (process): Don't write as much to the pipe as to trig the - inordinate-amount test in the sim pipe machinery. Correct test of - write return-value; check only that pipemax bytes were - successfully written. For error-case, emit strerror as well. - (main): Add a second read. - -2006-04-08 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/hw/rv-n-cris/irq6.ms: New test. - -2006-04-03 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/hw: New directory for subdirectories with tests. - * sim/cris/hw/rv-n-cris: New directory with tests. - -2006-04-02 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/testutils.inc (test_h_mem): Use register prefix. - (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto. Correct - syntax. - - * sim/cris/asm/x0-v10.ms, sim/cris/asm/x0-v32.ms: Widen regexp for - stack pointer values. - -2006-02-23 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/c/time2.c: New test. - -2006-01-10 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/x1-v10.ms, sim/cris/asm/x3-v10.ms, - sim/cris/asm/x7-v10.ms: Update expected cycle output. - -2005-12-06 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris/asm/movmp8.ms, sim/cris/asm/pcplus.ms: New tests. - * sim/cris/asm/movmp.ms: Do not write to P0, P4 or P8. - * sim/cris/asm/raw13.ms: Write to MOF instead of WZ (P4). - -2005-11-21 Hans-Peter Nilsson <hp@axis.com> - - * sim/cris: New directory with C and assembly tests for the CRIS - simulator. - 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> * configure: Regenerated to track ../common/aclocal.m4 changes. @@ -293,34 +68,6 @@ * lib/sim-defs.exp: Remove stray semicolons. -2004-03-01 Richard Sandiford <rsandifo@redhat.com> - - * sim/frv/allinsn.exp (all_machs): Add fr405 and fr450. - * sim/fr400/allinsn.exp (all_machs): Likewise. - * sim/fr400/addss.cgs (mach): Change to "fr405 fr450". - * sim/fr400/scutss.cgs (mach): Likewise. - * sim/fr400/slass.cgs (mach): Likewise. - * sim/fr400/smass.cgs (mach): Likewise. - * sim/fr400/smsss.cgs (mach): Likewise. - * sim/fr400/smu.cgs (mach): Likewise. - * sim/fr400/subss.cgs (mach): Likewise. - * sim/interrupts/fp_exception.cgs: Replace fmadds with .word. - * sim/interrupts/fp_exception-fr550.cgs: Likewise. - * sim/frv/mqlclrhs.cgs: New test. - * sim/frv/mqlmths.cgs: New test. - * sim/frv/mqsllhi.cgs: New test. - * sim/frv/mqsrahi.cgs: New test. - -2004-03-01 Richard Sandiford <rsandifo@redhat.com> - - * sim/frv/fr400/scutss.cgs: Fix tests to account for rounding. - Add some new ones. - -2004-03-01 Richard Sandiford <rsandifo@redhat.com> - - * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete. - * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete. - 2004-01-26 Chris Demetriou <cgd@broadcom.com> * sim/mips: New directory. Tests for the MIPS simulator. @@ -330,55 +77,6 @@ * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a test passes. -2003-10-10 Dave Brolley <brolley@redhat.com> - - * sim/frv/testutils.inc (or_gr_immed): New macro. - * sim/frv/fp_exception-fr550.cgs: Write insns using - unaligned registers into the program in order to - cause the required exceptions. - * sim/frv/fp_exception.cgs: Ditto. - * sim/frv/regalign.cgs: Ditto. - -2003-10-06 Dave Brolley <brolley@redhat.com> - - * sim/frv/fr550: New subdirectory. - * sim/frv/fr400/*.cgs: Add fr550 as appropriate. - * sim/frv/fr500/*.cgs: Add fr550 as appropriate. - * sim/frv/interrupts/*.cgs: Add fr550 as appropriate. - * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550. - -2003-09-19 Michael Snyder <msnyder@redhat.com> - - * sim/frv/nldqi.cgs: Remove. This insn was never implemented - by Fujitsu. - -2003-09-19 Dave Brolley <brolley@redhat.com> - - * sim/frv/rstqf.cgs: Use nldq instead of nldqi. - * sim/frv/rstq.cgs: Use nldq instead of nldqi. - -2003-09-11 Michael Snyder <msnyder@redhat.com> - - * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273], - which according to the comments seems to be the intent. - -2003-09-09 Dave Brolley <brolley@redhat.com> - - * sim/frv/maddaccs.cgs: move to fr400 subdirectory. - * sim/frv/msubaccs.cgs: move to fr400 subdirectory. - * sim/frv/masaccs.cgs: move to fr400 subdirectory. - -2003-09-03 Michael Snyder <msnyder@redhat.com> - - * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be - consistent with other tests in the directory. - -2003-09-03 Michael Snyder <msnyder@redhat.com> - - * sim/frv/interrupts/Ipipe-fr400.cgs: New file. - * sim/frv/interrupts/Ipipe-fr500.cgs: New file. - * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above). - 2003-08-20 Michael Snyder <msnyder@redhat.com> On behalf of Dave Brolley @@ -393,98 +91,6 @@ * sim/h8300: New directory. Tests for Renesas h8/300 family. -2003-04-01 Nick Clifton <nickc@redhat.com> - - * sim/arm: New directory: Tests for ARM simulator. - * sim/arm/allinsn.exp: New file: Test script. - * sim/arm/testutils.inc: New file: Test macros. - * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs, - sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs, - sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs, - sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs, - sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs, - sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms, - sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs, - sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs, - sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs, - sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs, - sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs, - sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs, - sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs, - sim/arm/swpb.cgs, sim/arm/teq.cgs, sim/arm/tst.cgs, - sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests. - * sim/arm/iwmmxt: New Directory: Tests for iWMMXt. - * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script. - * sim/arm/iwmmxt/testutils.inc: New file: Test macros. - * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs, - sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs, - sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs, - sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs, - sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs, - sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs, - sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs, - sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs, - sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs, - sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs, - sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs, - sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs, - sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs, - sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs, - sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs, - sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs, - sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs, - sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs, - sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests. - * sim/arm/thumb: New Directory: Thumb tests. - * sim/arm/thumb/allthumb.exp: New file: Test script. - * sim/arm/thumb/testutils.inc: New file: Test macros. - * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs, - sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs, - sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs, - sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs, - sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs, - sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs, - sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs, - sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs, - sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs, - sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs, - sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs, - sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs, - sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs, - sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs, - sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs, - sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs, - sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs, - sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs, - sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs, - sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs, - sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs, - sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs, - sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs, - sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs, - sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs, - sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs, - sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs, - sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs, - sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs, - sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs, - sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs, - sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs, - sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs, - sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs, - sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs, - sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs, - sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs, - sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs, - sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb - tests. - * sim/arm/xscale: New directory. - * sim/arm/xscale/xscale.exp: New file: Test script. - * sim/arm/xscale/testutils.inc: New file: Test macros. - * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs, - sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs, - sim/arm/xscale/mra.cgs: New files: XScale tests. - 2002-06-16 Andrew Cagney <ac131313@redhat.com> * configure: Regenerated to track ../common/aclocal.m4 changes. @@ -523,18 +129,6 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble and target_link instead. -1999-04-21 Doug Evans <devans@casey.cygnus.com> - - * sim/m32r/nop.cgs: Add missing nop insn. - -Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/stb.cgs: Correct for unaligned access. - * sim/fr30/sth.cgs: Correct for unaligned access. - * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct - for unaligned access. - * sim/fr30/and.cgs: Test unaligned access. - Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com> * lib/sim-defs.exp (sim_run): Print simulator arguments log message. @@ -542,62 +136,6 @@ Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com> 1999-01-05 Doug Evans <devans@casey.cygnus.com> * lib/sim-defs.exp (run_sim_test): New arg all_machs. - * sim/fr30/allinsn.exp: Update. - * sim/fr30/misc.exp: Update. - * sim/m32r/allinsn.exp: Update. - * sim/m32r/misc.exp: Update. - -Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/ldres.cgs: New testcase. - * sim/fr30/copld.cgs: New testcase. - * sim/fr30/copst.cgs: New testcase. - * sim/fr30/copsv.cgs: New testcase. - * sim/fr30/nop.cgs: New testcase. - * sim/fr30/andccr.cgs: New testcase. - * sim/fr30/orccr.cgs: New testcase. - * sim/fr30/addsp.cgs: New testcase. - * sim/fr30/stilm.cgs: New testcase. - * sim/fr30/extsb.cgs: New testcase. - * sim/fr30/extub.cgs: New testcase. - * sim/fr30/extsh.cgs: New testcase. - * sim/fr30/extuh.cgs: New testcase. - * sim/fr30/enter.cgs: New testcase. - * sim/fr30/leave.cgs: New testcase. - * sim/fr30/xchb.cgs: New testcase. - * sim/fr30/dmovb.cgs: New testcase. - * sim/fr30/dmov.cgs: New testcase. - * sim/fr30/dmovh.cgs: New testcase. - -Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros. - * sim/fr30/ret.cgs: Add tests fir ret:d. - * sim/fr30/inte.cgs: New testcase. - * sim/fr30/reti.cgs: New testcase. - * sim/fr30/bra.cgs: New testcase. - * sim/fr30/bno.cgs: New testcase. - * sim/fr30/beq.cgs: New testcase. - * sim/fr30/bne.cgs: New testcase. - * sim/fr30/bc.cgs: New testcase. - * sim/fr30/bnc.cgs: New testcase. - * sim/fr30/bn.cgs: New testcase. - * sim/fr30/bp.cgs: New testcase. - * sim/fr30/bv.cgs: New testcase. - * sim/fr30/bnv.cgs: New testcase. - * sim/fr30/blt.cgs: New testcase. - * sim/fr30/bge.cgs: New testcase. - * sim/fr30/ble.cgs: New testcase. - * sim/fr30/bgt.cgs: New testcase. - * sim/fr30/bls.cgs: New testcase. - * sim/fr30/bhi.cgs: New testcase. - -Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/div.cgs (int): Add signed division scenario. - * sim/fr30/int.cgs (int): Complete testcase. - * sim/fr30/testutils.inc (_start): Initialize tbr. - (test_s_user,test_s_system,set_i,test_i): New macros. 1998-12-14 Doug Evans <devans@casey.cygnus.com> @@ -605,60 +143,6 @@ Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> errors. Translate \n sequences in expected output to newline char. (slurp_options): Make parentheses optional. (sim_run): Look for board_info sim,options. - * sim/fr30/hello.ms: Add trailing \n to expected output. - * sim/m32r/hello.ms: Ditto. - * sim/m32r/hw-trap.ms: Ditto. - - * sim/m32r/trap.cgs: Properly align trap2_handler. - - * sim/m32r/uread16.ms: New testcase. - * sim/m32r/uread32.ms: New testcase. - * sim/m32r/uwrite16.ms: New testcase. - * sim/m32r/uwrite32.ms: New testcase. - -1998-12-14 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/call.cgs: Test ret here as well. - * sim/fr30/ld.cgs: Remove bogus comment. - * sim/fr30/testutils.inc (save_rp,restore_rp): New macros. - * sim/fr30/div.ms: New testcase. - * sim/fr30/st.cgs: New testcase. - * sim/fr30/sth.cgs: New testcase. - * sim/fr30/stb.cgs: New testcase. - * sim/fr30/mov.cgs: New testcase. - * sim/fr30/jmp.cgs: New testcase. - * sim/fr30/ret.cgs: New testcase. - * sim/fr30/int.cgs: New testcase. - -Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/div0s.cgs: New testcase. - * sim/fr30/div0u.cgs: New testcase. - * sim/fr30/div1.cgs: New testcase. - * sim/fr30/div2.cgs: New testcase. - * sim/fr30/div3.cgs: New testcase. - * sim/fr30/div4s.cgs: New testcase. - * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. - -Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/testutils.inc (set_s_user): Correct Mask. - (set_s_system): Correct Mask. - * sim/fr30/ld.cgs (ld): Move previously failing test back - into place. - * sim/fr30/ldm0.cgs: New testcase. - * sim/fr30/ldm1.cgs: New testcase. - * sim/fr30/stm0.cgs: New testcase. - * sim/fr30/stm1.cgs: New testcase. - -Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/ld.cgs: Implement more loads. - * sim/fr30/call.cgs: New testcase. - * sim/fr30/testutils.inc (testr_h_dr): New macro. - (set_s_user,set_s_system): New macros. - - * sim/fr30: New Directory. Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com> @@ -671,12 +155,6 @@ Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com> * lib/sim-defs.exp (sim_run): download target program to remote host, if necessary. for unix-driven win32 testing. -Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr. - * sim/m32r/rte.cgs: Test bbpc,bbpsw. - * sim/m32r/trap.cgs: Test bbpc,bbpsw. - Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com> * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of @@ -686,10 +164,6 @@ Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com> * Makefile.in (clean,mostlyclean): Change leading spaces to a tab. -Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com> - - * sim/m32r/hw-trap.ms: New testcase. - Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com> * lib/sim-defs.exp: Print out timeout setting info when "-v" is used. @@ -699,15 +173,6 @@ Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com> * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options, which is now a list of options controlling the behaviour of sim_run. -Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> - - * sim/m32r/addx.cgs: Add another test. - * sim/m32r/jmp.cgs: Add another test. - -Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/trap.cgs: Test trap 2. - Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> * lib/sim-defs.exp (sim_run): Add possible environment variable @@ -751,92 +216,14 @@ Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails, try all machs. - * sim/m32r/addx.cgs: Test (-1)+(-1)+1. - -Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/mv[ft]achi.cgs: Fix expected result - (sign extension of top 8 bits). - Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com> * Makefile.in (RUNTEST): Fix path to runtest. -Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> - - * sim/m32r/unlock.cgs: Fixed test. - * sim/m32r/mvfc.cgs: Fixed test. - * sim/m32r/remu.cgs: Fixed test. - * sim/m32r/bnc24.cgs: Test long BNC instruction. - * sim/m32r/bnc8.cgs: Test short BNC instruction. - * sim/m32r/ld-plus.cgs: Test LD instruction. - * sim/m32r/macwhi.cgs: Test MACWHI instruction. - * sim/m32r/macwlo.cgs: Test MACWLO instruction. - * sim/m32r/mulwhi.cgs: Test MULWHI instruction. - * sim/m32r/mulwlo.cgs: Test MULWLO instruction. - * sim/m32r/mvfachi.cgs: Test MVFACHI instruction. - * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction. - * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction. - * sim/m32r/addv.cgs: Test ADDV instruction. - * sim/m32r/addv3.cgs: Test ADDV3 instruction. - * sim/m32r/addx.cgs: Test ADDX instruction. - * sim/m32r/lock.cgs: Test LOCK instruction. - * sim/m32r/neg.cgs: Test NEG instruction. - * sim/m32r/not.cgs: Test NOT instruction. - * sim/m32r/unlock.cgs: Test UNLOCK instruction. - -Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> - - * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an - address into a general register. - - * sim/m32r/or3.cgs: Test OR3 instruction. - * sim/m32r/rach.cgs: Test RACH instruction. - * sim/m32r/rem.cgs: Test REM instruction. - * sim/m32r/sub.cgs: Test SUB instruction. - * sim/m32r/mv.cgs: Test MV instruction. - * sim/m32r/mul.cgs: Test MUL instruction. - * sim/m32r/bl24.cgs: Test long BL instruction. - * sim/m32r/bl8.cgs: Test short BL instruction. - * sim/m32r/blez.cgs: Test BLEZ instruction. - * sim/m32r/bltz.cgs: Test BLTZ instruction. - * sim/m32r/bne.cgs: Test BNE instruction. - * sim/m32r/bnez.cgs: Test BNEZ instruction. - * sim/m32r/bra24.cgs: Test long BRA instruction. - * sim/m32r/bra8.cgs: Test short BRA instruction. - * sim/m32r/jl.cgs: Test JL instruction. - * sim/m32r/or.cgs: Test OR instruction. - * sim/m32r/jmp.cgs: Test JMP instruction. - * sim/m32r/and.cgs: Test AND instruction. - * sim/m32r/and3.cgs: Test AND3 instruction. - * sim/m32r/beq.cgs: Test BEQ instruction. - * sim/m32r/beqz.cgs: Test BEQZ instruction. - * sim/m32r/bgez.cgs: Test BGEZ instruction. - * sim/m32r/bgtz.cgs: Test BGTZ instruction. - * sim/m32r/cmp.cgs: Test CMP instruction. - * sim/m32r/cmpi.cgs: Test CMPI instruction. - * sim/m32r/cmpu.cgs: Test CMPU instruction. - * sim/m32r/cmpui.cgs: Test CMPUI instruction. - * sim/m32r/div.cgs: Test DIV instruction. - * sim/m32r/divu.cgs: Test DIVU instruction. - * sim/m32r/cmpeq.cgs: Test CMPEQ instruction. - * sim/m32r/sll.cgs: Test SLL instruction. - * sim/m32r/sll3.cgs: Test SLL3 instruction. - * sim/m32r/slli.cgs: Test SLLI instruction. - * sim/m32r/sra.cgs: Test SRA instruction. - * sim/m32r/sra3.cgs: Test SRA3 instruction. - * sim/m32r/srai.cgs: Test SRAI instruction. - * sim/m32r/srl.cgs: Test SRL instruction. - * sim/m32r/srl3.cgs: Test SRL3 instruction. - * sim/m32r/srli.cgs: Test SRLI instruction. - * sim/m32r/xor3.cgs: Test XOR3 instruction. - * sim/m32r/xor.cgs: Test XOR instruction. - Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> * config/default.exp: New file. * lib/sim-defs.exp: New file. - * sim/m32r/*: m32r dejagnu simulator testsuite. * Makefile.in (build_alias): Define. (arch): Define. diff --git a/sim/testsuite/sim/arm/ChangeLog b/sim/testsuite/sim/arm/ChangeLog new file mode 100644 index 0000000..6b909ba --- /dev/null +++ b/sim/testsuite/sim/arm/ChangeLog @@ -0,0 +1,117 @@ +2011-07-01 Nick Clifton <nickc@redhat.com> + + PR sim/12737 + * iwmmxt/wcmpgt.cgs: Remove expectation of failure. + * iwmmxt/wmac.cgs: Remove expectation of failure. + * iwmmxt/wsra.cgs: Remove expectation of failure. + * xscale/blx.cgs: Remove expectation of failure. + +2011-05-11 Joseph Myers <joseph@codesourcery.com> + Hans-Peter Nilsson <hp@axis.com> + + PR sim/12737 + * iwmmxt/wcmpgt.cgs, iwmmxt/wmac.cgs, + iwmmxt/wsra.cgs, xscale/blx.cgs: Kfail. + +2011-05-04 Joseph Myers <joseph@codesourcery.com> + + * allinsn.exp (xscale*-*-*): Don't handle target. + * misc.exp (thumb*-*-*, xscale*-*-*): Don't handle + targets. + * iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of + xscale*-*-*. + * thumb/allthumb.exp (thumb*-*-*): Don't handle target. + * xscale/xscale.exp: Test for arm*-*-* instead of + xscale*-*-*. + +2003-04-01 Nick Clifton <nickc@redhat.com> + + * .: New directory: Tests for ARM simulator. + * allinsn.exp: New file: Test script. + * testutils.inc: New file: Test macros. + * adc.cgs, add.cgs, and.cgs, + b.cgs, bic.cgs, bl.cgs, bx.cgs, + cmn.cgs, cmp.cgs, eor.cgs, + hello.ms, ldm.cgs, ldr.cgs, + ldrb.cgs, ldrh.cgs, ldrsb.cgs, + ldrsh.cgs, misaligned1.ms, misaligned2.ms, + misaligned3.ms, misc.exp, mla.cgs, + mov.cgs, mrs.cgs, msr.cgs, + mul.cgs, mvn.cgs, orr.cgs, + rsb.cgs, rsc.cgs, sbc.cgs, + smlal.cgs, smull.cgs, stm.cgs, + str.cgs, strb.cgs, strh.cgs, + sub.cgs, swi.cgs, swp.cgs, + swpb.cgs, teq.cgs, tst.cgs, + umlal.cgs, umull.cgs: New files: ARM tests. + * iwmmxt: New Directory: Tests for iWMMXt. + * iwmmxt/iwmmxt.exp: New file: Test script. + * iwmmxt/testutils.inc: New file: Test macros. + * iwmmxt/tbcst.cgs, iwmmxt/textrm.cgs, + iwmmxt/tinsr.cgs, iwmmxt/tmia.cgs, + iwmmxt/tmiaph.cgs, iwmmxt/tmiaxy.cgs, + iwmmxt/tmovmsk.cgss, iwmmxt/wacc.cgs, + iwmmxt/wadd.cgs, iwmmxt/waligni.cgs, + iwmmxt/walignr.cgs, iwmmxt/wand.cgs, + iwmmxt/wandn.cgs, iwmmxt/wavg2.cgs, + iwmmxt/wcmpeq.cgs, iwmmxt/wcmpgt.cgs, + iwmmxt/wmac.cgs, iwmmxt/wmadd.cgs, + iwmmxt/wmax.cgs, iwmmxt/wmin.cgs, + iwmmxt/wmov.cgs, iwmmxt/wmul.cgs, + iwmmxt/wor.cgs, iwmmxt/wpack.cgs, + iwmmxt/wror.cgs, iwmmxt/wsad.cgs, + iwmmxt/wshufh.cgs, iwmmxt/wsll.cgs, + iwmmxt/wsra.cgs, iwmmxt/wsrl.cgs, + iwmmxt/wsub.cgs, iwmmxt/wunpckeh.cgs, + iwmmxt/wunpckel.cgs, iwmmxt/wunpckih.cgs, + iwmmxt/wunpckil.cgs, iwmmxt/wxor.cgs, + iwmmxt/wzero.cgs: New files: iWMMXt tests. + * thumb: New Directory: Thumb tests. + * thumb/allthumb.exp: New file: Test script. + * thumb/testutils.inc: New file: Test macros. + * thumb/adc.cgs, thumb/add-hd-hs.cgs, + thumb/add-hd-rs.cgs, thumb/add-rd-hs.cgs, + thumb/add-sp.cgs, thumb/add.cgs, + thumb/addi.cgs, thumb/addi8.cgs, + thumb/and.cgs, thumb/asr.cgs, thumb/b.cgs, + thumb/bcc.cgs, thumb/bcs.cgs, + thumb/beq.cgs, thumb/bge.cgs, + thumb/bgt.cgs, thumb/bhi.cgs, + thumb/bic.cgs, thumb/bl-hi.cgs, + thumb/bl-lo.cgs, thumb/ble.cgs, + thumb/bls.cgs, thumb/blt.cgs, + thumb/bmi.cgs, thumb/bne.cgs, + thumb/bpl.cgs, thumb/bvc.cgs, + thumb/bvs.cgs, thumb/bx-hs.cgs, + thumb/bx-rs.cgs, thumb/cmn.cgs, + thumb/cmp-hd-hs.cgs, thumb/cmp-hd-rs.cgs, + thumb/cmp-rd-hs.cgs, thumb/cmp.cgs, + thumb/eor.cgs, thumb/lda-pc.cgs, + thumb/lda-sp.cgs, thumb/ldmia.cgs, + thumb/ldr-imm.cgs, thumb/ldr-pc.cgs, + thumb/ldr-sprel.cgs, thumb/ldr.cgs, + thumb/ldrb-imm.cgs, thumb/ldrb.cgs, + thumb/ldrh-imm.cgs, thumb/ldrh.cgs, + thumb/ldsb.cgs, thumb/ldsh.cgs, + thumb/lsl.cgs, thumb/lsr.cgs, + thumb/mov-hd-hs.cgs, thumb/mov-hd-rs.cgs, + thumb/mov-rd-hs.cgs, thumb/mov.cgs, + thumb/mul.cgs, thumb/mvn.cgs, + thumb/neg.cgs, thumb/orr.cgs, + thumb/pop-pc.cgs, thumb/pop.cgs, + thumb/push-lr.cgs, thumb/push.cgs, + thumb/ror.cgs, thumb/sbc.cgs, + thumb/stmia.cgs, thumb/str-imm.cgs, + thumb/str-sprel.cgs, thumb/str.cgs, + thumb/strb-imm.cgs, thumb/strb.cgs, + thumb/strh-imm.cgs, thumb/strh.cgs, + thumb/sub-sp.cgs, thumb/sub.cgs, + thumb/subi.cgs, thumb/subi8.cgs, + thumb/swi.cgs, thumb/tst.cgs: New files: Thumb + tests. + * xscale: New directory. + * xscale/xscale.exp: New file: Test script. + * xscale/testutils.inc: New file: Test macros. + * xscale/blx.cgs, xscale/mia.cgs, + xscale/miaph.cgs, xscale/miaxy.cgs, + xscale/mra.cgs: New files: XScale tests. diff --git a/sim/testsuite/sim/cris/ChangeLog b/sim/testsuite/sim/cris/ChangeLog new file mode 100644 index 0000000..eb8efc9 --- /dev/null +++ b/sim/testsuite/sim/cris/ChangeLog @@ -0,0 +1,141 @@ +2010-10-07 Hans-Peter Nilsson <hp@axis.com> + + * c/seek3.c, c/seek4.c: New tests. + +2010-08-24 Hans-Peter Nilsson <hp@axis.com> + + * asm/nonvcv32.ms: Neutralize changed &&-in-macro gas syntax. + +2009-01-18 Hans-Peter Nilsson <hp@axis.com> + + * asm/opterr5.ms, asm/opterr4.ms, + asm/opterr3.ms, asm/bare3.ms: New tests. + +2009-01-06 Hans-Peter Nilsson <hp@axis.com> + + * c/mmap5.c, c/mmap6.c, c/mmap7.c, + c/mmap8.c, c/hellodyn3.c: New tests. + +2009-01-03 Hans-Peter Nilsson <hp@axis.com> + + * c/settls1.c: New test. + * c/exitg1.c, c/exitg2.c: New tests. + * c/uname1.c: New test. + * c/mmap1.c (MMAP_FLAGS): Default-define to + MAP_PRIVATE and use this macro in the mmap call. + * c/mmap4.c: New test. + * c/access1.c: New test. + * asm/pid1.ms: New test. + +2008-12-30 Hans-Peter Nilsson <hp@axis.com> + + * asm/badarch1.ms: Tweak error message match. + + * asm/badarch1.ms, c/badldso1.c, + c/badldso2.c, c/badldso3.c, + c/helloaout.c, c/hellodyn.c, + c/hellodyn2.c, c/writev1.c, + c/writev2.c: New tests. + * c/c.exp: If compiler links libc.so when attempting to + link dynamically, create symlink named "lib" to the directory + where it is found. Handle new test-case option "dynamic". + + * asm/opterr1.ms, asm/opterr2.ms: Adjust for + differences in getopt_long error message quoting. + +2007-11-08 Hans-Peter Nilsson <hp@axis.com> + + * asm/x0-v10.ms, asm/x0-v32.ms: Tweak + stack-pointer match pattern for 4K host environment. + +2007-10-22 Edgar E. Iglesias <edgar@axis.com> + Hans-Peter Nilsson <hp@axis.com> + + * asm/testutils.inc (test_move_cc): Add missing call to + test_cc. + * asm/asr.ms: Correct expected condition code flags. + * asm/boundr.ms: Ditto. + * asm/dstep.ms: Ditto. + * asm/lsr.ms: Ditto. + * asm/movecr.ms: Ditto. + * asm/mover.ms: Ditto. + * asm/neg.ms: Ditto. Use test_cc, not test_move_cc. + * asm/op3.ms: Check the condition code flags after the insn + under test. + * asm/movecrt10.ms: Update expected number of simulated + cycles. + * asm/movecrt32.ms: Ditto. + * asm/jsr.ms: Don't use local label 8. + * asm/nonvcv32.ms: New test. + +2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com> + + * c/freopen2.c: Added testcase. + +2006-10-02 Hans-Peter Nilsson <hp@axis.com> + Edgar E. Iglesias <edgar@axis.com> + + * c/clone5.c, c/mprotect1.c, + c/rtsigprocmask1.c, c/rtsigsuspend1.c, + c/sig7.c, c/sigreturn1.c, + c/sigreturn2.c, c/syscall1.c, + c/syscall2.c, c/sysctl2.c, c/fcntl1.c, + c/readlink2.c: Add code to print ENOSYS if syscall being + tested returns ENOSYS. Add early exit where needed. Change any + existing code to print "xyzzy", not "pass". + * asm/option3.ms, asm/option4.ms, + c/clone6.c, c/fcntl2.c, + c/mprotect2.c, c/readlink11.c, + c/rtsigprocmask2.c, c/rtsigsuspend2.c, + c/sig13.c, c/sigreturn3.c, + c/sigreturn4.c, c/syscall3.c, + c/syscall4.c, c/syscall5.c, + c/syscall6.c, c/syscall7.c, + c/syscall8.c, c/sysctl3.c: New tests. + +2006-09-30 Hans-Peter Nilsson <hp@axis.com> + + * c/pipe2.c: Adjust expected output. + (process): Don't write as much to the pipe as to trig the + inordinate-amount test in the sim pipe machinery. Correct test of + write return-value; check only that pipemax bytes were + successfully written. For error-case, emit strerror as well. + (main): Add a second read. + +2006-04-08 Hans-Peter Nilsson <hp@axis.com> + + * hw/rv-n-cris/irq6.ms: New test. + +2006-04-03 Hans-Peter Nilsson <hp@axis.com> + + * hw: New directory for subdirectories with tests. + * hw/rv-n-cris: New directory with tests. + +2006-04-02 Hans-Peter Nilsson <hp@axis.com> + + * asm/testutils.inc (test_h_mem): Use register prefix. + (testr_h_dr, test_h_dr, ldmem_h_gr, mvr_h_mem): Ditto. Correct + syntax. + + * asm/x0-v10.ms, asm/x0-v32.ms: Widen regexp for + stack pointer values. + +2006-02-23 Hans-Peter Nilsson <hp@axis.com> + + * c/time2.c: New test. + +2006-01-10 Hans-Peter Nilsson <hp@axis.com> + + * asm/x1-v10.ms, asm/x3-v10.ms, + asm/x7-v10.ms: Update expected cycle output. + +2005-12-06 Hans-Peter Nilsson <hp@axis.com> + + * asm/movmp8.ms, asm/pcplus.ms: New tests. + * asm/movmp.ms: Do not write to P0, P4 or P8. + * asm/raw13.ms: Write to MOF instead of WZ (P4). + +2005-11-21 Hans-Peter Nilsson <hp@axis.com> + + * asm, c: New directory with C and assembly tests for the CRIS + simulator. diff --git a/sim/testsuite/sim/fr30/ChangeLog b/sim/testsuite/sim/fr30/ChangeLog new file mode 100644 index 0000000..f09850d --- /dev/null +++ b/sim/testsuite/sim/fr30/ChangeLog @@ -0,0 +1,112 @@ +Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com> + + * stb.cgs: Correct for unaligned access. + * sth.cgs: Correct for unaligned access. + * ldub.cgs: Fix typo: lduh->ldub. Correct + for unaligned access. + * and.cgs: Test unaligned access. + +1999-01-05 Doug Evans <devans@casey.cygnus.com> + + * allinsn.exp: Set all_machs. + * misc.exp: Likewise. + +Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> + + * ldres.cgs: New testcase. + * copld.cgs: New testcase. + * copst.cgs: New testcase. + * copsv.cgs: New testcase. + * nop.cgs: New testcase. + * andccr.cgs: New testcase. + * orccr.cgs: New testcase. + * addsp.cgs: New testcase. + * stilm.cgs: New testcase. + * extsb.cgs: New testcase. + * extub.cgs: New testcase. + * extsh.cgs: New testcase. + * extuh.cgs: New testcase. + * enter.cgs: New testcase. + * leave.cgs: New testcase. + * xchb.cgs: New testcase. + * dmovb.cgs: New testcase. + * dmov.cgs: New testcase. + * dmovh.cgs: New testcase. + +Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> + + * testutils.inc (take_branch{_d},no_branch{_d}): New macros. + * ret.cgs: Add tests fir ret:d. + * inte.cgs: New testcase. + * reti.cgs: New testcase. + * bra.cgs: New testcase. + * bno.cgs: New testcase. + * beq.cgs: New testcase. + * bne.cgs: New testcase. + * bc.cgs: New testcase. + * bnc.cgs: New testcase. + * bn.cgs: New testcase. + * bp.cgs: New testcase. + * bv.cgs: New testcase. + * bnv.cgs: New testcase. + * blt.cgs: New testcase. + * bge.cgs: New testcase. + * ble.cgs: New testcase. + * bgt.cgs: New testcase. + * bls.cgs: New testcase. + * bhi.cgs: New testcase. + +Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> + + * div.cgs (int): Add signed division scenario. + * int.cgs (int): Complete testcase. + * testutils.inc (_start): Initialize tbr. + (test_s_user,test_s_system,set_i,test_i): New macros. + +1998-12-14 Doug Evans <devans@casey.cygnus.com> + + * hello.ms: Add trailing \n to expected output. + +1998-12-14 Dave Brolley <brolley@cygnus.com> + + * call.cgs: Test ret here as well. + * ld.cgs: Remove bogus comment. + * testutils.inc (save_rp,restore_rp): New macros. + * div.ms: New testcase. + * st.cgs: New testcase. + * sth.cgs: New testcase. + * stb.cgs: New testcase. + * mov.cgs: New testcase. + * jmp.cgs: New testcase. + * ret.cgs: New testcase. + * int.cgs: New testcase. + +Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> + + * div0s.cgs: New testcase. + * div0u.cgs: New testcase. + * div1.cgs: New testcase. + * div2.cgs: New testcase. + * div3.cgs: New testcase. + * div4s.cgs: New testcase. + * testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. + +Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> + + * testutils.inc (set_s_user): Correct Mask. + (set_s_system): Correct Mask. + * ld.cgs (ld): Move previously failing test back + into place. + * ldm0.cgs: New testcase. + * ldm1.cgs: New testcase. + * stm0.cgs: New testcase. + * stm1.cgs: New testcase. + +Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> + + * ld.cgs: Implement more loads. + * call.cgs: New testcase. + * testutils.inc (testr_h_dr): New macro. + (set_s_user,set_s_system): New macros. + + * .: New Directory. diff --git a/sim/testsuite/sim/frv/ChangeLog b/sim/testsuite/sim/frv/ChangeLog new file mode 100644 index 0000000..75b7b54 --- /dev/null +++ b/sim/testsuite/sim/frv/ChangeLog @@ -0,0 +1,76 @@ +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * allinsn.exp (all_machs): Add fr405 and fr450. + * fr400/allinsn.exp (all_machs): Likewise. + * fr400/addss.cgs (mach): Change to "fr405 fr450". + * fr400/scutss.cgs (mach): Likewise. + * fr400/slass.cgs (mach): Likewise. + * fr400/smass.cgs (mach): Likewise. + * fr400/smsss.cgs (mach): Likewise. + * fr400/smu.cgs (mach): Likewise. + * fr400/subss.cgs (mach): Likewise. + * interrupts/fp_exception.cgs: Replace fmadds with .word. + * interrupts/fp_exception-fr550.cgs: Likewise. + * mqlclrhs.cgs: New test. + * mqlmths.cgs: New test. + * mqsllhi.cgs: New test. + * mqsrahi.cgs: New test. + +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * fr400/scutss.cgs: Fix tests to account for rounding. + Add some new ones. + +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * {rstb,rsth,rst,rstd,rstq}.cgs: Delete. + * {rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete. + +2003-10-10 Dave Brolley <brolley@redhat.com> + + * testutils.inc (or_gr_immed): New macro. + * fp_exception-fr550.cgs: Write insns using + unaligned registers into the program in order to + cause the required exceptions. + * fp_exception.cgs: Ditto. + * regalign.cgs: Ditto. + +2003-10-06 Dave Brolley <brolley@redhat.com> + + * fr550: New subdirectory. + * fr400/*.cgs: Add fr550 as appropriate. + * fr500/*.cgs: Add fr550 as appropriate. + * interrupts/*.cgs: Add fr550 as appropriate. + * interrupts/*-fr550.cgs: New test cases for fr550. + +2003-09-19 Michael Snyder <msnyder@redhat.com> + + * nldqi.cgs: Remove. This insn was never implemented + by Fujitsu. + +2003-09-19 Dave Brolley <brolley@redhat.com> + + * rstqf.cgs: Use nldq instead of nldqi. + * rstq.cgs: Use nldq instead of nldqi. + +2003-09-11 Michael Snyder <msnyder@redhat.com> + + * movgs.cgs: Change lcr to spr[273], + which according to the comments seems to be the intent. + +2003-09-09 Dave Brolley <brolley@redhat.com> + + * maddaccs.cgs: move to fr400 subdirectory. + * msubaccs.cgs: move to fr400 subdirectory. + * masaccs.cgs: move to fr400 subdirectory. + +2003-09-03 Michael Snyder <msnyder@redhat.com> + + * fr500/mclracc.cgs: Change mach to 'all', to be + consistent with other tests in the directory. + +2003-09-03 Michael Snyder <msnyder@redhat.com> + + * interrupts/Ipipe-fr400.cgs: New file. + * interrupts/Ipipe-fr500.cgs: New file. + * interrupts/Ipipe.cgs: Remove (replaced by above). diff --git a/sim/testsuite/sim/m32r/ChangeLog b/sim/testsuite/sim/m32r/ChangeLog new file mode 100644 index 0000000..f49908f --- /dev/null +++ b/sim/testsuite/sim/m32r/ChangeLog @@ -0,0 +1,122 @@ +1999-04-21 Doug Evans <devans@casey.cygnus.com> + + * nop.cgs: Add missing nop insn. + +1999-01-05 Doug Evans <devans@casey.cygnus.com> + + * allinsn.exp: Set all_machs. + * misc.exp: Likewise. + +1998-12-14 Doug Evans <devans@casey.cygnus.com> + + * hello.ms: Add trailing \n to expected output. + * hw-trap.ms: Ditto. + + * trap.cgs: Properly align trap2_handler. + + * uread16.ms: New testcase. + * uread32.ms: New testcase. + * uwrite16.ms: New testcase. + * uwrite32.ms: New testcase. + +Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com> + + * testutils.inc (test_h_gr): Use mvaddr_h_gr. + * rte.cgs: Test bbpc,bbpsw. + * trap.cgs: Test bbpc,bbpsw. + +Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com> + + * hw-trap.ms: New testcase. + +Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> + + * addx.cgs: Add another test. + * jmp.cgs: Add another test. + +Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> + + * trap.cgs: Test trap 2. + +Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> + + * addx.cgs: Test (-1)+(-1)+1. + +Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> + + * mv[ft]achi.cgs: Fix expected result + (sign extension of top 8 bits). + +Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> + + * unlock.cgs: Fixed test. + * mvfc.cgs: Fixed test. + * remu.cgs: Fixed test. + * bnc24.cgs: Test long BNC instruction. + * bnc8.cgs: Test short BNC instruction. + * ld-plus.cgs: Test LD instruction. + * macwhi.cgs: Test MACWHI instruction. + * macwlo.cgs: Test MACWLO instruction. + * mulwhi.cgs: Test MULWHI instruction. + * mulwlo.cgs: Test MULWLO instruction. + * mvfachi.cgs: Test MVFACHI instruction. + * mvfaclo.cgs: Test MVFACLO instruction. + * mvtaclo.cgs: Test MVTACLO instruction. + * addv.cgs: Test ADDV instruction. + * addv3.cgs: Test ADDV3 instruction. + * addx.cgs: Test ADDX instruction. + * lock.cgs: Test LOCK instruction. + * neg.cgs: Test NEG instruction. + * not.cgs: Test NOT instruction. + * unlock.cgs: Test UNLOCK instruction. + +Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> + + * testutils.inc (mvaddr_h_gr): new macro to load an + address into a general register. + + * or3.cgs: Test OR3 instruction. + * rach.cgs: Test RACH instruction. + * rem.cgs: Test REM instruction. + * sub.cgs: Test SUB instruction. + * mv.cgs: Test MV instruction. + * mul.cgs: Test MUL instruction. + * bl24.cgs: Test long BL instruction. + * bl8.cgs: Test short BL instruction. + * blez.cgs: Test BLEZ instruction. + * bltz.cgs: Test BLTZ instruction. + * bne.cgs: Test BNE instruction. + * bnez.cgs: Test BNEZ instruction. + * bra24.cgs: Test long BRA instruction. + * bra8.cgs: Test short BRA instruction. + * jl.cgs: Test JL instruction. + * or.cgs: Test OR instruction. + * jmp.cgs: Test JMP instruction. + * and.cgs: Test AND instruction. + * and3.cgs: Test AND3 instruction. + * beq.cgs: Test BEQ instruction. + * beqz.cgs: Test BEQZ instruction. + * bgez.cgs: Test BGEZ instruction. + * bgtz.cgs: Test BGTZ instruction. + * cmp.cgs: Test CMP instruction. + * cmpi.cgs: Test CMPI instruction. + * cmpu.cgs: Test CMPU instruction. + * cmpui.cgs: Test CMPUI instruction. + * div.cgs: Test DIV instruction. + * divu.cgs: Test DIVU instruction. + * cmpeq.cgs: Test CMPEQ instruction. + * sll.cgs: Test SLL instruction. + * sll3.cgs: Test SLL3 instruction. + * slli.cgs: Test SLLI instruction. + * sra.cgs: Test SRA instruction. + * sra3.cgs: Test SRA3 instruction. + * srai.cgs: Test SRAI instruction. + * srl.cgs: Test SRL instruction. + * srl3.cgs: Test SRL3 instruction. + * srli.cgs: Test SRLI instruction. + * xor3.cgs: Test XOR3 instruction. + * xor.cgs: Test XOR instruction. + +Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> + + * *: m32r dejagnu simulator testsuite. diff --git a/sim/testsuite/sim/v850/ChangeLog b/sim/testsuite/sim/v850/ChangeLog new file mode 100644 index 0000000..2508dfd --- /dev/null +++ b/sim/testsuite/sim/v850/ChangeLog @@ -0,0 +1,19 @@ +2008-02-05 DJ Delorie <dj@redhat.com> + + * .: New directory. + * allinsns.exp: New. + * bsh.cgs: New. + * div.cgs: New. + * divh.cgs: New. + * divh_3.cgs: New. + * divhu.cgs: New. + * divu.cgs: New. + * sar.cgs: New. + * satadd.cgs: New. + * satsub.cgs: New. + * satsubi.cgs: New. + * satsubr.cgs: New. + * shl.cgs: New. + * shr.cgs: New. + * testutils.cgs: New. + * testutils.inc: New. |