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-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/v850-opc.c16
2 files changed, 14 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ddbd91b..164b135 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,7 +1,11 @@
start-sanitize-v850
Wed Aug 21 18:46:26 1996 Jeffrey A Law (law@cygnus.com)
- * v850-ope.c ("jmp"): R1 is only operand.
+ * v850-opc.c (v850_operands): Add "B3" support.
+ (v850_opcodes): Fix and enable "set1", "clr1", "not1"
+ and "tst1".
+
+ * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand.
* v850-opc.c: Close unterminated comment.
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 3a99f03..bf3baaa 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -51,7 +51,11 @@ const struct v850_operand v850_operands[] = {
/* The DISP22 field in a format 4 insn. */
#define D22 (D16+1)
- { 16, 0, OPERAND_NUM }
+ { 16, 0, OPERAND_NUM },
+
+#define B3 (D22+1)
+/* The 3 bit immediate field in format 8 insn. */
+ { 3, 3, OPERAND_NUM }
} ;
@@ -172,13 +176,11 @@ const struct v850_opcode v850_opcodes[] = {
{ "jarl", one(0x0780), one(0xf83f), { R2,D22 } },
{ "jr", one(0x0780), one(0xffe0), { D22 } },
-#if 0
/* bit manipulation instructions */
-{ "set1", one(0x07c0), one(0xc7e0), {B3, R1, D16} },
-{ "not1", one(0x47c0), one(0xc7e0), {B3, R1, D16} },
-{ "clr1", one(0x87c0), one(0xc7e0), {B3, R1, D16} },
-{ "tst1", one(0xc7c0), one(0xc7e0), {B3, R1, D16} },
-#endif
+{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
/* special instructions */
{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0} },