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-rw-r--r--sim/common/ChangeLog7
-rw-r--r--sim/common/cgen-accfp.c16
-rw-r--r--sim/common/cgen-fpu.h99
-rw-r--r--sim/frv/ChangeLog4
-rw-r--r--sim/frv/sem.c40
-rw-r--r--sim/sh64/ChangeLog4
-rw-r--r--sim/sh64/cpu.h8
7 files changed, 103 insertions, 75 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 2f62553..d30e8fd 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,5 +1,12 @@
2010-01-24 Doug Evans <dje@sebabeach.org>
+ * cgen-accfp.c (fextsfdf): New arg how. All callers updated.
+ (ftruncdfsf, floatsisf, flostsidf, ufloatsisf, fixsfsi, fixdfsi,
+ ufixsfsi): Ditto.
+ * cgen-fpu.h (CGEN_FPCONV_KIND): New enum.
+ (struct cgen_fp_ops): Update signatures of floating point conversion
+ operations.
+
* Make-common.in (CGEN_SIM_DEPS): Define.
(CGEN_INCLUDE_DEPS): Use it.
(CGEN_MAIN_CPU_DEPS): Simplify.
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
index 929dd22..afbca6d 100644
--- a/sim/common/cgen-accfp.c
+++ b/sim/common/cgen-accfp.c
@@ -285,7 +285,7 @@ gesf (CGEN_FPU* fpu, SF x, SF y)
}
static DF
-fextsfdf (CGEN_FPU* fpu, SF x)
+fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x)
{
sim_fpu op1;
unsigned64 res;
@@ -297,7 +297,7 @@ fextsfdf (CGEN_FPU* fpu, SF x)
}
static SF
-ftruncdfsf (CGEN_FPU* fpu, DF x)
+ftruncdfsf (CGEN_FPU* fpu, int how UNUSED, DF x)
{
sim_fpu op1;
unsigned32 res;
@@ -309,7 +309,7 @@ ftruncdfsf (CGEN_FPU* fpu, DF x)
}
static SF
-floatsisf (CGEN_FPU* fpu, SI x)
+floatsisf (CGEN_FPU* fpu, int how UNUSED, SI x)
{
sim_fpu ans;
unsigned32 res;
@@ -320,7 +320,7 @@ floatsisf (CGEN_FPU* fpu, SI x)
}
static DF
-floatsidf (CGEN_FPU* fpu, SI x)
+floatsidf (CGEN_FPU* fpu, int how UNUSED, SI x)
{
sim_fpu ans;
unsigned64 res;
@@ -331,7 +331,7 @@ floatsidf (CGEN_FPU* fpu, SI x)
}
static SF
-ufloatsisf (CGEN_FPU* fpu, USI x)
+ufloatsisf (CGEN_FPU* fpu, int how UNUSED, USI x)
{
sim_fpu ans;
unsigned32 res;
@@ -342,7 +342,7 @@ ufloatsisf (CGEN_FPU* fpu, USI x)
}
static SI
-fixsfsi (CGEN_FPU* fpu, SF x)
+fixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x)
{
sim_fpu op1;
unsigned32 res;
@@ -353,7 +353,7 @@ fixsfsi (CGEN_FPU* fpu, SF x)
}
static SI
-fixdfsi (CGEN_FPU* fpu, DF x)
+fixdfsi (CGEN_FPU* fpu, int how UNUSED, DF x)
{
sim_fpu op1;
unsigned32 res;
@@ -364,7 +364,7 @@ fixdfsi (CGEN_FPU* fpu, DF x)
}
static USI
-ufixsfsi (CGEN_FPU* fpu, SF x)
+ufixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x)
{
sim_fpu op1;
unsigned32 res;
diff --git a/sim/common/cgen-fpu.h b/sim/common/cgen-fpu.h
index bc3364e..134b4d0 100644
--- a/sim/common/cgen-fpu.h
+++ b/sim/common/cgen-fpu.h
@@ -1,5 +1,6 @@
/* CGEN fpu support
- Copyright (C) 1999 Cygnus Solutions. */
+ Copyright (C) 1999 Cygnus Solutions.
+ Copyright (C) 2010 Doug Evans. */
#ifndef CGEN_FPU_H
#define CGEN_FPU_H
@@ -18,6 +19,18 @@ typedef struct { SI parts[4]; } TF;
#define TARGET_EXT_FP_WORDS 4
#endif
+/* Supported floating point conversion kinds (rounding modes).
+ FIXME: The IEEE rounding modes need to be implemented. */
+
+typedef enum {
+ FPCONV_DEFAULT = 0,
+ FPCONV_TIES_TO_EVEN = 1,
+ FPCONV_TIES_TO_AWAY = 2,
+ FPCONV_TOWARD_ZERO = 3,
+ FPCONV_TOWARD_POSITIVE = 4,
+ FPCONV_TOWARD_NEGATIVE = 5
+} CGEN_FPCONV_KIND;
+
/* forward decl */
typedef struct cgen_fp_ops CGEN_FP_OPS;
@@ -100,28 +113,28 @@ struct cgen_fp_ops {
/* SF/DF conversion ops */
- DF (*fextsfdf) (CGEN_FPU*, SF);
- SF (*ftruncdfsf) (CGEN_FPU*, DF);
+ DF (*fextsfdf) (CGEN_FPU*, int, SF);
+ SF (*ftruncdfsf) (CGEN_FPU*, int, DF);
- SF (*floatsisf) (CGEN_FPU*, SI);
- SF (*floatdisf) (CGEN_FPU*, DI);
- SF (*ufloatsisf) (CGEN_FPU*, USI);
- SF (*ufloatdisf) (CGEN_FPU*, UDI);
+ SF (*floatsisf) (CGEN_FPU*, int, SI);
+ SF (*floatdisf) (CGEN_FPU*, int, DI);
+ SF (*ufloatsisf) (CGEN_FPU*, int, USI);
+ SF (*ufloatdisf) (CGEN_FPU*, int, UDI);
- SI (*fixsfsi) (CGEN_FPU*, SF);
- DI (*fixsfdi) (CGEN_FPU*, SF);
- USI (*ufixsfsi) (CGEN_FPU*, SF);
- UDI (*ufixsfdi) (CGEN_FPU*, SF);
+ SI (*fixsfsi) (CGEN_FPU*, int, SF);
+ DI (*fixsfdi) (CGEN_FPU*, int, SF);
+ USI (*ufixsfsi) (CGEN_FPU*, int, SF);
+ UDI (*ufixsfdi) (CGEN_FPU*, int, SF);
- DF (*floatsidf) (CGEN_FPU*, SI);
- DF (*floatdidf) (CGEN_FPU*, DI);
- DF (*ufloatsidf) (CGEN_FPU*, USI);
- DF (*ufloatdidf) (CGEN_FPU*, UDI);
+ DF (*floatsidf) (CGEN_FPU*, int, SI);
+ DF (*floatdidf) (CGEN_FPU*, int, DI);
+ DF (*ufloatsidf) (CGEN_FPU*, int, USI);
+ DF (*ufloatdidf) (CGEN_FPU*, int, UDI);
- SI (*fixdfsi) (CGEN_FPU*, DF);
- DI (*fixdfdi) (CGEN_FPU*, DF);
- USI (*ufixdfsi) (CGEN_FPU*, DF);
- UDI (*ufixdfdi) (CGEN_FPU*, DF);
+ SI (*fixdfsi) (CGEN_FPU*, int, DF);
+ DI (*fixdfdi) (CGEN_FPU*, int, DF);
+ USI (*ufixdfsi) (CGEN_FPU*, int, DF);
+ UDI (*ufixdfdi) (CGEN_FPU*, int, DF);
/* XF mode support (kept separate 'cus not always present) */
@@ -146,20 +159,20 @@ struct cgen_fp_ops {
int (*gtxf) (CGEN_FPU*, XF, XF);
int (*gexf) (CGEN_FPU*, XF, XF);
- XF (*extsfxf) (CGEN_FPU*, SF);
- XF (*extdfxf) (CGEN_FPU*, DF);
- SF (*truncxfsf) (CGEN_FPU*, XF);
- DF (*truncxfdf) (CGEN_FPU*, XF);
+ XF (*extsfxf) (CGEN_FPU*, int, SF);
+ XF (*extdfxf) (CGEN_FPU*, int, DF);
+ SF (*truncxfsf) (CGEN_FPU*, int, XF);
+ DF (*truncxfdf) (CGEN_FPU*, int, XF);
- XF (*floatsixf) (CGEN_FPU*, SI);
- XF (*floatdixf) (CGEN_FPU*, DI);
- XF (*ufloatsixf) (CGEN_FPU*, USI);
- XF (*ufloatdixf) (CGEN_FPU*, UDI);
+ XF (*floatsixf) (CGEN_FPU*, int, SI);
+ XF (*floatdixf) (CGEN_FPU*, int, DI);
+ XF (*ufloatsixf) (CGEN_FPU*, int, USI);
+ XF (*ufloatdixf) (CGEN_FPU*, int, UDI);
- SI (*fixxfsi) (CGEN_FPU*, XF);
- DI (*fixxfdi) (CGEN_FPU*, XF);
- USI (*ufixxfsi) (CGEN_FPU*, XF);
- UDI (*ufixxfdi) (CGEN_FPU*, XF);
+ SI (*fixxfsi) (CGEN_FPU*, int, XF);
+ DI (*fixxfdi) (CGEN_FPU*, int, XF);
+ USI (*ufixxfsi) (CGEN_FPU*, int, XF);
+ UDI (*ufixxfdi) (CGEN_FPU*, int, XF);
/* TF mode support (kept separate 'cus not always present) */
@@ -184,20 +197,20 @@ struct cgen_fp_ops {
int (*gttf) (CGEN_FPU*, TF, TF);
int (*getf) (CGEN_FPU*, TF, TF);
- TF (*extsftf) (CGEN_FPU*, SF);
- TF (*extdftf) (CGEN_FPU*, DF);
- SF (*trunctfsf) (CGEN_FPU*, TF);
- DF (*trunctfdf) (CGEN_FPU*, TF);
+ TF (*extsftf) (CGEN_FPU*, int, SF);
+ TF (*extdftf) (CGEN_FPU*, int, DF);
+ SF (*trunctfsf) (CGEN_FPU*, int, TF);
+ DF (*trunctfdf) (CGEN_FPU*, int, TF);
- TF (*floatsitf) (CGEN_FPU*, SI);
- TF (*floatditf) (CGEN_FPU*, DI);
- TF (*ufloatsitf) (CGEN_FPU*, USI);
- TF (*ufloatditf) (CGEN_FPU*, UDI);
+ TF (*floatsitf) (CGEN_FPU*, int, SI);
+ TF (*floatditf) (CGEN_FPU*, int, DI);
+ TF (*ufloatsitf) (CGEN_FPU*, int, USI);
+ TF (*ufloatditf) (CGEN_FPU*, int, UDI);
- SI (*fixtfsi) (CGEN_FPU*, TF);
- DI (*fixtfdi) (CGEN_FPU*, TF);
- USI (*ufixtfsi) (CGEN_FPU*, TF);
- UDI (*ufixtfdi) (CGEN_FPU*, TF);
+ SI (*fixtfsi) (CGEN_FPU*, int, TF);
+ DI (*fixtfdi) (CGEN_FPU*, int, TF);
+ USI (*ufixtfsi) (CGEN_FPU*, int, TF);
+ UDI (*ufixtfdi) (CGEN_FPU*, int, TF);
};
diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog
index 6b70963..5e8b848 100644
--- a/sim/frv/ChangeLog
+++ b/sim/frv/ChangeLog
@@ -1,3 +1,7 @@
+2010-01-24 Doug Evans <dje@sebabeach.org>
+
+ * sem.c: Regenerate.
+
2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* configure: Regenerate.
diff --git a/sim/frv/sem.c b/sim/frv/sem.c
index efb516a..7779551 100644
--- a/sim/frv/sem.c
+++ b/sim/frv/sem.c
@@ -16643,7 +16643,7 @@ SEM_FN_NAME (frvbf,fitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
@@ -16664,7 +16664,7 @@ SEM_FN_NAME (frvbf,fstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
@@ -16685,7 +16685,7 @@ SEM_FN_NAME (frvbf,fitod) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
- DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsidf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsidf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval);
}
@@ -16706,7 +16706,7 @@ SEM_FN_NAME (frvbf,fdtoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_DOUBLE (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
@@ -16728,12 +16728,12 @@ SEM_FN_NAME (frvbf,fditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
@@ -16756,12 +16756,12 @@ SEM_FN_NAME (frvbf,fdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
{
- USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)));
+ USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
@@ -16785,13 +16785,13 @@ SEM_FN_NAME (frvbf,nfditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1));
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
@@ -16815,13 +16815,13 @@ SEM_FN_NAME (frvbf,nfdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1));
{
- USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)));
+ USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
@@ -16844,7 +16844,7 @@ SEM_FN_NAME (frvbf,cfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
@@ -16869,7 +16869,7 @@ SEM_FN_NAME (frvbf,cfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
written |= (1 << 3);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
@@ -16895,7 +16895,7 @@ SEM_FN_NAME (frvbf,nfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
@@ -16919,7 +16919,7 @@ SEM_FN_NAME (frvbf,nfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
{
- SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
+ SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
}
@@ -18499,12 +18499,12 @@ SEM_FN_NAME (frvbf,fmad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)))));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)))));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
@@ -18527,12 +18527,12 @@ SEM_FN_NAME (frvbf,fmsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)))));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)))));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
{
- SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
+ SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
}
diff --git a/sim/sh64/ChangeLog b/sim/sh64/ChangeLog
index c7dd4a0..6019b58 100644
--- a/sim/sh64/ChangeLog
+++ b/sim/sh64/ChangeLog
@@ -1,3 +1,7 @@
+2010-01-24 Doug Evans <dje@sebabeach.org>
+
+ * cpu.h: Regenerate.
+
2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* configure: Regenerate.
diff --git a/sim/sh64/cpu.h b/sim/sh64/cpu.h
index f333c06..f30d551 100644
--- a/sim/sh64/cpu.h
+++ b/sim/sh64/cpu.h
@@ -88,22 +88,22 @@ CPU (h_cr[(index)]) = (x);\
#define SET_H_FR(a1, x) (CPU (h_fr)[a1] = (x))
/* Single/Double precision floating point registers */
DF h_fsd[16];
-#define GET_H_FSD(index) ((GET_H_PRBIT ()) ? (GET_H_DRC (index)) : (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), CPU (h_fr[index]))))
+#define GET_H_FSD(index) ((GET_H_PRBIT ()) ? (GET_H_DRC (index)) : (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CPU (h_fr[index]))))
#define SET_H_FSD(index, x) \
do { \
if (GET_H_PRBIT ()) {\
SET_H_DRC ((index), (x));\
} else {\
-SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
+SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, (x)));\
}\
;} while (0)
/* floating point registers for fmov */
DF h_fmov[16];
-#define GET_H_FMOV(index) ((NOTBI (GET_H_SZBIT ())) ? (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FRC (index))) : (((((((index) & (1))) == (1))) ? (GET_H_XD (((index) & ((~ (1)))))) : (GET_H_DR (index)))))
+#define GET_H_FMOV(index) ((NOTBI (GET_H_SZBIT ())) ? (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FRC (index))) : (((((((index) & (1))) == (1))) ? (GET_H_XD (((index) & ((~ (1)))))) : (GET_H_DR (index)))))
#define SET_H_FMOV(index, x) \
do { \
if (NOTBI (GET_H_SZBIT ())) {\
-SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
+SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, (x)));\
} else {\
if ((((((index)) & (1))) == (1))) {\
SET_H_XD ((((index)) & ((~ (1)))), (x));\
generated by cgit v1.1 at 2024-12-17 08:04:04 +0000