diff options
| -rw-r--r-- | sim/m68hc11/ChangeLog | 7 | ||||
| -rw-r--r-- | sim/m68hc11/interp.c | 50 | ||||
| -rw-r--r-- | sim/m68hc11/sim-main.h | 11 |
3 files changed, 8 insertions, 60 deletions
diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog index 89d6cfb..646818c 100644 --- a/sim/m68hc11/ChangeLog +++ b/sim/m68hc11/ChangeLog @@ -1,5 +1,12 @@ 2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * interp.c (sim_store_register): Remove soft register hack. + (sim_fetch_register): Likewise. + (sim_create_inferior): Likewise. + * sim-main.h: Likewise. + +2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> + * interrupts.c (interrupts_update_pending): Clear the mask of pending interrupts here. (interrupts_get_current): Don't clear the mask of pending interrupts. diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c index b004bc8..f9de865 100644 --- a/sim/m68hc11/interp.c +++ b/sim/m68hc11/interp.c @@ -325,32 +325,6 @@ sim_create_inferior (SIM_DESC sd, struct _bfd *abfd, /* reset all state information */ sim_board_reset (sd); - /* Get information about the number of pseudo registers. */ - for (i = FIRST_SOFT_REGNUM; i <= ZD32_REGNUM; i++) - { - switch (i) - { - case TMP_REGNUM: - cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 0; - break; - case Z_REGNUM: - case ZS_REGNUM: - cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 2; - break; - case XY_REGNUM: - cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 4; - break; - case FP_REGNUM: - cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] = 6; - break; - default: - cpu->cpu_page0_reg[i - FIRST_SOFT_REGNUM] - = ((i - FIRST_SOFT_REGNUM) * 2) - 2; - break; - } - } - cpu->cpu_nb_pseudo_regs = 8; - return SIM_RC_OK; } @@ -403,21 +377,8 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) val = cpu_get_ccr (cpu); break; - - /* Read a pseudo register. Pseudo registers are located at - beginning of page 0. Each of them is 2 bytes. */ default: - if (rn < FIRST_SOFT_REGNUM || rn >= ZD32_REGNUM) - { - val = 0; - } - else - { - uint16 addr; - - addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM]; - val = memory_read16 (cpu, addr); - } + val = 0; break; } memory[0] = val >> 8; @@ -471,16 +432,7 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) cpu_set_ccr (cpu, val); break; - /* Write a pseudo register. Pseudo registers are located at - beginning of page 0. Each of them is 2 bytes. */ default: - if (rn >= FIRST_SOFT_REGNUM && rn <= ZD32_REGNUM) - { - uint16 addr; - - addr = cpu->cpu_page0_reg[rn - FIRST_SOFT_REGNUM]; - memory_write16 (cpu, addr, val); - } break; } diff --git a/sim/m68hc11/sim-main.h b/sim/m68hc11/sim-main.h index 6ea3fab..6b2575c 100644 --- a/sim/m68hc11/sim-main.h +++ b/sim/m68hc11/sim-main.h @@ -75,15 +75,6 @@ enum m68hc11_map_level #define B_REGNUM 6 #define PSW_REGNUM 7 #define Z_REGNUM 8 -#define FP_REGNUM 9 -#define TMP_REGNUM 10 -#define ZS_REGNUM 11 -#define XY_REGNUM 12 -#define ZD1_REGNUM 13 -#define ZD32_REGNUM (ZD1_REGNUM+31) - -#define FIRST_SOFT_REGNUM (Z_REGNUM) -#define MAX_SOFT_REG (ZD32_REGNUM - Z_REGNUM + 1) typedef struct m6811_regs { unsigned short d; @@ -186,8 +177,6 @@ struct _sim_cpu { int cpu_elf_start; uint16 cpu_insn_pc; - unsigned short cpu_nb_pseudo_regs; - uint16 cpu_page0_reg[MAX_SOFT_REG]; /* CPU frequency. This is the quartz frequency. It is divided by 4 to get the cycle time. This is used for the timer rate and for the baud |