diff options
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 4 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/thumb2_it.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/thumb2_it_auto.d | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/thumb32.d | 4 |
6 files changed, 17 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index bce83da..f1600c1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + + * config/tc-arm.c (do_t_mov_cmp): In unified syntax encode movs as + lsls and not adds. + 2010-05-27 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (encode_thumb2_ldmstm): Make warning about diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 6675935..6cf37b1 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -10369,8 +10369,8 @@ do_t_mov_cmp (void) case T_MNEM_movs: /* We know we have low registers at this point. - Generate ADD Rd, Rs, #0. */ - inst.instruction = T_OPCODE_ADD_I3; + Generate LSLS Rd, Rs, #0. */ + inst.instruction = T_OPCODE_LSL_I; inst.instruction |= Rn; inst.instruction |= Rm << 3; break; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 26df217..b488019 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + + * gas/arm/thumb2_it_auto.d: Update for change in movs encoding. + gas/arm/thumb2_it.d: Likewise. + gas/arm/thumb32.d: Likewise. + 2010-05-27 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/thumb2_ldmstm.d: Add new testcases. diff --git a/gas/testsuite/gas/arm/thumb2_it.d b/gas/testsuite/gas/arm/thumb2_it.d index ab31cdb..b55bc67 100644 --- a/gas/testsuite/gas/arm/thumb2_it.d +++ b/gas/testsuite/gas/arm/thumb2_it.d @@ -45,7 +45,7 @@ Disassembly of section .text: 0+062 <[^>]+> bf08 it eq 0+064 <[^>]+> 4640 moveq r0, r8 0+066 <[^>]+> 4608 mov r0, r1 -0+068 <[^>]+> 1c08 adds r0, r1, #0 +0+068 <[^>]+> 0008 lsls r0, r1, #0 0+06a <[^>]+> ea5f 0008 movs.w r0, r8 0+06e <[^>]+> bf01 itttt eq 0+070 <[^>]+> 43c8 mvneq r0, r1 diff --git a/gas/testsuite/gas/arm/thumb2_it_auto.d b/gas/testsuite/gas/arm/thumb2_it_auto.d index 3cd465d..91d82ca 100644 --- a/gas/testsuite/gas/arm/thumb2_it_auto.d +++ b/gas/testsuite/gas/arm/thumb2_it_auto.d @@ -45,7 +45,7 @@ Disassembly of section .text: 0+062 <[^>]+> bf08 it eq 0+064 <[^>]+> 4640 moveq r0, r8 0+066 <[^>]+> 4608 mov r0, r1 -0+068 <[^>]+> 1c08 adds r0, r1, #0 +0+068 <[^>]+> 0008 lsls r0, r1, #0 0+06a <[^>]+> ea5f 0008 movs.w r0, r8 0+06e <[^>]+> bf01 itttt eq 0+070 <[^>]+> 43c8 mvneq r0, r1 diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d index 530b86b..31278d8 100644 --- a/gas/testsuite/gas/arm/thumb32.d +++ b/gas/testsuite/gas/arm/thumb32.d @@ -618,9 +618,9 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> eb10 0f09 cmn\.w r0, r9 0[0-9a-f]+ <[^>]+> f110 0f81 cmn\.w r0, #129 ; 0x81 0[0-9a-f]+ <[^>]+> f115 0f81 cmn\.w r5, #129 ; 0x81 -0[0-9a-f]+ <[^>]+> 1c00 adds r0, r0, #0 +0[0-9a-f]+ <[^>]+> 0000 lsls r0, r0, #0 0[0-9a-f]+ <[^>]+> 4600 mov r0, r0 -0[0-9a-f]+ <[^>]+> 1c05 adds r5, r0, #0 +0[0-9a-f]+ <[^>]+> 0005 lsls r5, r0, #0 0[0-9a-f]+ <[^>]+> 4628 mov r0, r5 0[0-9a-f]+ <[^>]+> ea4f 4065 mov\.w r0, r5, asr #17 0[0-9a-f]+ <[^>]+> ea4f 0000 mov\.w r0, r0 |