diff options
| -rw-r--r-- | opcodes/ChangeLog | 2 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index c69bd68..57f5d9e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,7 @@ Sun Dec 6 14:06:48 1998 Ian Lance Taylor <ian@cygnus.com> + * mips-opc.c (mips_builtin_opcodes): Add dmfc2 and dmtc2. + * ppc-opc.c (powerpc_opcodes): Add PowerPC403 GC[X] instructions. From Saitoh Masanobu <msaitoh@spa.is.uec.ac.jp>. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 20aa07a..8801a36 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -529,6 +529,8 @@ const struct mips_opcode mips_builtin_opcodes[] = { {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 }, {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 }, {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 }, +{"dmfc2", "t,S", 0x48200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 }, +{"dmtc2", "t,S", 0x48a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 }, {"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 }, {"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 }, {"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 }, @@ -1175,8 +1177,8 @@ const struct mips_opcode mips_builtin_opcodes[] = { {"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */ {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 }, {"sync", "", 0x0000000f, 0xffffffff, 0, I2|T3 }, -{"sync.p", "", 0x0000000f, 0xffffffff, 0, I2 }, -{"sync.l", "", 0x0000040f, 0xffffffff, 0, I2 }, +{"sync.p", "", 0x0000040f, 0xffffffff, 0, I2 }, +{"sync.l", "", 0x0000000f, 0xffffffff, 0, I2 }, {"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 }, {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 }, {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, |