diff options
-rw-r--r-- | bfd/ChangeLog | 6 | ||||
-rw-r--r-- | bfd/elf32-arm.c | 15 | ||||
-rw-r--r-- | ld/testsuite/ChangeLog | 19 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 6 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-alu-bad-2.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-alu-bad-2.s | 16 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s | 17 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s | 17 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldr-bad.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldr-bad.s | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s | 17 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldrs-bad.d | 2 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs-ldrs-bad.s | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs.d | 30 | ||||
-rw-r--r-- | ld/testsuite/ld-arm/group-relocs.s | 57 |
18 files changed, 178 insertions, 50 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 62cb270..3df9e8e 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,9 @@ +2013-07-31 John Tytgat <john@bass-software.com> + + PR ld/15787 + * elf32-arm.c (elf32_arm_final_link_relocate): Base SB on the + output section VMA. + 2013-07-28 Maciej W. Rozycki <macro@linux-mips.org> * elf64-hppa.c (elf64_hppa_finish_dynamic_sections) diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c index 8f88839..4616ae9 100644 --- a/bfd/elf32-arm.c +++ b/bfd/elf32-arm.c @@ -9852,10 +9852,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, bfd_vma insn = bfd_get_32 (input_bfd, hit_data); bfd_vma pc = input_section->output_section->vma + input_section->output_offset + rel->r_offset; - /* sb should be the origin of the *segment* containing the symbol. - It is not clear how to obtain this OS-dependent value, so we - make an arbitrary choice of zero. */ - bfd_vma sb = 0; + /* sb is the origin of the *segment* containing the symbol. */ + bfd_vma sb = sym_sec->output_section->vma; bfd_vma residual; bfd_vma g_n; bfd_signed_vma signed_value; @@ -9988,7 +9986,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, bfd_vma insn = bfd_get_32 (input_bfd, hit_data); bfd_vma pc = input_section->output_section->vma + input_section->output_offset + rel->r_offset; - bfd_vma sb = 0; /* See note above. */ + /* sb is the origin of the *segment* containing the symbol. */ + bfd_vma sb = sym_sec->output_section->vma; bfd_vma residual; bfd_signed_vma signed_value; int group = 0; @@ -10071,7 +10070,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, bfd_vma insn = bfd_get_32 (input_bfd, hit_data); bfd_vma pc = input_section->output_section->vma + input_section->output_offset + rel->r_offset; - bfd_vma sb = 0; /* See note above. */ + /* sb is the origin of the *segment* containing the symbol. */ + bfd_vma sb = sym_sec->output_section->vma; bfd_vma residual; bfd_signed_vma signed_value; int group = 0; @@ -10154,7 +10154,8 @@ elf32_arm_final_link_relocate (reloc_howto_type * howto, bfd_vma insn = bfd_get_32 (input_bfd, hit_data); bfd_vma pc = input_section->output_section->vma + input_section->output_offset + rel->r_offset; - bfd_vma sb = 0; /* See note above. */ + /* sb is the origin of the *segment* containing the symbol. */ + bfd_vma sb = sym_sec->output_section->vma; bfd_vma residual; bfd_signed_vma signed_value; int group = 0; diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index d58967e..d3ab790 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,22 @@ +2013-07-31 John Tytgat <john@bass-software.com> + + PR ld/15787 + * ld-arm/group-relocs-alu-bad-2.d; New. + * ld-arm/group-relocs-alu-bad-2.s: New. + * ld-arm/group-relocs-ldc-bad-2.d: New. + * ld-arm/group-relocs-ldc-bad-2.s: New. + * ld-arm/group-relocs-ldr-bad-2.d: New. + * ld-arm/group-relocs-ldr-bad-2.s: New. + * ld-arm/group-relocs-ldrs-bad-2.d: New. + * ld-arm/group-relocs-ldrs-bad-2: New. + * ld-arm/arm-elf.exp: Add the new tests. + * ld-arm/group-relocs-ldr-bad.d: Update expected output. + * ld-arm/group-relocs-ldr-bad.s: Likewise. + * ld-arm/group-relocs-ldrs-bad.d: Likewise. + * ld-arm/group-relocs-ldrs-bad.s: Likewise. + * ld-arm/group-relocs.d: Likewise. + * ld-arm/group-relocs.s: Likewise. + 2013-07-27 Maciej W. Rozycki <macro@linux-mips.org> * ld-vax-elf/export-class-call.dd: New test. diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index dda9251..3d7d761 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -67,7 +67,7 @@ if { ![is_elf_format] || ![istarget "arm*-*-*"] } { # readelf: Apply readelf options on result. Compare with regex (last arg). set armelftests_common { - {"Group relocations" "-Ttext 0x8000 --section-start zero=0x0 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" "" {group-relocs.s} + {"Group relocations" "-Ttext 0x8000 -Tdata 0x3000000 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" "" {group-relocs.s} {{objdump -dr group-relocs.d}} "group-relocs"} {"Indirect cross-library function reference (set-up)" @@ -464,9 +464,13 @@ if { ![istarget "arm*-*-nacl*"] } { } run_dump_test "group-relocs-alu-bad" +run_dump_test "group-relocs-alu-bad-2" run_dump_test "group-relocs-ldr-bad" +run_dump_test "group-relocs-ldr-bad-2" run_dump_test "group-relocs-ldrs-bad" +run_dump_test "group-relocs-ldrs-bad-2" run_dump_test "group-relocs-ldc-bad" +run_dump_test "group-relocs-ldc-bad-2" run_dump_test "thumb2-bl-undefweak" run_dump_test "thumb2-bl-undefweak1" run_dump_test "emit-relocs1" diff --git a/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d b/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d new file mode 100644 index 0000000..1f86ae4 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d @@ -0,0 +1,4 @@ +#name: ALU group relocations failure test +#source: group-relocs-alu-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x1208000 +#error: Overflow whilst splitting 0x1234 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s b/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s new file mode 100644 index 0000000..4d28689 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s @@ -0,0 +1,16 @@ +@ Test intended to fail for ALU group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0:(bar) + +@ We will place the section foo at 0x1208000 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x1234 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d b/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d new file mode 100644 index 0000000..e66b6d8 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d @@ -0,0 +1,4 @@ +#name: LDC group relocations failure test +#source: group-relocs-ldc-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x118400 +#error: Overflow whilst splitting 0x123456 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s b/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s new file mode 100644 index 0000000..4fa0f4d --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDC group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldc 0, c0, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x118400 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d b/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d new file mode 100644 index 0000000..ae48b32 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d @@ -0,0 +1,4 @@ +#name: LDR group relocations failure test +#source: group-relocs-ldr-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x8001000 +#error: .*Overflow whilst splitting 0x123456 for group relocation.* diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s b/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s new file mode 100644 index 0000000..02d01c2 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDR group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldr r1, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8001000 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad.d b/ld/testsuite/ld-arm/group-relocs-ldr-bad.d index 04586af..88e6ee9 100644 --- a/ld/testsuite/ld-arm/group-relocs-ldr-bad.d +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad.d @@ -1,4 +1,4 @@ #name: LDR group relocations failure test #source: group-relocs-ldr-bad.s #ld: -Ttext 0x8000 --section-start foo=0x8001000 -#error: .*Overflow whilst splitting 0x8001000 for group relocation.* +#error: .*Overflow whilst splitting 0x7ff9000 for group relocation.* diff --git a/ld/testsuite/ld-arm/group-relocs-ldr-bad.s b/ld/testsuite/ld-arm/group-relocs-ldr-bad.s index 6ab4f3c..3aec8ee 100644 --- a/ld/testsuite/ld-arm/group-relocs-ldr-bad.s +++ b/ld/testsuite/ld-arm/group-relocs-ldr-bad.s @@ -6,8 +6,8 @@ .globl _start _start: - add r0, r0, #:sb_g0_nc:(bar) - ldr r1, [r0, #:sb_g1:(bar)] + add r0, r0, #:pc_g0_nc:(bar) + ldr r1, [r0, #:pc_g1:(bar + 4)] @ We will place the section foo at 0x8001000. diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d b/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d new file mode 100644 index 0000000..0674a15 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d @@ -0,0 +1,4 @@ +#name: LDRS group relocations failure test +#source: group-relocs-ldrs-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x8000100 +#error: Overflow whilst splitting 0x123456 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s b/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s new file mode 100644 index 0000000..02cf560 --- /dev/null +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDRS group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldrd r2, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8000100 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d index 0520184..ac7815b 100644 --- a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d @@ -1,4 +1,4 @@ #name: LDRS group relocations failure test #source: group-relocs-ldrs-bad.s #ld: -Ttext 0x8000 --section-start foo=0x8000100 -#error: Overflow whilst splitting 0x8000100 for group relocation +#error: Overflow whilst splitting 0x7ff8100 for group relocation diff --git a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s index 4480d4a..3578060 100644 --- a/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s +++ b/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s @@ -6,8 +6,8 @@ .globl _start _start: - add r0, r0, #:sb_g0_nc:(bar) - ldrd r2, [r0, #:sb_g1:(bar)] + add r0, r0, #:pc_g0_nc:(bar) + ldrd r2, [r0, #:pc_g1:(bar + 4)] @ We will place the section foo at 0x8000100. diff --git a/ld/testsuite/ld-arm/group-relocs.d b/ld/testsuite/ld-arm/group-relocs.d index 7d6f102..d928261 100644 --- a/ld/testsuite/ld-arm/group-relocs.d +++ b/ld/testsuite/ld-arm/group-relocs.d @@ -10,42 +10,42 @@ Disassembly of section .text: 800c: e28f08ff add r0, pc, #16711680 ; 0xff0000 8010: e2800c6e add r0, r0, #28160 ; 0x6e00 8014: e28000e4 add r0, r0, #228 ; 0xe4 - 8018: e2800000 add r0, r0, #0 - 801c: e28f0cee add r0, pc, #60928 ; 0xee00 + 8018: e280000c add r0, r0, #12 + 801c: e2800cee add r0, r0, #60928 ; 0xee00 8020: e28000f0 add r0, r0, #240 ; 0xf0 8024: e28008ff add r0, r0, #16711680 ; 0xff0000 8028: e2800cee add r0, r0, #60928 ; 0xee00 802c: e28000f0 add r0, r0, #240 ; 0xf0 - 8030: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8030: e28f0c6e add r0, pc, #28160 ; 0x6e00 8034: e59010c0 ldr r1, \[r0, #192\].* - 8038: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8038: e28f08ff add r0, pc, #16711680 ; 0xff0000 803c: e2800c6e add r0, r0, #28160 ; 0x6e00 8040: e59010b8 ldr r1, \[r0, #184\].* - 8044: e5901000 ldr r1, \[r0\] + 8044: e590100c ldr r1, \[r0, #12\] 8048: e2800cee add r0, r0, #60928 ; 0xee00 804c: e59010f0 ldr r1, \[r0, #240\].* 8050: e28008ff add r0, r0, #16711680 ; 0xff0000 8054: e2800cee add r0, r0, #60928 ; 0xee00 8058: e59010f0 ldr r1, \[r0, #240\].* - 805c: e1c026d0 ldrd r2, \[r0, #96\].* - 8060: e2800c6e add r0, r0, #28160 ; 0x6e00 + 805c: e1cf26d0 ldrd r2, \[pc, #96\].* + 8060: e28f0c6e add r0, pc, #28160 ; 0x6e00 8064: e1c029d0 ldrd r2, \[r0, #144\].* - 8068: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8068: e28f08ff add r0, pc, #16711680 ; 0xff0000 806c: e2800c6e add r0, r0, #28160 ; 0x6e00 8070: e1c028d8 ldrd r2, \[r0, #136\].* - 8074: e1c020d0 ldrd r2, \[r0\] + 8074: e1c020dc ldrd r2, \[r0, #12\] 8078: e2800cee add r0, r0, #60928 ; 0xee00 807c: e1c02fd0 ldrd r2, \[r0, #240\].* 8080: e28008ff add r0, r0, #16711680 ; 0xff0000 8084: e2800cee add r0, r0, #60928 ; 0xee00 8088: e1c02fd0 ldrd r2, \[r0, #240\].* - 808c: ed90000c ldc 0, cr0, \[r0, #48\].* - 8090: e2800c6e add r0, r0, #28160 ; 0x6e00 + 808c: ed9f000c ldc 0, cr0, \[pc, #48\].* + 8090: e28f0c6e add r0, pc, #28160 ; 0x6e00 8094: ed900018 ldc 0, cr0, \[r0, #96\].* - 8098: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8098: e28f08ff add r0, pc, #16711680 ; 0xff0000 809c: e2800c6e add r0, r0, #28160 ; 0x6e00 80a0: ed900016 ldc 0, cr0, \[r0, #88\].* - 80a4: ed900000 ldc 0, cr0, \[r0\] + 80a4: ed900003 ldc 0, cr0, \[r0, #12\] 80a8: e2800cee add r0, r0, #60928 ; 0xee00 80ac: ed90003c ldc 0, cr0, \[r0, #240\].* 80b0: e28008ff add r0, r0, #16711680 ; 0xff0000 @@ -54,14 +54,12 @@ Disassembly of section .text: 000080bc <one_group_needed_alu_pc>: 80bc: e3a00000 mov r0, #0 -Disassembly of section zero: -00000000 <one_group_needed_alu_sb>: - 0: e3a00000 mov r0, #0 Disassembly of section alpha: 0000eef0 <two_groups_needed_alu_pc>: eef0: e3a00000 mov r0, #0 + Disassembly of section beta: 00ffeef0 <three_groups_needed_alu_pc>: diff --git a/ld/testsuite/ld-arm/group-relocs.s b/ld/testsuite/ld-arm/group-relocs.s index b6467f4..7b226c7 100644 --- a/ld/testsuite/ld-arm/group-relocs.s +++ b/ld/testsuite/ld-arm/group-relocs.s @@ -28,11 +28,14 @@ _start: @ ALU, SB-relative + @ Instructions start at .text + 0x18 add r0, r0, #:sb_g0:(one_group_needed_alu_sb) - add r0, r15, #:sb_g0_nc:(two_groups_needed_alu_sb) + @ Instructions start at .text + 0x1c + add r0, r0, #:sb_g0_nc:(two_groups_needed_alu_sb) add r0, r0, #:sb_g1:(two_groups_needed_alu_sb) + @ Instructions start at .text + 0x24 add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb) add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb) add r0, r0, #:sb_g2:(three_groups_needed_alu_sb) @@ -40,21 +43,24 @@ _start: @ LDR, PC-relative @ Instructions start at .text + 0x30 - add r0, r0, #:pc_g0_nc:(two_groups_needed_ldr_pc) + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldr_pc) ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)] @ Instructions start at .text + 0x38 - add r0, r0, #:pc_g0_nc:(three_groups_needed_ldr_pc) + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldr_pc) add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4) ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)] @ LDR, SB-relative + @ Instructions start at .text + 0x44 ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)] + @ Instructions start at .text + 0x48 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb) ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)] + @ Instructions start at .text + 0x50 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb) add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb) ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)] @@ -62,24 +68,27 @@ _start: @ LDRS, PC-relative @ Instructions start at .text + 0x5c - ldrd r2, [r0, #:pc_g0:(one_group_needed_ldrs_pc)] + ldrd r2, [pc, #:pc_g0:(one_group_needed_ldrs_pc)] @ Instructions start at .text + 0x60 - add r0, r0, #:pc_g0_nc:(two_groups_needed_ldrs_pc) + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldrs_pc) ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)] @ Instructions start at .text + 0x68 - add r0, r0, #:pc_g0_nc:(three_groups_needed_ldrs_pc) + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldrs_pc) add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4) ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)] @ LDRS, SB-relative + @ Instructions start at .text + 0x74 ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)] + @ Instructions start at .text + 0x78 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb) ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)] + @ Instructions start at .text + 0x80 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb) add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb) ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)] @@ -87,24 +96,27 @@ _start: @ LDC, PC-relative @ Instructions start at .text + 0x8c - ldc 0, c0, [r0, #:pc_g0:(one_group_needed_ldc_pc)] + ldc 0, c0, [pc, #:pc_g0:(one_group_needed_ldc_pc)] @ Instructions start at .text + 0x90 - add r0, r0, #:pc_g0_nc:(two_groups_needed_ldc_pc) + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldc_pc) ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)] @ Instructions start at .text + 0x98 - add r0, r0, #:pc_g0_nc:(three_groups_needed_ldc_pc) + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldc_pc) add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4) ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)] @ LDC, SB-relative + @ Instructions start at .text + 0xa4 ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)] + @ Instructions start at .text + 0xa8 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb) ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)] + @ Instructions start at .text + 0xb0 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb) add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb) ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)] @@ -116,24 +128,33 @@ one_group_needed_ldrs_pc: one_group_needed_ldc_pc: mov r0, #0 -@ We will place the section zero at 0x0. +@ We will place the section .data at 0x03000000 - .section zero, "x" + .data + .word 0, 0, 0 one_group_needed_alu_sb: one_group_needed_ldr_sb: one_group_needed_ldrs_sb: one_group_needed_ldc_sb: - mov r0, #0 + .word 1 @ Offset 0xc + .fill 0xeef0 - 16, 1, 0 +two_groups_needed_alu_sb: +two_groups_needed_ldr_sb: +two_groups_needed_ldrs_sb: +two_groups_needed_ldc_sb: + .word 2 @ Offset 0xeef0 + .fill 0xffeef0 - 0xeef0 - 4, 1, 0 +three_groups_needed_alu_sb: +three_groups_needed_ldr_sb: +three_groups_needed_ldrs_sb: +three_groups_needed_ldc_sb: + .word 3 @ Offset 0xffeef0 @ We will place the section alpha at 0xeef0. .section alpha, "x" -two_groups_needed_alu_sb: -two_groups_needed_ldr_sb: -two_groups_needed_ldrs_sb: -two_groups_needed_ldc_sb: two_groups_needed_alu_pc: two_groups_needed_ldr_pc: two_groups_needed_ldrs_pc: @@ -144,10 +165,6 @@ two_groups_needed_ldc_pc: .section beta, "x" -three_groups_needed_alu_sb: -three_groups_needed_ldr_sb: -three_groups_needed_ldrs_sb: -three_groups_needed_ldc_sb: three_groups_needed_alu_pc: three_groups_needed_ldr_pc: three_groups_needed_ldrs_pc: |