diff options
-rw-r--r-- | gas/config/tc-aarch64.c | 58 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/alias.d | 26 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/b_c_1.d | 58 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/b_c_1.s | 76 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/beq_1.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/float-fp16.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/int-insns.d | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/no-aliases.d | 26 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/programmer-friendly.d | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/reloc-insn.d | 4 | ||||
-rw-r--r-- | include/opcode/aarch64.h | 2 | ||||
-rw-r--r-- | opcodes/aarch64-dis.c | 49 | ||||
-rw-r--r-- | opcodes/aarch64-opc.c | 33 |
13 files changed, 274 insertions, 90 deletions
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 627bde5..d2fdfd2 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -4889,41 +4889,44 @@ lookup_mnemonic (const char *start, int len) static templates * opcode_lookup (char **str) { - char *end, *base; + char *end, *base, *dot; const aarch64_cond *cond; char condname[16]; int len; /* Scan up to the end of the mnemonic, which must end in white space, '.', or end of string. */ + dot = 0; for (base = end = *str; is_part_of_name(*end); end++) - if (*end == '.') - break; + if (*end == '.' && !dot) + dot = end; - if (end == base) + if (end == base || dot == base) return 0; inst.cond = COND_ALWAYS; /* Handle a possible condition. */ - if (end[0] == '.') + if (dot) { - cond = hash_find_n (aarch64_cond_hsh, end + 1, 2); + cond = hash_find_n (aarch64_cond_hsh, dot + 1, end - dot - 1); if (cond) { inst.cond = cond->value; - *str = end + 3; + *str = end; } else { - *str = end; + *str = dot; return 0; } + len = dot - base; } else - *str = end; - - len = end - base; + { + *str = end; + len = end - base; + } if (inst.cond == COND_ALWAYS) { @@ -5879,20 +5882,25 @@ parse_operands (char *str, const aarch64_opcode *opcode) case AARCH64_OPND_COND: case AARCH64_OPND_COND1: - info->cond = hash_find_n (aarch64_cond_hsh, str, 2); - str += 2; - if (info->cond == NULL) - { - set_syntax_error (_("invalid condition")); - goto failure; - } - else if (operands[i] == AARCH64_OPND_COND1 - && (info->cond->value & 0xe) == 0xe) - { - /* Not allow AL or NV. */ - set_default_error (); - goto failure; - } + { + char *start = str; + do + str++; + while (ISALPHA (*str)); + info->cond = hash_find_n (aarch64_cond_hsh, start, str - start); + if (info->cond == NULL) + { + set_syntax_error (_("invalid condition")); + goto failure; + } + else if (operands[i] == AARCH64_OPND_COND1 + && (info->cond->value & 0xe) == 0xe) + { + /* Do not allow AL or NV. */ + set_default_error (); + goto failure; + } + } break; case AARCH64_OPND_ADDR_ADRP: diff --git a/gas/testsuite/gas/aarch64/alias.d b/gas/testsuite/gas/aarch64/alias.d index 5911b21..ab518dc 100644 --- a/gas/testsuite/gas/aarch64/alias.d +++ b/gas/testsuite/gas/aarch64/alias.d @@ -29,19 +29,19 @@ Disassembly of section \.text: 54: 9ba28c20 umsubl x0, w1, w2, x3 58: 9ba2fc20 umnegl x0, w1, w2 5c: 9ba2fc20 umnegl x0, w1, w2 - 60: 1a9f0420 csinc w0, w1, wzr, eq - 64: 1a810420 cinc w0, w1, ne - 68: 1a810420 cinc w0, w1, ne - 6c: 1a9f37e0 cset w0, cs - 70: 1a9f37e0 cset w0, cs - 74: da9f2020 csinv x0, x1, xzr, cs - 78: da812020 cinv x0, x1, cc - 7c: da812020 cinv x0, x1, cc - 80: da9f43e0 csetm x0, pl - 84: da9f43e0 csetm x0, pl - 88: da9eb7e0 csneg x0, xzr, x30, lt - 8c: da9eb7c0 cneg x0, x30, ge - 90: da9eb7c0 cneg x0, x30, ge + 60: 1a9f0420 csinc w0, w1, wzr, eq // eq = none + 64: 1a810420 cinc w0, w1, ne // ne = any + 68: 1a810420 cinc w0, w1, ne // ne = any + 6c: 1a9f37e0 cset w0, cs // cs = hs, nlast + 70: 1a9f37e0 cset w0, cs // cs = hs, nlast + 74: da9f2020 csinv x0, x1, xzr, cs // cs = hs, nlast + 78: da812020 cinv x0, x1, cc // cc = lo, ul, last + 7c: da812020 cinv x0, x1, cc // cc = lo, ul, last + 80: da9f43e0 csetm x0, pl // pl = nfrst + 84: da9f43e0 csetm x0, pl // pl = nfrst + 88: da9eb7e0 csneg x0, xzr, x30, lt // lt = tstop + 8c: da9eb7c0 cneg x0, x30, ge // ge = tcont + 90: da9eb7c0 cneg x0, x30, ge // ge = tcont 94: ea020020 ands x0, x1, x2 98: ea02003f tst x1, x2 9c: ea02003f tst x1, x2 diff --git a/gas/testsuite/gas/aarch64/b_c_1.d b/gas/testsuite/gas/aarch64/b_c_1.d new file mode 100644 index 0000000..6427a3a --- /dev/null +++ b/gas/testsuite/gas/aarch64/b_c_1.d @@ -0,0 +1,58 @@ +# objdump: -d + +.*: .* + + +Disassembly of section \.text: + +0+0 <\.text>: +.*: 54.....0 b\.eq 0 <\.text> // b\.none +.*: 54.....0 b\.eq 0 <\.text> // b\.none +.*: 54.....2 b\.cs 0 <\.text> // b\.hs, b\.nlast +.*: 54.....2 b\.cs 0 <\.text> // b\.hs, b\.nlast +.*: 54.....2 b\.cs 0 <\.text> // b\.hs, b\.nlast +.*: 54.....3 b\.cc 0 <\.text> // b\.lo, b\.ul, b\.last +.*: 54.....3 b\.cc 0 <\.text> // b\.lo, b\.ul, b\.last +.*: 54.....3 b\.cc 0 <\.text> // b\.lo, b\.ul, b\.last +.*: 54.....3 b\.cc 0 <\.text> // b\.lo, b\.ul, b\.last +.*: 54.....4 b\.mi 0 <\.text> // b\.first +.*: 54.....4 b\.mi 0 <\.text> // b\.first +.*: 54.....5 b\.pl 0 <\.text> // b\.nfrst +.*: 54.....5 b\.pl 0 <\.text> // b\.nfrst +.*: 54.....6 b\.vs 0 <\.text> +.*: 54.....7 b\.vc 0 <\.text> +.*: 54.....8 b\.hi 0 <\.text> // b\.pmore +.*: 54.....8 b\.hi 0 <\.text> // b\.pmore +.*: 54.....9 b\.ls 0 <\.text> // b\.plast +.*: 54.....9 b\.ls 0 <\.text> // b\.plast +.*: 54.....a b\.ge 0 <\.text> // b\.tcont +.*: 54.....a b\.ge 0 <\.text> // b\.tcont +.*: 54.....b b\.lt 0 <\.text> // b\.tstop +.*: 54.....b b\.lt 0 <\.text> // b\.tstop +.*: 54.....c b\.gt 0 <\.text> +.*: 54.....d b\.le 0 <\.text> +.*: 9a830041 csel x1, x2, x3, eq // eq = none +.*: 9a830041 csel x1, x2, x3, eq // eq = none +.*: 9a832041 csel x1, x2, x3, cs // cs = hs, nlast +.*: 9a832041 csel x1, x2, x3, cs // cs = hs, nlast +.*: 9a832041 csel x1, x2, x3, cs // cs = hs, nlast +.*: 9a833041 csel x1, x2, x3, cc // cc = lo, ul, last +.*: 9a833041 csel x1, x2, x3, cc // cc = lo, ul, last +.*: 9a833041 csel x1, x2, x3, cc // cc = lo, ul, last +.*: 9a833041 csel x1, x2, x3, cc // cc = lo, ul, last +.*: 9a834041 csel x1, x2, x3, mi // mi = first +.*: 9a834041 csel x1, x2, x3, mi // mi = first +.*: 9a835041 csel x1, x2, x3, pl // pl = nfrst +.*: 9a835041 csel x1, x2, x3, pl // pl = nfrst +.*: 9a836041 csel x1, x2, x3, vs +.*: 9a837041 csel x1, x2, x3, vc +.*: 9a838041 csel x1, x2, x3, hi // hi = pmore +.*: 9a838041 csel x1, x2, x3, hi // hi = pmore +.*: 9a839041 csel x1, x2, x3, ls // ls = plast +.*: 9a839041 csel x1, x2, x3, ls // ls = plast +.*: 9a83a041 csel x1, x2, x3, ge // ge = tcont +.*: 9a83a041 csel x1, x2, x3, ge // ge = tcont +.*: 9a83b041 csel x1, x2, x3, lt // lt = tstop +.*: 9a83b041 csel x1, x2, x3, lt // lt = tstop +.*: 9a83c041 csel x1, x2, x3, gt +.*: 9a83d041 csel x1, x2, x3, le diff --git a/gas/testsuite/gas/aarch64/b_c_1.s b/gas/testsuite/gas/aarch64/b_c_1.s new file mode 100644 index 0000000..33af175 --- /dev/null +++ b/gas/testsuite/gas/aarch64/b_c_1.s @@ -0,0 +1,76 @@ +1: + b.eq 1b + b.none 1b + + b.cs 1b + b.hs 1b + b.nlast 1b + + b.cc 1b + b.lo 1b + b.ul 1b + b.last 1b + + b.mi 1b + b.first 1b + + b.pl 1b + b.nfrst 1b + + b.vs 1b + + b.vc 1b + + b.hi 1b + b.pmore 1b + + b.ls 1b + b.plast 1b + + b.ge 1b + b.tcont 1b + + b.lt 1b + b.tstop 1b + + b.gt 1b + + b.le 1b + + csel x1, x2, x3, eq + csel x1, x2, x3, none + + csel x1, x2, x3, cs + csel x1, x2, x3, hs + csel x1, x2, x3, nlast + + csel x1, x2, x3, cc + csel x1, x2, x3, lo + csel x1, x2, x3, ul + csel x1, x2, x3, last + + csel x1, x2, x3, mi + csel x1, x2, x3, first + + csel x1, x2, x3, pl + csel x1, x2, x3, nfrst + + csel x1, x2, x3, vs + + csel x1, x2, x3, vc + + csel x1, x2, x3, hi + csel x1, x2, x3, pmore + + csel x1, x2, x3, ls + csel x1, x2, x3, plast + + csel x1, x2, x3, ge + csel x1, x2, x3, tcont + + csel x1, x2, x3, lt + csel x1, x2, x3, tstop + + csel x1, x2, x3, gt + + csel x1, x2, x3, le diff --git a/gas/testsuite/gas/aarch64/beq_1.d b/gas/testsuite/gas/aarch64/beq_1.d index 4e3b0d1..47851d1 100644 --- a/gas/testsuite/gas/aarch64/beq_1.d +++ b/gas/testsuite/gas/aarch64/beq_1.d @@ -5,5 +5,5 @@ Disassembly of section \.text: 0000000000000000 <.*>: - 0: 54000000 b.eq 0 <bar> + 0: 54000000 b\.eq 0 <bar> // b\.none 0: R_AARCH64_CONDBR19 bar\+0x100000 diff --git a/gas/testsuite/gas/aarch64/float-fp16.d b/gas/testsuite/gas/aarch64/float-fp16.d index dc87981..6172dc3 100644 --- a/gas/testsuite/gas/aarch64/float-fp16.d +++ b/gas/testsuite/gas/aarch64/float-fp16.d @@ -6,12 +6,12 @@ Disassembly of section \.text: 0000000000000000 <.*>: - [0-9a-f]+: 1e200400 fccmp s0, s0, #0x0, eq - [0-9a-f]+: 1ee00400 fccmp h0, h0, #0x0, eq + [0-9a-f]+: 1e200400 fccmp s0, s0, #0x0, eq // eq = none + [0-9a-f]+: 1ee00400 fccmp h0, h0, #0x0, eq // eq = none [0-9a-f]+: 1e22d420 fccmp s1, s2, #0x0, le [0-9a-f]+: 1ee2d420 fccmp h1, h2, #0x0, le - [0-9a-f]+: 1e200410 fccmpe s0, s0, #0x0, eq - [0-9a-f]+: 1ee00410 fccmpe h0, h0, #0x0, eq + [0-9a-f]+: 1e200410 fccmpe s0, s0, #0x0, eq // eq = none + [0-9a-f]+: 1ee00410 fccmpe h0, h0, #0x0, eq // eq = none [0-9a-f]+: 1e22d430 fccmpe s1, s2, #0x0, le [0-9a-f]+: 1ee2d430 fccmpe h1, h2, #0x0, le [0-9a-f]+: 1e202000 fcmp s0, s0 @@ -26,8 +26,8 @@ Disassembly of section \.text: [0-9a-f]+: 1ee02008 fcmp h0, #0\.0 [0-9a-f]+: 1e202018 fcmpe s0, #0\.0 [0-9a-f]+: 1ee02018 fcmpe h0, #0\.0 - [0-9a-f]+: 1e210c00 fcsel s0, s0, s1, eq - [0-9a-f]+: 1ee10c00 fcsel h0, h0, h1, eq + [0-9a-f]+: 1e210c00 fcsel s0, s0, s1, eq // eq = none + [0-9a-f]+: 1ee10c00 fcsel h0, h0, h1, eq // eq = none [0-9a-f]+: 9ee60000 fmov x0, h0 [0-9a-f]+: 1ee60000 fmov w0, h0 [0-9a-f]+: 9ee70001 fmov h1, x0 diff --git a/gas/testsuite/gas/aarch64/int-insns.d b/gas/testsuite/gas/aarch64/int-insns.d index 8896c40..023ec54 100644 --- a/gas/testsuite/gas/aarch64/int-insns.d +++ b/gas/testsuite/gas/aarch64/int-insns.d @@ -13,8 +13,8 @@ Disassembly of section .text: 10: 93c3fc41 extr x1, x2, x3, #63 14: 93c30041 extr x1, x2, x3, #0 18: 13837c41 extr w1, w2, w3, #31 - 1c: 9a9f17e1 cset x1, eq - 20: da9f13e1 csetm x1, eq + 1c: 9a9f17e1 cset x1, eq // eq = none + 20: da9f13e1 csetm x1, eq // eq = none 24: 71000021 subs w1, w1, #0x0 28: 7100003f cmp w1, #0x0 2c: 4b0203e1 neg w1, w2 @@ -64,17 +64,17 @@ Disassembly of section .text: d4: 92400c85 and x5, x4, #0xf d8: 0a230041 bic w1, w2, w3 dc: 8a230041 bic x1, x2, x3 - e0: 54000001 b.ne e0 <sp\+0x90> + e0: 54000001 b\.ne e0 <sp\+0x90> // b\.any e4: 17ffffff b e0 <sp\+0x90> e8: 14000001 b ec <sp\+0x9c> - ec: 54ffffa0 b.eq e0 <sp\+0x90> - f0: 54000001 b.ne f0 <sp\+0xa0> + ec: 54ffffa0 b\.eq e0 <sp\+0x90> // b\.none + f0: 54000001 b\.ne f0 <sp\+0xa0> // b\.any f4: 17ffffff b f0 <sp\+0xa0> f8: 14000001 b fc <sp\+0xac> - fc: 54ffffa0 b.eq f0 <sp\+0xa0> + fc: 54ffffa0 b\.eq f0 <sp\+0xa0> // b\.none 100: d61f0040 br x2 - 104: 54ffffc2 b.cs fc <sp\+0xac> - 108: 54ffffa3 b.cc fc <sp\+0xac> + 104: 54ffffc2 b\.cs fc <sp\+0xac> // b\.hs, b\.nlast + 108: 54ffffa3 b\.cc fc <sp\+0xac> // b\.lo, b\.ul, b\.last ... 10c: R_AARCH64_ABS32 .text\+0x50 110: R_AARCH64_ABS64 .text\+0x50 diff --git a/gas/testsuite/gas/aarch64/no-aliases.d b/gas/testsuite/gas/aarch64/no-aliases.d index fd94064..e7bf7f5 100644 --- a/gas/testsuite/gas/aarch64/no-aliases.d +++ b/gas/testsuite/gas/aarch64/no-aliases.d @@ -30,19 +30,19 @@ Disassembly of section \.text: 54: 9ba28c20 umsubl x0, w1, w2, x3 58: 9ba2fc20 umsubl x0, w1, w2, xzr 5c: 9ba2fc20 umsubl x0, w1, w2, xzr - 60: 1a9f0420 csinc w0, w1, wzr, eq - 64: 1a810420 csinc w0, w1, w1, eq - 68: 1a810420 csinc w0, w1, w1, eq - 6c: 1a9f37e0 csinc w0, wzr, wzr, cc - 70: 1a9f37e0 csinc w0, wzr, wzr, cc - 74: da9f2020 csinv x0, x1, xzr, cs - 78: da812020 csinv x0, x1, x1, cs - 7c: da812020 csinv x0, x1, x1, cs - 80: da9f43e0 csinv x0, xzr, xzr, mi - 84: da9f43e0 csinv x0, xzr, xzr, mi - 88: da9eb7e0 csneg x0, xzr, x30, lt - 8c: da9eb7c0 csneg x0, x30, x30, lt - 90: da9eb7c0 csneg x0, x30, x30, lt + 60: 1a9f0420 csinc w0, w1, wzr, eq // eq = none + 64: 1a810420 csinc w0, w1, w1, eq // eq = none + 68: 1a810420 csinc w0, w1, w1, eq // eq = none + 6c: 1a9f37e0 csinc w0, wzr, wzr, cc // cc = lo, ul, last + 70: 1a9f37e0 csinc w0, wzr, wzr, cc // cc = lo, ul, last + 74: da9f2020 csinv x0, x1, xzr, cs // cs = hs, nlast + 78: da812020 csinv x0, x1, x1, cs // cs = hs, nlast + 7c: da812020 csinv x0, x1, x1, cs // cs = hs, nlast + 80: da9f43e0 csinv x0, xzr, xzr, mi // mi = first + 84: da9f43e0 csinv x0, xzr, xzr, mi // mi = first + 88: da9eb7e0 csneg x0, xzr, x30, lt // lt = tstop + 8c: da9eb7c0 csneg x0, x30, x30, lt // lt = tstop + 90: da9eb7c0 csneg x0, x30, x30, lt // lt = tstop 94: ea020020 ands x0, x1, x2 98: ea02003f ands xzr, x1, x2 9c: ea02003f ands xzr, x1, x2 diff --git a/gas/testsuite/gas/aarch64/programmer-friendly.d b/gas/testsuite/gas/aarch64/programmer-friendly.d index 9e9f2d5..248b299 100644 --- a/gas/testsuite/gas/aarch64/programmer-friendly.d +++ b/gas/testsuite/gas/aarch64/programmer-friendly.d @@ -9,7 +9,7 @@ Disassembly of section \.text: 4: 98000241 ldrsw x1, 4c <\.text\+0x4c> 8: 98000007 ldrsw x7, 0 <\.text> 8: R_AARCH64_LD_PREL_LO19 \.data\+0x4 - c: fa42a02a ccmp x1, x2, #0xa, ge + c: fa42a02a ccmp x1, x2, #0xa, ge // ge = tcont 10: 53001eaf uxtb w15, w21 14: 53003f67 uxth w7, w27 18: 2a1f03e8 mov w8, wzr diff --git a/gas/testsuite/gas/aarch64/reloc-insn.d b/gas/testsuite/gas/aarch64/reloc-insn.d index cee9ea5..f3382fb 100644 --- a/gas/testsuite/gas/aarch64/reloc-insn.d +++ b/gas/testsuite/gas/aarch64/reloc-insn.d @@ -109,8 +109,8 @@ Disassembly of section \.text: fc: 37400522 tbnz w2, #8, 1a0 <lab> 100: b7780002 tbnz x2, #47, 0 <xlab> 100: R_AARCH64_TSTBR14 xlab - 104: 540004e0 b\.eq 1a0 <lab> - 108: 54000000 b\.eq 0 <xlab> + 104: 540004e0 b\.eq 1a0 <lab> // b\.none + 108: 54000000 b\.eq 0 <xlab> // b\.none 108: R_AARCH64_CONDBR19 xlab 10c: b40004a0 cbz x0, 1a0 <lab> 110: b500001e cbnz x30, 0 <xlab> diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 5913860..defda78 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -859,7 +859,7 @@ typedef struct { /* A list of names with the first one as the disassembly preference; terminated by NULL if fewer than 3. */ - const char *names[3]; + const char *names[4]; aarch64_insn value; } aarch64_cond; diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 673d6e5..82afe8b 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2787,6 +2787,22 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode, } } +/* Set NAME to a copy of INST's mnemonic with the "." suffix removed. */ + +static void +remove_dot_suffix (char *name, const aarch64_inst *inst) +{ + char *ptr; + size_t len; + + ptr = strchr (inst->opcode->name, '.'); + assert (ptr && inst->cond); + len = ptr - inst->opcode->name; + assert (len < 8); + strncpy (name, inst->opcode->name, len); + name[len] = '\0'; +} + /* Print the instruction mnemonic name. */ static void @@ -2797,21 +2813,35 @@ print_mnemonic_name (const aarch64_inst *inst, struct disassemble_info *info) /* For instructions that are truly conditionally executed, e.g. b.cond, prepare the full mnemonic name with the corresponding condition suffix. */ - char name[8], *ptr; - size_t len; - - ptr = strchr (inst->opcode->name, '.'); - assert (ptr && inst->cond); - len = ptr - inst->opcode->name; - assert (len < 8); - strncpy (name, inst->opcode->name, len); - name [len] = '\0'; + char name[8]; + + remove_dot_suffix (name, inst); (*info->fprintf_func) (info->stream, "%s.%s", name, inst->cond->names[0]); } else (*info->fprintf_func) (info->stream, "%s", inst->opcode->name); } +/* Decide whether we need to print a comment after the operands of + instruction INST. */ + +static void +print_comment (const aarch64_inst *inst, struct disassemble_info *info) +{ + if (inst->opcode->flags & F_COND) + { + char name[8]; + unsigned int i, num_conds; + + remove_dot_suffix (name, inst); + num_conds = ARRAY_SIZE (inst->cond->names); + for (i = 1; i < num_conds && inst->cond->names[i]; ++i) + (*info->fprintf_func) (info->stream, "%s %s.%s", + i == 1 ? " //" : ",", + name, inst->cond->names[i]); + } +} + /* Print the instruction according to *INST. */ static void @@ -2820,6 +2850,7 @@ print_aarch64_insn (bfd_vma pc, const aarch64_inst *inst, { print_mnemonic_name (inst, info); print_operands (pc, inst->opcode, inst->operands, info); + print_comment (inst, info); } /* Entry-point of the instruction disassembler and printer. */ diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 2eb2a81..cd9be67 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -334,18 +334,18 @@ aarch64_get_operand_desc (enum aarch64_opnd type) /* Table of all conditional affixes. */ const aarch64_cond aarch64_conds[16] = { - {{"eq"}, 0x0}, - {{"ne"}, 0x1}, - {{"cs", "hs"}, 0x2}, - {{"cc", "lo", "ul"}, 0x3}, - {{"mi"}, 0x4}, - {{"pl"}, 0x5}, + {{"eq", "none"}, 0x0}, + {{"ne", "any"}, 0x1}, + {{"cs", "hs", "nlast"}, 0x2}, + {{"cc", "lo", "ul", "last"}, 0x3}, + {{"mi", "first"}, 0x4}, + {{"pl", "nfrst"}, 0x5}, {{"vs"}, 0x6}, {{"vc"}, 0x7}, - {{"hi"}, 0x8}, - {{"ls"}, 0x9}, - {{"ge"}, 0xa}, - {{"lt"}, 0xb}, + {{"hi", "pmore"}, 0x8}, + {{"ls", "plast"}, 0x9}, + {{"ge", "tcont"}, 0xa}, + {{"lt", "tstop"}, 0xb}, {{"gt"}, 0xc}, {{"le"}, 0xd}, {{"al"}, 0xe}, @@ -2940,7 +2940,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, const aarch64_opnd_info *opnds, int idx, int *pcrel_p, bfd_vma *address) { - int i; + unsigned int i, num_conds; const char *name = NULL; const aarch64_opnd_info *opnd = opnds + idx; enum aarch64_modifier_kind kind; @@ -3306,6 +3306,17 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_COND: case AARCH64_OPND_COND1: snprintf (buf, size, "%s", opnd->cond->names[0]); + num_conds = ARRAY_SIZE (opnd->cond->names); + for (i = 1; i < num_conds && opnd->cond->names[i]; ++i) + { + size_t len = strlen (buf); + if (i == 1) + snprintf (buf + len, size - len, " // %s = %s", + opnd->cond->names[0], opnd->cond->names[i]); + else + snprintf (buf + len, size - len, ", %s", + opnd->cond->names[i]); + } break; case AARCH64_OPND_ADDR_ADRP: |