diff options
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-ppc.c | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/htm.d | 4 | ||||
-rw-r--r-- | include/ChangeLog | 1 | ||||
-rw-r--r-- | include/opcode/ppc.h | 5 | ||||
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/ppc-dis.c | 10 | ||||
-rw-r--r-- | opcodes/ppc-opc.c | 2 |
8 files changed, 16 insertions, 17 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index f7a8628..c37ae22 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2017-04-11 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_show_usage): Delete mention of -mhtm. + * testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8. + 2017-04-10 Max Filippov <jcmvbkbc@gmail.com> * config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag): diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 47cc875..e8dfbc4 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -1346,7 +1346,6 @@ PowerPC options:\n\ fprintf (stream, _("\ -maltivec generate code for AltiVec\n\ -mvsx generate code for Vector-Scalar (VSX) instructions\n\ --mhtm generate code for Hardware Transactional Memory\n\ -me300 generate code for PowerPC e300 family\n\ -me500, -me500x2 generate code for Motorola e500 core complex\n\ -me500mc, generate code for Freescale e500mc core complex\n\ diff --git a/gas/testsuite/gas/ppc/htm.d b/gas/testsuite/gas/ppc/htm.d index 72be11a..44a2288 100644 --- a/gas/testsuite/gas/ppc/htm.d +++ b/gas/testsuite/gas/ppc/htm.d @@ -1,5 +1,5 @@ -#as: -mhtm -#objdump: -dr -Mhtm +#as: -mpower8 +#objdump: -dr -Mpower8 #name: Hardware Transactional Memory (HTM) tests .* diff --git a/include/ChangeLog b/include/ChangeLog index e6a92a8..aa2d317 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -2,6 +2,7 @@ * opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete. (PPC_OPCODE_VSX3): Delete. + (PPC_OPCODE_HTM): Delete. 2017-04-06 Pip Cet <pipcet@gmail.com> diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 8c41cdc..83392e8 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -191,11 +191,6 @@ extern const int vle_num_opcodes; /* Opcode is only supported by Power8 architecture. */ #define PPC_OPCODE_POWER8 0x2000000000ull -/* Opcode which is supported by the Hardware Transactional Memory extension. */ -/* Currently, this is the same as the POWER8 mask. If another cpu comes out - that isn't a superset of POWER8, we can define this to its own mask. */ -#define PPC_OPCODE_HTM PPC_OPCODE_POWER8 - /* Opcode is supported by ppc750cl. */ #define PPC_OPCODE_750 0x4000000000ull diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index eb432a7..7d501be 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,11 +1,12 @@ 2017-04-11 Alan Modra <amodra@gmail.com> - * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2 and - PPC_OPCODE_VSX3. + * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2, + PPC_OPCODE_VSX3, PPC_OPCODE_HTM and "htm". * ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500. (PPCVEC3): Define as PPC_OPCODE_POWER9. (PPCVSX2): Define as PPC_OPCODE_POWER8. (PPCVSX3): Define as PPC_OPCODE_POWER9. + (PPCHTM): Define as PPC_OPCODE_POWER8. 2017-04-10 Alan Modra <amodra@gmail.com> diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index 64fadc2..bb0bc30 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -171,13 +171,13 @@ struct ppc_mopt ppc_opts[] = { 0 }, { "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 - | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM + | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, { "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 - | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), + | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, { "ppc", PPC_OPCODE_PPC, 0 }, @@ -214,13 +214,13 @@ struct ppc_mopt ppc_opts[] = { 0 }, { "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 - | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM + | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, { "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 - | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), + | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, { "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2, 0 }, @@ -238,8 +238,6 @@ struct ppc_mopt ppc_opts[] = { PPC_OPCODE_VLE }, { "vsx", PPC_OPCODE_PPC, PPC_OPCODE_VSX }, - { "htm", PPC_OPCODE_PPC, - PPC_OPCODE_HTM }, }; /* Switch between Booke and VLE dialects for interlinked dumps. */ diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 7294c6d..430104e 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -3121,7 +3121,7 @@ extract_vleil (unsigned long insn, #define E500 PPC_OPCODE_E500 #define E6500 PPC_OPCODE_E6500 #define PPCVLE PPC_OPCODE_VLE -#define PPCHTM PPC_OPCODE_HTM +#define PPCHTM PPC_OPCODE_POWER8 #define E200Z4 PPC_OPCODE_E200Z4 /* The list of embedded processors that use the embedded operand ordering for the 3 operand dcbt and dcbtst instructions. */ |