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-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-i386.c6
2 files changed, 10 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index a5ffe08..af34ad8 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
+ * config/tc-i386.c (md_assemble): Process ImmExt without
+ operands.
+
+2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
+
* config/tc-i386.c (check_VecOperands): Replace vecsib with sib.
Replace VecSIB128, VecSIB256 and VecSIB512 with VECSIB128,
VECSIB256 and VECSIB512, respectively.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index bae9680..ae2a2c1 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -4873,8 +4873,12 @@ md_assemble (char *line)
if (!process_operands ())
return;
}
- else if (!quiet_warnings && i.tm.opcode_modifier.ugh)
+ else
{
+ if (i.tm.opcode_modifier.immext)
+ process_immext ();
+
+ if (!quiet_warnings && i.tm.opcode_modifier.ugh)
/* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
as_warn (_("translating to `%sp'"), i.tm.name);
}