diff options
| -rw-r--r-- | opcodes/ChangeLog | 18 | ||||
| -rw-r--r-- | opcodes/m32r-dis.c | 68 |
2 files changed, 52 insertions, 34 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 23f0922..a2af556 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,7 +1,25 @@ 2000-12-09 Nick Clifton <nickc@redhat.com> + * m32r-dis.c (print_insn): Prevent re-read of instruction from + wrong address. + * fr30-dis.c: Regenerate. +2000-12-08 Peter Targett <peter.targett@arccores.com> + + * configure.in: Add arc-ext.lo for bfd_arc_arch selection. + * Makefile.am (C_FILES): Add arc-ext.c. + (ALL_MACHINES) Add arc-ext.lo. + (INCLUDES) Add opcode directory to list. + New dependency entry for arc-ext.lo. + * disassemble.c (disassembler): Correct call to + arc_get_disassembler. + * arc-opc.c: New update for ARC, including full base + instructions for ARC variants. + * arc-dis.h, arc-dis.c: New update for ARC, including + extensibility functionality. + * arc-ext.h, arc-ext.c: New files for handling extensibility. + 2000-12-03 Chris Demetriou cgd@sibyte.com * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO, diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 9b0397f..ed99320 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -68,12 +68,12 @@ do { \ static void print_hash (cd, dis_info, value, attrs, pc, length) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; PTR dis_info; - long value; - unsigned int attrs; - bfd_vma pc; - int length; + long value ATTRIBUTE_UNUSED; + unsigned int attrs ATTRIBUTE_UNUSED; + bfd_vma pc ATTRIBUTE_UNUSED; + int length ATTRIBUTE_UNUSED; { disassemble_info *info = (disassemble_info *) dis_info; (*info->fprintf_func) (info->stream, "#"); @@ -156,7 +156,7 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length) int opindex; PTR xinfo; CGEN_FIELDS *fields; - void const *attrs; + void const *attrs ATTRIBUTE_UNUSED; bfd_vma pc; int length; { @@ -263,21 +263,12 @@ m32r_cgen_init_dis (cd) static void print_normal (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif PTR dis_info; long value; unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else bfd_vma pc ATTRIBUTE_UNUSED; int length ATTRIBUTE_UNUSED; -#endif { disassemble_info *info = (disassemble_info *) dis_info; @@ -298,21 +289,12 @@ print_normal (cd, dis_info, value, attrs, pc, length) static void print_address (cd, dis_info, value, attrs, pc, length) -#ifdef CGEN_PRINT_NORMAL - CGEN_CPU_DESC cd; -#else CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; -#endif PTR dis_info; bfd_vma value; unsigned int attrs; -#ifdef CGEN_PRINT_NORMAL - bfd_vma pc; - int length; -#else bfd_vma pc ATTRIBUTE_UNUSED; int length ATTRIBUTE_UNUSED; -#endif { disassemble_info *info = (disassemble_info *) dis_info; @@ -397,7 +379,7 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length) Returns 0 if all is well, non-zero otherwise. */ static int read_insn (cd, pc, info, buf, buflen, ex_info, insn_value) - CGEN_CPU_DESC cd; + CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; bfd_vma pc; disassemble_info *info; char *buf; @@ -451,11 +433,30 @@ print_insn (cd, pc, info, buf, buflen) unsigned long insn_value; const CGEN_INSN_LIST *insn_list; CGEN_EXTRACT_INFO ex_info; - +#if 0 int rc = read_insn (cd, pc, info, buf, buflen, & ex_info, & insn_value); if (rc != 0) return rc; +#else + ex_info.dis_info = info; + ex_info.valid = (1 << buflen) - 1; + ex_info.insn_bytes = buf; + switch (buflen) + { + case 1: + insn_value = buf[0]; + break; + case 2: + insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf); + break; + case 4: + insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf); + break; + default: + abort (); + } +#endif /* The instructions are stored in hash lists. Pick the first one and keep trying until we find the right one. */ @@ -486,9 +487,10 @@ print_insn (cd, pc, info, buf, buflen) machine insn and extracts the fields. The second pass prints them. */ -#if CGEN_INT_INSN_P - /* Make sure the entire insn is loaded into insn_value. */ - if (CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) + /* Make sure the entire insn is loaded into insn_value, if it + can fit. */ + if ((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize && + (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) { unsigned long full_insn_value; int rc = read_insn (cd, pc, info, buf, @@ -500,10 +502,8 @@ print_insn (cd, pc, info, buf, buflen) (cd, insn, &ex_info, full_insn_value, &fields, pc); } else -#endif - - length = CGEN_EXTRACT_FN (cd, insn) - (cd, insn, &ex_info, insn_value, &fields, pc); + length = CGEN_EXTRACT_FN (cd, insn) + (cd, insn, &ex_info, insn_value, &fields, pc); /* length < 0 -> error */ if (length < 0) return length; @@ -527,7 +527,6 @@ print_insn (cd, pc, info, buf, buflen) #ifndef CGEN_PRINT_INSN #define CGEN_PRINT_INSN default_print_insn -#endif static int default_print_insn (cd, pc, info) @@ -549,6 +548,7 @@ default_print_insn (cd, pc, info) return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8); } +#endif /* Main entry point. Print one instruction from PC on INFO->STREAM. |