diff options
| -rw-r--r-- | gas/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 10 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 9 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/opcode.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/opcode.s | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode.d | 9 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86-64-opcode.s | 8 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/i386.h | 10 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 26 |
11 files changed, 74 insertions, 17 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a225bb0..7294272 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2006-06-12 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (process_suffix): Don't add rex64 for + "xchg %rax,%rax". + 2006-06-09 Thiemo Seufer <ths@mips.com> * config/tc-mips.c (mips_ip): Maintain argument count. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 694618f..4a46908 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2615,7 +2615,15 @@ process_suffix (void) if (i.suffix == QWORD_MNEM_SUFFIX && flag_code == CODE_64BIT && (i.tm.opcode_modifier & NoRex64) == 0) - i.rex |= REX_MODE64; + { + /* Special case for xchg %rax,%rax. It is NOP and doesn't + need rex64. */ + if (i.operands != 2 + || i.types [0] != (Acc | Reg64) + || i.types [1] != (Acc | Reg64) + || strcmp (i.tm.name, "xchg") != 0) + i.rex |= REX_MODE64; + } /* Size floating point instruction. */ if (i.suffix == LONG_MNEM_SUFFIX) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 1fd5057..2b16921 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2006-06-12 H.J. Lu <hongjiu.lu@intel.com> + + * gas/i386/opcode.s: Add "xchg %ax,%ax". + * gas/i386/opcode.d: Updated. + + * gas/i386/x86-64-opcode.s: Add xchg %ax,%ax, xchg %eax,%eax, + xchg %rax,%rax, rex64 xchg %rax,%rax and xchg %rax,%r8. + * gas/i386/x86-64-opcode.d: Updated. + 2006-06-09 Thiemo Seufer <ths@mips.com> Nigel Stephens <nigel@mips.com> diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d index 808ddc5..fa58807 100644 --- a/gas/testsuite/gas/i386/opcode.d +++ b/gas/testsuite/gas/i386/opcode.d @@ -572,4 +572,5 @@ Disassembly of section .text: 9b7: 66 0f bd 90 90 90 90 90 [ ]*bsr 0x90909090\(%eax\),%dx 9bf: 66 0f be 90 90 90 90 90 [ ]*movsbw 0x90909090\(%eax\),%dx 9c7: 66 0f c1 90 90 90 90 90 [ ]*xadd %dx,0x90909090\(%eax\) + 9cf: 66 90 [ ]*xchg %ax,%ax \.\.\. diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s index 8d7cd05..a03ce13 100644 --- a/gas/testsuite/gas/i386/opcode.s +++ b/gas/testsuite/gas/i386/opcode.s @@ -566,5 +566,7 @@ foo: movsbw 0x90909090(%eax),%dx xadd %dx,0x90909090(%eax) + xchg %ax,%ax + # Force a good alignment. .p2align 4,0 diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d index 13d58be..f6427d4 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.d +++ b/gas/testsuite/gas/i386/x86-64-opcode.d @@ -266,6 +266,9 @@ Disassembly of section .text: [ ]*[0-9a-f]+:[ ]+e6 00[ ]+out[ ]+%al,\$0[x0]*[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+66 e7 00[ ]+out[ ]+%ax,\$0[x0]*[ ]*(#.*)* [ ]*[0-9a-f]+:[ ]+e7 00[ ]+out[ ]+%eax,\$0[x0]*[ ]*(#.*)* -[ ]*[0-9a-f]+:[ ]+00 00[ ]+.* -[ ]*[0-9a-f]+:[ ]+00 00[ ]+.* -[ *]... +[ ]*[0-9a-f]+:[ ]+66 90[ ]+xchg[ ]+%ax,%ax[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+87 c0[ ]+xchg[ ]+%eax,%eax[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+90[ ]+nop[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+48 90[ ]+rex64 nop[ ]*(#.*)* +[ ]*[0-9a-f]+:[ ]+49 90[ ]+xchg[ ]+%rax,%r8[ ]*(#.*)* +#pass diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s index 8b132b3..8d3de00 100644 --- a/gas/testsuite/gas/i386/x86-64-opcode.s +++ b/gas/testsuite/gas/i386/x86-64-opcode.s @@ -387,4 +387,12 @@ # IN + + + xchg %ax,%ax # 66 -- -- -- 90 + xchg %eax,%eax # -- -- -- -- 87 C0 + xchg %rax,%rax # -- -- -- -- 90 + rex64 xchg %rax,%rax # 48 -- -- -- 90 + xchg %rax,%r8 # -- -- -- 49 90 + .p2align 4,0 diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index ab1793e..edc00fa 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2006-06-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386.h (i386_optab): Update comment for 64bit NOP. + 2006-06-06 Ben Elliston <bje@au.ibm.com> Anton Blanchard <anton@samba.org> diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 2b2c1e0..c46c86d 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -179,19 +179,11 @@ static const template i386_optab[] = /* Exchange instructions. xchg commutes: we allow both operand orders. - In the 64bit code, xchg eax, eax is reused for new nop instruction. */ -#if 0 /* While the two entries that are disabled generate shorter code - for xchg eax, reg (on x86_64), the special case xchg eax, eax - does not get handled correctly - it degenerates into nop, but - that way the side effect of zero-extending eax to rax is lost. */ -{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { WordReg, Acc, 0 } }, -{"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { Acc, WordReg, 0 } }, -#else + In the 64bit code, xchg rax, rax is reused for new nop instruction. */ {"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { WordReg, Acc, 0 } }, {"xchg", 2, 0x90, X, CpuNo64, wl_Suf|ShortForm, { Acc, WordReg, 0 } }, {"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Reg16|Reg64, Acc, 0 } }, {"xchg", 2, 0x90, X, Cpu64, wq_Suf|ShortForm, { Acc, Reg16|Reg64, 0 } }, -#endif {"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg, Reg|AnyMem, 0 } }, {"xchg", 2, 0x86, X, 0, bwlq_Suf|W|Modrm, { Reg|AnyMem, Reg, 0 } }, diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 0357828..826c54e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2006-06-12 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (NOP_Fixup): Removed. + (NOP_Fixup1): New. + (NOP_Fixup2): Likewise. + (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90. + 2006-06-12 Julian Brown <julian@codesourcery.com> * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 3901619..49a3e9f 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -91,7 +91,8 @@ static void OP_M (int, int); static void OP_VMX (int, int); static void OP_0fae (int, int); static void OP_0f07 (int, int); -static void NOP_Fixup (int, int); +static void NOP_Fixup1 (int, int); +static void NOP_Fixup2 (int, int); static void OP_3DNowSuffix (int, int); static void OP_SIMD_Suffix (int, int); static void SIMD_Fixup (int, int); @@ -679,7 +680,7 @@ static const struct dis386 dis386[] = { { "movQ", Sw, Sv, XX }, { "popU", stackEv, XX, XX }, /* 90 */ - { "nop", NOP_Fixup, 0, XX, XX }, + { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX }, { "xchgS", RMeCX, eAX, XX }, { "xchgS", RMeDX, eAX, XX }, { "xchgS", RMeBX, eAX, XX }, @@ -4360,12 +4361,29 @@ OP_0fae (int bytemode, int sizeflag) OP_E (bytemode, sizeflag); } +/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in + 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix + is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop". + */ + static void -NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) +NOP_Fixup1 (int bytemode, int sizeflag) { - /* NOP with REPZ prefix is called PAUSE. */ if (prefixes == PREFIX_REPZ) strcpy (obuf, "pause"); + else if (prefixes == PREFIX_DATA + || ((rex & REX_MODE64) && rex != 0x48)) + OP_REG (bytemode, sizeflag); + else + strcpy (obuf, "nop"); +} + +static void +NOP_Fixup2 (int bytemode, int sizeflag) +{ + if (prefixes == PREFIX_DATA + || ((rex & REX_MODE64) && rex != 0x48)) + OP_IMREG (bytemode, sizeflag); } static const char *const Suffix3DNow[] = { |