diff options
| -rw-r--r-- | sim/bfin/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/bfin/bfin-sim.c | 7 |
2 files changed, 11 insertions, 1 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index 008edf0..a28da1a 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,5 +1,10 @@ 2011-03-26 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_dsp32alu_0): Set result to 0x7FFFFFFF when + the result was 0x80000000 for RND12 subtraction. + +2011-03-26 Robin Getz <robin.getz@analog.com> + * bfin-sim.c (decode_dsp32alu_0): Set VS when V is set. 2011-03-24 Mike Frysinger <vapier@gentoo.org> diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index 7e747ff..1555dc2 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -4009,7 +4009,12 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1) /* If subtract, just invert and add one. */ if (aop & 0x1) - val1 = ~val1 + 1; + { + if (val1 == 0x80000000) + val1 = 0x7FFFFFFF; + else + val1 = ~val1 + 1; + } /* Get the sign bits, since we need them later. */ sBit1 = !!(val0 & 0x80000000); |