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-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/i386-opc.h12
2 files changed, 10 insertions, 6 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 8190fb7..406e806 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-08-06 Quentin Neill <quentin.neill@amd.com>
+
+ * i386-opc.h (enum): Fix typos in comments.
+
2010-08-06 Alan Modra <amodra@gmail.com>
* disassemble.c: Formatting.
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index 9442211..5477c38 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -44,9 +44,9 @@ enum
Cpu586,
/* i686 or better required */
Cpu686,
- /* CLFLUSH Instuction support required */
+ /* CLFLUSH Instruction support required */
CpuClflush,
- /* SYSCALL Instuctions support required */
+ /* SYSCALL Instructions support required */
CpuSYSCALL,
/* Floating point support required */
Cpu8087,
@@ -92,9 +92,9 @@ enum
CpuAVX,
/* Intel L1OM support required */
CpuL1OM,
- /* Xsave/xrstor New Instuctions support required */
+ /* Xsave/xrstor New Instructions support required */
CpuXsave,
- /* Xsaveopt New Instuctions support required */
+ /* Xsaveopt New Instructions support required */
CpuXsaveopt,
/* AES support required */
CpuAES,
@@ -108,11 +108,11 @@ enum
CpuXOP,
/* LWP support required */
CpuLWP,
- /* MOVBE Instuction support required */
+ /* MOVBE Instruction support required */
CpuMovbe,
/* EPT Instructions required */
CpuEPT,
- /* RDTSCP Instuction support required */
+ /* RDTSCP Instruction support required */
CpuRdtscp,
/* FSGSBASE Instructions required */
CpuFSGSBase,