diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/i386.d | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/i386.s | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86_64.d | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/i386/x86_64.s | 5 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/i386-opc.h | 16 |
7 files changed, 39 insertions, 9 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 03e19d0..5c6e1e2 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,13 @@ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> + * gas/i386/i386.s: Add tests for movq. + * gas/i386/x86_64.s: Likewise. + + * gas/i386/i386.d Updated. + * gas/i386/x86_64.d: Likewise. + +2008-01-02 H.J. Lu <hongjiu.lu@intel.com> + PR gas/5534 * gas/i386/intel.s: Use QWORD on movq instead of DWORD. diff --git a/gas/testsuite/gas/i386/i386.d b/gas/testsuite/gas/i386/i386.d index fbdcb21..ddfc522 100644 --- a/gas/testsuite/gas/i386/i386.d +++ b/gas/testsuite/gas/i386/i386.d @@ -25,3 +25,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f b6 10 movzbl \(%eax\),%edx [ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%eax\),%dx [ ]*[a-f0-9]+: 0f b7 10 movzwl \(%eax\),%edx +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%esp\),%xmm1 +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%esp\),%xmm1 +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%esp\) +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%esp\) +#pass diff --git a/gas/testsuite/gas/i386/i386.s b/gas/testsuite/gas/i386/i386.s index 077664d..8eb5e53 100644 --- a/gas/testsuite/gas/i386/i386.s +++ b/gas/testsuite/gas/i386/i386.s @@ -24,3 +24,8 @@ movzx edx,BYTE PTR [eax] movzx dx,BYTE PTR [eax] movzx edx,WORD PTR [eax] + + movq xmm1,QWORD PTR [esp] + movq xmm1,[esp] + movq QWORD PTR [esp],xmm1 + movq [esp],xmm1 diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d index cdae47f..b21d0af 100644 --- a/gas/testsuite/gas/i386/x86_64.d +++ b/gas/testsuite/gas/i386/x86_64.d @@ -187,5 +187,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 0f b6 10 movzbw \(%rax\),%dx [ ]*[a-f0-9]+: 0f b7 10 movzwl \(%rax\),%edx [ ]*[a-f0-9]+: 48 0f b7 10 movzwq \(%rax\),%rdx - ... +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 +[ ]*[a-f0-9]+: f3 0f 7e 0c 24 movq \(%rsp\),%xmm1 +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) +[ ]*[a-f0-9]+: 66 0f d6 0c 24 movq %xmm1,\(%rsp\) #pass diff --git a/gas/testsuite/gas/i386/x86_64.s b/gas/testsuite/gas/i386/x86_64.s index d4e9d5d..fbf4b31 100644 --- a/gas/testsuite/gas/i386/x86_64.s +++ b/gas/testsuite/gas/i386/x86_64.s @@ -228,5 +228,10 @@ cmpxchg16b oword ptr [rax] movzx edx,WORD PTR [rax] movzx rdx,WORD PTR [rax] + movq xmm1,QWORD PTR [rsp] + movq xmm1,[rsp] + movq QWORD PTR [rsp],xmm1 + movq [rsp],xmm1 + # Get a good alignment. .p2align 4,0 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ba93eef..23ad98c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> + * i386-opc.h: Update comments. + +2008-01-02 H.J. Lu <hongjiu.lu@intel.com> + * i386-gen.c (opcode_modifiers): Use Qword instead of QWord. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise. diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 9038730..c77ae3c 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -175,7 +175,8 @@ typedef union i386_cpu_flags #define Size32 (Size16 + 1) /* needs size prefix if in 64-bit mode */ #define Size64 (Size32 + 1) -/* instruction ignores operand size prefix and mnemonic size suffix */ +/* instruction ignores operand size prefix and in Intel mode ignores + mnemonic size suffix check. */ #define IgnoreSize (Size64 + 1) /* default insn size depends on mode */ #define DefaultSize (IgnoreSize + 1) @@ -193,18 +194,17 @@ typedef union i386_cpu_flags #define No_ldSuf (No_qSuf + 1) /* x suffix on instruction illegal */ #define No_xSuf (No_ldSuf + 1) -/* check PTR size on instruction in Intel mode. - FIXME: Can it be merged with IgnoreSize? */ +/* check memory size on instruction in Intel mode if it is specified. */ #define CheckSize (No_xSuf + 1) -/* BYTE PTR on instruction */ +/* BYTE memory on instruction */ #define Byte (CheckSize + 1) -/* WORD PTR on instruction */ +/* WORD memory on instruction */ #define Word (Byte + 1) -/* DWORD PTR on instruction */ +/* DWORD memory on instruction */ #define Dword (Word + 1) -/* QWORD PTR on instruction */ +/* QWORD memory on instruction */ #define Qword (Dword + 1) -/* XMMWORD PTR on instruction */ +/* XMMWORD memory on instruction */ #define Xmmword (Qword + 1) /* instruction needs FWAIT */ #define FWait (Xmmword + 1) |