diff options
| -rw-r--r-- | sim/arm/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/arm/wrapper.c | 9 |
2 files changed, 15 insertions, 0 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 3b954d0..fbfc595 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,9 @@ +2002-02-04 Nick Clifton <nickc@cambridge.redhat.com> + + * wrapper.c: If a v5 architecture is detected, assume it might be + an XScale binary, since there is no way to distinguish between + the two in the COFF file format. + 2002-01-10 Nick Clifton <nickc@cambridge.redhat.com> * arminit.c (ARMul_Abort): Fix parameters passed to CPRead[13]. diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index 524377d..c2fd8be 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -234,6 +234,15 @@ sim_create_inferior (sd, abfd, argv, env) break; case bfd_mach_arm_5: + /* This is a special case in order to support COFF based ARM toolchains. + The COFF header does not have enough room to store all the different + kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default + to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5 + machine type here, we assume it could be any of the above architectures + and so select the most feature-full. */ + ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop); + break; + case bfd_mach_arm_5T: ARMul_SelectProcessor (state, ARM_v5_Prop); break; |