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-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/arm/armv1-bad.l4
-rw-r--r--gas/testsuite/gas/arm/armv1-bad.s5
3 files changed, 14 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 467605e..9523d48 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2002-09-23 Nick Clifton <nickc@redhat.com>
+
+ * gas/arm/armv1-bad.s: Add LDM and STM instructions which are
+ unpredictable because of their use of the writeback bit.
+
2002-09-21 Nick Clifton <nickc@redhat.com>
* gas/arm/inst.s: Fix UNPREDICATABLE use of writeback in LDM/STM
diff --git a/gas/testsuite/gas/arm/armv1-bad.l b/gas/testsuite/gas/arm/armv1-bad.l
index 96d9e73..19a7e9a 100644
--- a/gas/testsuite/gas/arm/armv1-bad.l
+++ b/gas/testsuite/gas/arm/armv1-bad.l
@@ -6,3 +6,7 @@
[^:]*:8: Error: invalid constant -- `mov r0,#0x1ff'
[^:]*:9: Error: bad instruction `cmpl r0,r0'
[^:]*:10: Error: selected processor does not support `strh r0,\[r1\]'
+[^:]*:11: Warning: writeback of base register is UNPREDICTABLE
+[^:]*:12: Warning: writeback of base register when in register list is UNPREDICTABLE
+[^:]*:13: Warning: writeback of base register is UNPREDICTABLE
+[^:]*:15: Warning: if writeback register is in list, it must be the lowest reg in the list
diff --git a/gas/testsuite/gas/arm/armv1-bad.s b/gas/testsuite/gas/arm/armv1-bad.s
index c879a73..751aefe 100644
--- a/gas/testsuite/gas/arm/armv1-bad.s
+++ b/gas/testsuite/gas/arm/armv1-bad.s
@@ -8,3 +8,8 @@ entry:
mov r0, #0x1ff
cmpl r0, r0
strh r0, [r1]
+ ldmfa r4!, {r8, r9}^
+ ldmfa r4!, {r4, r8, r9}
+ stmfa r4!, {r8, r9}^
+ stmdb r4!, {r4, r8, r9} @ This is OK.
+ stmdb r8!, {r4, r8, r9}