diff options
| -rw-r--r-- | sim/ChangeLog | 5 | ||||
| -rwxr-xr-x | sim/configure | 8 | ||||
| -rw-r--r-- | sim/configure.in | 2 | ||||
| -rw-r--r-- | sim/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/testsuite/sim/mips/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/testsuite/sim/mips/basic.exp | 26 | ||||
| -rw-r--r-- | sim/testsuite/sim/mips/sanity.s | 20 | ||||
| -rw-r--r-- | sim/testsuite/sim/mips/testutils.inc | 149 |
8 files changed, 214 insertions, 5 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index 97fecf2..dec01da 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,3 +1,8 @@ +2004-01-26 Chris Demetriou <cgd@broadcom.com> + + * configure.in (mips*-*-*): Configure in testsuite. + * configure: Regenerate. + 2003-10-08 Dave Brolley <brolley@redhat.com> * configure.in: Move frv handling to alphabetically correct placement. diff --git a/sim/configure b/sim/configure index b342d39..d09adab 100755 --- a/sim/configure +++ b/sim/configure @@ -1426,11 +1426,11 @@ case "${target}" in # OBSOLETE extra_subdirs="${extra_subdirs} igen" # OBSOLETE ;; # OBSOLETE fr30-*-*) sim_target=fr30 ;; - h8300*-*-*) - sim_target=h8300 + frv-*-*) sim_target=frv extra_subdirs="${extra_subdirs} testsuite" ;; - frv-*-*) sim_target=frv + h8300*-*-*) + sim_target=h8300 extra_subdirs="${extra_subdirs} testsuite" ;; h8500-*-*) sim_target=h8500 ;; @@ -1442,7 +1442,7 @@ case "${target}" in # The MIPS simulator can only be compiled by gcc. sim_target=mips only_if_gcc=yes - extra_subdirs="${extra_subdirs} igen" + extra_subdirs="${extra_subdirs} igen testsuite" ;; mn10300*-*-*) # The mn10300 simulator can only be compiled by gcc. diff --git a/sim/configure.in b/sim/configure.in index d992470..c66a413 100644 --- a/sim/configure.in +++ b/sim/configure.in @@ -81,7 +81,7 @@ case "${target}" in # The MIPS simulator can only be compiled by gcc. sim_target=mips only_if_gcc=yes - extra_subdirs="${extra_subdirs} igen" + extra_subdirs="${extra_subdirs} igen testsuite" ;; mn10300*-*-*) # The mn10300 simulator can only be compiled by gcc. diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index 22f2974..4e7b230 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2004-01-26 Chris Demetriou <cgd@broadcom.com> + + * sim/mips: New directory. Tests for the MIPS simulator. + 2004-01-23 Ben Elliston <bje@wasabisystems.com> * lib/sim-defs.exp (run_sim_test): Delete the .o and .x files if a diff --git a/sim/testsuite/sim/mips/ChangeLog b/sim/testsuite/sim/mips/ChangeLog new file mode 100644 index 0000000..67e7bfa --- /dev/null +++ b/sim/testsuite/sim/mips/ChangeLog @@ -0,0 +1,5 @@ +2004-01-26 Chris Demetriou <cgd@broadcom.com> + + * basic.exp: New file. + * testutils.inc: New file. + * sanity.s: New file. diff --git a/sim/testsuite/sim/mips/basic.exp b/sim/testsuite/sim/mips/basic.exp new file mode 100644 index 0000000..63dc086 --- /dev/null +++ b/sim/testsuite/sim/mips/basic.exp @@ -0,0 +1,26 @@ +# MIPS simulator instruction tests + +# As gross as it is, we unset the linker script specifid by the target +# board. The MIPS libgloss linker scripts include libgcc (and possibly +# other libraries), which the linker (used to link these tests rather +# than the compiler) can't necessarily find. +unset_currtarget_info ldscript + +# Only test mips*-elf (e.g., no mips-linux), and only test if the target +# board really is a simulator (sim tests don't work on real HW). +if {[istarget mips*-elf] && [board_info target exists is_simulator]} { + + if {[istarget mipsisa64*-elf]} { + set models "mips1 mips2 mips3 mips4 mips32 mips64" + } elseif {[istarget mipsisa32*-elf]} { + set models "mips1 mips2 mips32" + } elseif {[istarget mips64*-elf]} { + set models "mips1 mips2 mips3" + } else { + # fall back to just testing mips1 code. + set models "mips1" + } + set cpu_option -march + + run_sim_test sanity.s $models +} diff --git a/sim/testsuite/sim/mips/sanity.s b/sim/testsuite/sim/mips/sanity.s new file mode 100644 index 0000000..74551ed --- /dev/null +++ b/sim/testsuite/sim/mips/sanity.s @@ -0,0 +1,20 @@ +# mips test sanity, expected to pass. +# mach: all +# as: -mabi=eabi +# ld: -N -Ttext=0x80010000 +# output: *\\npass\\n + + .include "testutils.inc" + + setup + + .set noreorder + + .ent DIAG +DIAG: + + writemsg "Sanity is good!" + + pass + + .end DIAG diff --git a/sim/testsuite/sim/mips/testutils.inc b/sim/testsuite/sim/mips/testutils.inc new file mode 100644 index 0000000..f111f79 --- /dev/null +++ b/sim/testsuite/sim/mips/testutils.inc @@ -0,0 +1,149 @@ +# MIPS simulator testsuite utility functions. +# Copyright (C) 2004 Free Software Foundation, Inc. +# Contributed by Chris Demetriou of Broadcom Corporation. +# +# This file is part of the GNU simulators. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along +# with this program; if not, write to the Free Software Foundation, Inc., +# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + + +# $1, $4, $5, %6, are used as temps by the macros defined here. + + .macro writemsg msg + .data +901: .ascii "\msg\n" +902: + .previous + la $5, 901b + li $6, 902b - 901b + .set push + .set noreorder + jal _dowrite + li $4, 0 + .set pop + .endm + + + # The MIPS simulator uses "break 0x3ff" as the code to exit, + # with the return value in $4 (a0). + .macro exit rc + li $4, \rc + break 0x3ff + .endm + + + .macro setup + + .global _start + .ent _start +_start: + .set push + .set noreorder + j DIAG + nop + .set pop + .end _start + + .global _fail + .ent _fail +_fail: + writemsg "fail" + exit 1 + .end _fail + + .global _pass + .ent _pass +_pass: + writemsg "pass" + exit 0 + .end _pass + + # The MIPS simulator can use multiple different monitor types, + # so we hard-code the simulator "write" reserved instruction opcode, + # rather than jumping to a vector that invokes it. The operation + # expects RA to point to the location at which to continue + # after writing. + .global _dowrite + .ent _dowrite +_dowrite: + # Write opcode (reserved instruction). See sim_monitor and its + # callers in sim/mips/interp.c. + .word 0x00000005 | ((8 << 1) << 6) + .end _dowrite + + .endm # setup + + + .macro pass + .set push + .set noreorder + j _pass + nop + .set pop + .endm + + + .macro fail + .set push + .set noreorder + j _fail + nop + .set pop + .endm + + + .macro load32 reg, val + li \reg, \val + .endm + + + .macro load64 reg, val + dli \reg, \val + .endm + + + .macro loadaddr reg, addr + la \reg, \addr + .endm + + + .macro checkreg reg, expreg + .set push + .set noat + .set noreorder + beq \expreg, \reg, 901f + nop + fail +901: + .set pop + .endm + + + .macro check32 reg, val + .set push + .set noat + load32 $1, \val + checkreg \reg, $1 + .set pop + .endm + + + .macro check64 reg, val + .set push + .set noat + load64 $1, \val + checkreg \reg, $1 + .set pop + .endm |