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authorFrank Ch. Eigler <fche@redhat.com>2000-04-10 15:35:56 +0000
committerFrank Ch. Eigler <fche@redhat.com>2000-04-10 15:35:56 +0000
commit5d0d395e944fab4b09a61baad2ef04c525767fcc (patch)
tree900520a6ff3ab4ed342a01e6a8320360b41e20db /sim
parent0a1a0be2033c15fba02de6962f0f371d3a216ad3 (diff)
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* arm abort fix
2000-03-11 Philip Blundell <philb@gnu.org> * armemu.c (LoadSMult, LoadMult): Correct handling of aborts. Patch from Allan Skillman <Allan.Skillman@arm.com>.
Diffstat (limited to 'sim')
-rw-r--r--sim/arm/ChangeLog5
-rw-r--r--sim/arm/armemu.c6
2 files changed, 8 insertions, 3 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index ce2a17e..bb55ddd 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2000-03-11 Philip Blundell <philb@gnu.org>
+
+ * armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
+ Patch from Allan Skillman <Allan.Skillman@arm.com>.
+
Wed Mar 22 15:24:21 2000 glen mccready <gkm@pobox.com>
* wrapper.c (sim_open,sim_close): Copy into myname, free myname.
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 83853f1..d890cda 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -3457,7 +3457,7 @@ LoadMult (ARMul_State * state, ARMword instr, ARMword address, ARMword WBBase)
state->Aborted = ARMul_DataAbortV;
}
- if (BIT (15))
+ if (BIT (15) && !state->Aborted)
{ /* PC is in the reg list */
#ifdef MODE32
state->Reg[15] = PC;
@@ -3520,13 +3520,13 @@ LoadSMult (ARMul_State * state, ARMword instr,
{ /* load this register */
address += 4;
dest = ARMul_LoadWordS (state, address);
- if (!state->abortSig || state->Aborted)
+ if (!state->abortSig && !state->Aborted)
state->Reg[temp] = dest;
else if (!state->Aborted)
state->Aborted = ARMul_DataAbortV;
}
- if (BIT (15))
+ if (BIT (15) && !state->Aborted)
{ /* PC is in the reg list */
#ifdef MODE32
if (state->Mode != USER26MODE && state->Mode != USER32MODE)